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Feature membarrier-sync-core
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:Subsystem: sched 
:Kconfig: ARCH_HAS_MEMBARRIER_SYNC_CORE 

Arch supports core serializing membarrier.

Comments
--------

Architecture requirements

* arm/arm64

Rely on implicit context synchronization as a result of exception return
when returning from IPI handler, and when returning to user-space.

* x86

x86-32 uses IRET as return from interrupt, which takes care of the IPI.
However, it uses both IRET and SYSEXIT to go back to user-space. The IRET
instruction is core serializing, but not SYSEXIT.

x86-64 uses IRET as return from interrupt, which takes care of the IPI.
However, it can return to user-space through either SYSRETL (compat code),
SYSRETQ, or IRET.

Given that neither SYSRET{L,Q}, nor SYSEXIT, are core serializing, we rely
instead on write_cr3() performed by switch_mm() to provide core serialization
after changing the current mm, and deal with the special case of kthread ->
uthread (temporarily keeping current mm into active_mm) by issuing a
sync_core_before_usermode() in that specific case.

============  ======
Architecture  Status
============  ======
alpha         TODO  
arc           TODO  
arm           ok    
arm64         ok    
c6x           TODO  
csky          TODO  
h8300         TODO  
hexagon       TODO  
ia64          TODO  
m68k          TODO  
microblaze    TODO  
mips          TODO  
nds32         TODO  
nios2         TODO  
openrisc      TODO  
parisc        TODO  
powerpc       TODO  
riscv         TODO  
s390          TODO  
sh            TODO  
sparc         TODO  
um            TODO  
unicore32     TODO  
x86           ok    
xtensa        TODO  
============  ======