From 9fb40aeeb52171ace8bdceb5f8000ec56d0582a0 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:21 -0700 Subject: [PATCH 01/16] net: ibm: emac: rgmii: devm_platform_get_resource Simplifies the probe function by a bit and allows removing the _remove function such that devm now handles all cleanup. printk gets converted to dev_err as np is now gone. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-7-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/rgmii.c | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/rgmii.c b/drivers/net/ethernet/ibm/emac/rgmii.c index 9063f0a17e25..b544dd8633b7 100644 --- a/drivers/net/ethernet/ibm/emac/rgmii.c +++ b/drivers/net/ethernet/ibm/emac/rgmii.c @@ -216,9 +216,7 @@ void *rgmii_dump_regs(struct platform_device *ofdev, void *buf) static int rgmii_probe(struct platform_device *ofdev) { - struct device_node *np = ofdev->dev.of_node; struct rgmii_instance *dev; - struct resource regs; int err; dev = devm_kzalloc(&ofdev->dev, sizeof(struct rgmii_instance), @@ -232,16 +230,10 @@ static int rgmii_probe(struct platform_device *ofdev) dev->ofdev = ofdev; - if (of_address_to_resource(np, 0, ®s)) { - printk(KERN_ERR "%pOF: Can't get registers address\n", np); - return -ENXIO; - } - - dev->base = (struct rgmii_regs __iomem *)ioremap(regs.start, - sizeof(struct rgmii_regs)); - if (dev->base == NULL) { - printk(KERN_ERR "%pOF: Can't map device registers!\n", np); - return -ENOMEM; + dev->base = devm_platform_ioremap_resource(ofdev, 0); + if (IS_ERR(dev->base)) { + dev_err(&ofdev->dev, "can't map device registers"); + return PTR_ERR(dev->base); } /* Check for RGMII flags */ @@ -269,15 +261,6 @@ static int rgmii_probe(struct platform_device *ofdev) return 0; } -static void rgmii_remove(struct platform_device *ofdev) -{ - struct rgmii_instance *dev = platform_get_drvdata(ofdev); - - WARN_ON(dev->users != 0); - - iounmap(dev->base); -} - static const struct of_device_id rgmii_match[] = { { @@ -295,7 +278,6 @@ static struct platform_driver rgmii_driver = { .of_match_table = rgmii_match, }, .probe = rgmii_probe, - .remove = rgmii_remove, }; int __init rgmii_init(void) -- 2.51.0 From e2da0216e55ee25f8f4a582b6ef6a3a4e7867963 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:22 -0700 Subject: [PATCH 02/16] net: ibm: emac: zmii: use devm for kzalloc Simplifies the probe function by removing gotos. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-8-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/zmii.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/zmii.c b/drivers/net/ethernet/ibm/emac/zmii.c index 03bab3f95fe4..e9097b9ceb3d 100644 --- a/drivers/net/ethernet/ibm/emac/zmii.c +++ b/drivers/net/ethernet/ibm/emac/zmii.c @@ -235,29 +235,26 @@ static int zmii_probe(struct platform_device *ofdev) struct device_node *np = ofdev->dev.of_node; struct zmii_instance *dev; struct resource regs; - int rc; - rc = -ENOMEM; - dev = kzalloc(sizeof(struct zmii_instance), GFP_KERNEL); - if (dev == NULL) - goto err_gone; + dev = devm_kzalloc(&ofdev->dev, sizeof(struct zmii_instance), + GFP_KERNEL); + if (!dev) + return -ENOMEM; mutex_init(&dev->lock); dev->ofdev = ofdev; dev->mode = PHY_INTERFACE_MODE_NA; - rc = -ENXIO; if (of_address_to_resource(np, 0, ®s)) { printk(KERN_ERR "%pOF: Can't get registers address\n", np); - goto err_free; + return -ENXIO; } - rc = -ENOMEM; dev->base = (struct zmii_regs __iomem *)ioremap(regs.start, sizeof(struct zmii_regs)); - if (dev->base == NULL) { + if (!dev->base) { printk(KERN_ERR "%pOF: Can't map device registers!\n", np); - goto err_free; + return -ENOMEM; } /* We may need FER value for autodetection later */ @@ -271,11 +268,6 @@ static int zmii_probe(struct platform_device *ofdev) platform_set_drvdata(ofdev, dev); return 0; - - err_free: - kfree(dev); - err_gone: - return rc; } static void zmii_remove(struct platform_device *ofdev) @@ -285,7 +277,6 @@ static void zmii_remove(struct platform_device *ofdev) WARN_ON(dev->users != 0); iounmap(dev->base); - kfree(dev); } static const struct of_device_id zmii_match[] = -- 2.51.0 From 3fb5272de0347da9cc7f8ed8b38e253ca06d664e Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:23 -0700 Subject: [PATCH 03/16] net: ibm: emac: zmii: use devm for mutex_init It seems that since inception, this driver never called mutex_destroy in _remove. Use devm to handle this automatically. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-9-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/zmii.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ibm/emac/zmii.c b/drivers/net/ethernet/ibm/emac/zmii.c index e9097b9ceb3d..cb57c960b34d 100644 --- a/drivers/net/ethernet/ibm/emac/zmii.c +++ b/drivers/net/ethernet/ibm/emac/zmii.c @@ -235,13 +235,17 @@ static int zmii_probe(struct platform_device *ofdev) struct device_node *np = ofdev->dev.of_node; struct zmii_instance *dev; struct resource regs; + int err; dev = devm_kzalloc(&ofdev->dev, sizeof(struct zmii_instance), GFP_KERNEL); if (!dev) return -ENOMEM; - mutex_init(&dev->lock); + err = devm_mutex_init(&ofdev->dev, &dev->lock); + if (err) + return err; + dev->ofdev = ofdev; dev->mode = PHY_INTERFACE_MODE_NA; -- 2.51.0 From c2744ab3ce28c71d01c97ecf97299c61b0884bf1 Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:24 -0700 Subject: [PATCH 04/16] net: ibm: emac: zmii: devm_platform_get_resource Simplifies the probe function by a bit and allows removing the _remove function such that devm now handles all cleanup. printk gets converted to dev_err as np is now gone. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-10-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/zmii.c | 26 ++++---------------------- 1 file changed, 4 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/zmii.c b/drivers/net/ethernet/ibm/emac/zmii.c index cb57c960b34d..69ca6065de1c 100644 --- a/drivers/net/ethernet/ibm/emac/zmii.c +++ b/drivers/net/ethernet/ibm/emac/zmii.c @@ -232,9 +232,7 @@ void *zmii_dump_regs(struct platform_device *ofdev, void *buf) static int zmii_probe(struct platform_device *ofdev) { - struct device_node *np = ofdev->dev.of_node; struct zmii_instance *dev; - struct resource regs; int err; dev = devm_kzalloc(&ofdev->dev, sizeof(struct zmii_instance), @@ -249,16 +247,10 @@ static int zmii_probe(struct platform_device *ofdev) dev->ofdev = ofdev; dev->mode = PHY_INTERFACE_MODE_NA; - if (of_address_to_resource(np, 0, ®s)) { - printk(KERN_ERR "%pOF: Can't get registers address\n", np); - return -ENXIO; - } - - dev->base = (struct zmii_regs __iomem *)ioremap(regs.start, - sizeof(struct zmii_regs)); - if (!dev->base) { - printk(KERN_ERR "%pOF: Can't map device registers!\n", np); - return -ENOMEM; + dev->base = devm_platform_ioremap_resource(ofdev, 0); + if (IS_ERR(dev->base)) { + dev_err(&ofdev->dev, "can't map device registers"); + return PTR_ERR(dev->base); } /* We may need FER value for autodetection later */ @@ -274,15 +266,6 @@ static int zmii_probe(struct platform_device *ofdev) return 0; } -static void zmii_remove(struct platform_device *ofdev) -{ - struct zmii_instance *dev = platform_get_drvdata(ofdev); - - WARN_ON(dev->users != 0); - - iounmap(dev->base); -} - static const struct of_device_id zmii_match[] = { { @@ -301,7 +284,6 @@ static struct platform_driver zmii_driver = { .of_match_table = zmii_match, }, .probe = zmii_probe, - .remove = zmii_remove, }; int __init zmii_init(void) -- 2.51.0 From 3f55d16555492f720f54af76d614bed4ea715c7f Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:25 -0700 Subject: [PATCH 05/16] net: ibm: emac: mal: use devm for kzalloc Simplifies the probe function by removing gotos. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-11-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/mal.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/mal.c b/drivers/net/ethernet/ibm/emac/mal.c index c634534710d9..f1f5e805ebba 100644 --- a/drivers/net/ethernet/ibm/emac/mal.c +++ b/drivers/net/ethernet/ibm/emac/mal.c @@ -524,7 +524,8 @@ static int mal_probe(struct platform_device *ofdev) unsigned long irqflags; irq_handler_t hdlr_serr, hdlr_txde, hdlr_rxde; - mal = kzalloc(sizeof(struct mal_instance), GFP_KERNEL); + mal = devm_kzalloc(&ofdev->dev, sizeof(struct mal_instance), + GFP_KERNEL); if (!mal) return -ENOMEM; @@ -539,8 +540,7 @@ static int mal_probe(struct platform_device *ofdev) printk(KERN_ERR "mal%d: can't find MAL num-tx-chans property!\n", index); - err = -ENODEV; - goto fail; + return -ENODEV; } mal->num_tx_chans = prop[0]; @@ -549,8 +549,7 @@ static int mal_probe(struct platform_device *ofdev) printk(KERN_ERR "mal%d: can't find MAL num-rx-chans property!\n", index); - err = -ENODEV; - goto fail; + return -ENODEV; } mal->num_rx_chans = prop[0]; @@ -558,15 +557,13 @@ static int mal_probe(struct platform_device *ofdev) if (dcr_base == 0) { printk(KERN_ERR "mal%d: can't find DCR resource!\n", index); - err = -ENODEV; - goto fail; + return -ENODEV; } mal->dcr_host = dcr_map(ofdev->dev.of_node, dcr_base, 0x100); if (!DCR_MAP_OK(mal->dcr_host)) { printk(KERN_ERR "mal%d: failed to map DCRs !\n", index); - err = -ENODEV; - goto fail; + return -ENODEV; } if (of_device_is_compatible(ofdev->dev.of_node, "ibm,mcmal-405ez")) { @@ -711,9 +708,6 @@ static int mal_probe(struct platform_device *ofdev) free_netdev(mal->dummy_dev); fail_unmap: dcr_unmap(mal->dcr_host, 0x100); - fail: - kfree(mal); - return err; } @@ -746,10 +740,9 @@ static void mal_remove(struct platform_device *ofdev) dma_free_coherent(&ofdev->dev, sizeof(struct mal_descriptor) * - (NUM_TX_BUFF * mal->num_tx_chans + - NUM_RX_BUFF * mal->num_rx_chans), mal->bd_virt, - mal->bd_dma); - kfree(mal); + (NUM_TX_BUFF * mal->num_tx_chans + + NUM_RX_BUFF * mal->num_rx_chans), + mal->bd_virt, mal->bd_dma); } static const struct of_device_id mal_platform_match[] = -- 2.51.0 From 14f59154ff0b279e989e19b000bf985a3a68bf9b Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:26 -0700 Subject: [PATCH 06/16] net: ibm: emac: mal: use devm for request_irq Avoids manual frees. Also replaced irq_of_parse_and_map with platform_get_irq since it's simpler and does the same thing. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-12-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/mal.c | 51 ++++++++++++----------------- 1 file changed, 21 insertions(+), 30 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/mal.c b/drivers/net/ethernet/ibm/emac/mal.c index f1f5e805ebba..db9faac21317 100644 --- a/drivers/net/ethernet/ibm/emac/mal.c +++ b/drivers/net/ethernet/ibm/emac/mal.c @@ -579,19 +579,19 @@ static int mal_probe(struct platform_device *ofdev) #endif } - mal->txeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 0); - mal->rxeob_irq = irq_of_parse_and_map(ofdev->dev.of_node, 1); - mal->serr_irq = irq_of_parse_and_map(ofdev->dev.of_node, 2); + mal->txeob_irq = platform_get_irq(ofdev, 0); + mal->rxeob_irq = platform_get_irq(ofdev, 1); + mal->serr_irq = platform_get_irq(ofdev, 2); if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) { mal->txde_irq = mal->rxde_irq = mal->serr_irq; } else { - mal->txde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 3); - mal->rxde_irq = irq_of_parse_and_map(ofdev->dev.of_node, 4); + mal->txde_irq = platform_get_irq(ofdev, 3); + mal->rxde_irq = platform_get_irq(ofdev, 4); } - if (!mal->txeob_irq || !mal->rxeob_irq || !mal->serr_irq || - !mal->txde_irq || !mal->rxde_irq) { + if (mal->txeob_irq < 0 || mal->rxeob_irq < 0 || mal->serr_irq < 0 || + mal->txde_irq < 0 || mal->rxde_irq < 0) { printk(KERN_ERR "mal%d: failed to map interrupts !\n", index); err = -ENODEV; @@ -661,21 +661,26 @@ static int mal_probe(struct platform_device *ofdev) hdlr_rxde = mal_rxde; } - err = request_irq(mal->serr_irq, hdlr_serr, irqflags, "MAL SERR", mal); + err = devm_request_irq(&ofdev->dev, mal->serr_irq, hdlr_serr, irqflags, + "MAL SERR", mal); if (err) goto fail2; - err = request_irq(mal->txde_irq, hdlr_txde, irqflags, "MAL TX DE", mal); + err = devm_request_irq(&ofdev->dev, mal->txde_irq, hdlr_txde, irqflags, + "MAL TX DE", mal); if (err) - goto fail3; - err = request_irq(mal->txeob_irq, mal_txeob, 0, "MAL TX EOB", mal); + goto fail2; + err = devm_request_irq(&ofdev->dev, mal->txeob_irq, mal_txeob, 0, + "MAL TX EOB", mal); if (err) - goto fail4; - err = request_irq(mal->rxde_irq, hdlr_rxde, irqflags, "MAL RX DE", mal); + goto fail2; + err = devm_request_irq(&ofdev->dev, mal->rxde_irq, hdlr_rxde, irqflags, + "MAL RX DE", mal); if (err) - goto fail5; - err = request_irq(mal->rxeob_irq, mal_rxeob, 0, "MAL RX EOB", mal); + goto fail2; + err = devm_request_irq(&ofdev->dev, mal->rxeob_irq, mal_rxeob, 0, + "MAL RX EOB", mal); if (err) - goto fail6; + goto fail2; /* Enable all MAL SERR interrupt sources */ set_mal_dcrn(mal, MAL_IER, MAL_IER_EVENTS); @@ -694,14 +699,6 @@ static int mal_probe(struct platform_device *ofdev) return 0; - fail6: - free_irq(mal->rxde_irq, mal); - fail5: - free_irq(mal->txeob_irq, mal); - fail4: - free_irq(mal->txde_irq, mal); - fail3: - free_irq(mal->serr_irq, mal); fail2: dma_free_coherent(&ofdev->dev, bd_size, mal->bd_virt, mal->bd_dma); fail_dummy: @@ -726,12 +723,6 @@ static void mal_remove(struct platform_device *ofdev) "mal%d: commac list is not empty on remove!\n", mal->index); - free_irq(mal->serr_irq, mal); - free_irq(mal->txde_irq, mal); - free_irq(mal->txeob_irq, mal); - free_irq(mal->rxde_irq, mal); - free_irq(mal->rxeob_irq, mal); - mal_reset(mal); free_netdev(mal->dummy_dev); -- 2.51.0 From c4f5d0454cab59fb07aafbf843d3b715eb786d6e Mon Sep 17 00:00:00 2001 From: Rosen Penev Date: Wed, 30 Oct 2024 13:37:27 -0700 Subject: [PATCH 07/16] net: ibm: emac: mal: move irq maps down Moves the handling right before they are used and allows merging a branch. Also get rid of the error handling as devm_request_irq can handle that. Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20241030203727.6039-13-rosenp@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ibm/emac/mal.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/mal.c b/drivers/net/ethernet/ibm/emac/mal.c index db9faac21317..7d70056e9008 100644 --- a/drivers/net/ethernet/ibm/emac/mal.c +++ b/drivers/net/ethernet/ibm/emac/mal.c @@ -579,25 +579,6 @@ static int mal_probe(struct platform_device *ofdev) #endif } - mal->txeob_irq = platform_get_irq(ofdev, 0); - mal->rxeob_irq = platform_get_irq(ofdev, 1); - mal->serr_irq = platform_get_irq(ofdev, 2); - - if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) { - mal->txde_irq = mal->rxde_irq = mal->serr_irq; - } else { - mal->txde_irq = platform_get_irq(ofdev, 3); - mal->rxde_irq = platform_get_irq(ofdev, 4); - } - - if (mal->txeob_irq < 0 || mal->rxeob_irq < 0 || mal->serr_irq < 0 || - mal->txde_irq < 0 || mal->rxde_irq < 0) { - printk(KERN_ERR - "mal%d: failed to map interrupts !\n", index); - err = -ENODEV; - goto fail_unmap; - } - INIT_LIST_HEAD(&mal->poll_list); INIT_LIST_HEAD(&mal->list); spin_lock_init(&mal->lock); @@ -651,10 +632,17 @@ static int mal_probe(struct platform_device *ofdev) sizeof(struct mal_descriptor) * mal_rx_bd_offset(mal, i)); + mal->txeob_irq = platform_get_irq(ofdev, 0); + mal->rxeob_irq = platform_get_irq(ofdev, 1); + mal->serr_irq = platform_get_irq(ofdev, 2); + if (mal_has_feature(mal, MAL_FTR_COMMON_ERR_INT)) { + mal->txde_irq = mal->rxde_irq = mal->serr_irq; irqflags = IRQF_SHARED; hdlr_serr = hdlr_txde = hdlr_rxde = mal_int; } else { + mal->txde_irq = platform_get_irq(ofdev, 3); + mal->rxde_irq = platform_get_irq(ofdev, 4); irqflags = 0; hdlr_serr = mal_serr; hdlr_txde = mal_txde; -- 2.51.0 From eb90f876b7961d702d7fc549e14614860f531e60 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Thu, 31 Oct 2024 22:42:52 +0100 Subject: [PATCH 08/16] r8169: align RTL8125 EEE config with vendor driver Align the EEE config for RTL8125A/RTL8125B with vendor driver r8125. This should help to avoid compatibility issues. Signed-off-by: Heiner Kallweit Link: https://patch.msgid.link/044c925e-8669-4b98-87df-95b4056f4f5f@gmail.com Signed-off-by: Jakub Kicinski --- .../net/ethernet/realtek/r8169_phy_config.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c index 8739f4b42aaf..a0ecfa9c60ae 100644 --- a/drivers/net/ethernet/realtek/r8169_phy_config.c +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c @@ -89,19 +89,25 @@ static void rtl8168h_config_eee_phy(struct phy_device *phydev) phy_modify_paged(phydev, 0xa42, 0x14, 0x0000, 0x0080); } -static void rtl8125a_config_eee_phy(struct phy_device *phydev) +static void rtl8125_common_config_eee_phy(struct phy_device *phydev) { - rtl8168h_config_eee_phy(phydev); + phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000); + phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000); + phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000); +} +static void rtl8125a_config_eee_phy(struct phy_device *phydev) +{ + rtl8168g_config_eee_phy(phydev); + /* disable EEE at 2.5Gbps */ phy_modify_paged(phydev, 0xa6d, 0x12, 0x0001, 0x0000); - phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000); + rtl8125_common_config_eee_phy(phydev); } static void rtl8125b_config_eee_phy(struct phy_device *phydev) { - phy_modify_paged(phydev, 0xa6d, 0x14, 0x0010, 0x0000); - phy_modify_paged(phydev, 0xa42, 0x14, 0x0080, 0x0000); - phy_modify_paged(phydev, 0xa4a, 0x11, 0x0200, 0x0000); + rtl8168g_config_eee_phy(phydev); + rtl8125_common_config_eee_phy(phydev); } static void rtl8169s_hw_phy_config(struct rtl8169_private *tp, -- 2.51.0 From 4af2f60bf7378bd5c92b15a528d8c6c7d02bed6c Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Thu, 31 Oct 2024 22:43:45 +0100 Subject: [PATCH 09/16] r8169: align RTL8125/RTL8126 PHY config with vendor driver This aligns some parameters with vendor driver r8125/r8126 to avoid compatibility issues. Note that for RTL8125B there's no functional change, just the open-coded version of the function is replaced. Signed-off-by: Heiner Kallweit Link: https://patch.msgid.link/a8a9d896-fbe6-41f2-bf87-666567d3cdb3@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/realtek/r8169_phy_config.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c index a0ecfa9c60ae..54b254b9bf6c 100644 --- a/drivers/net/ethernet/realtek/r8169_phy_config.c +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c @@ -1073,8 +1073,8 @@ static void rtl8125b_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev) { r8169_apply_firmware(tp); + rtl8168g_enable_gphy_10m(phydev); - phy_modify_paged(phydev, 0xa44, 0x11, 0x0000, 0x0800); phy_modify_paged(phydev, 0xac4, 0x13, 0x00f0, 0x0090); phy_modify_paged(phydev, 0xad3, 0x10, 0x0003, 0x0001); @@ -1113,6 +1113,7 @@ static void rtl8125d_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev) { r8169_apply_firmware(tp); + rtl8168g_enable_gphy_10m(phydev); rtl8125_legacy_force_mode(phydev); rtl8168g_disable_aldps(phydev); rtl8125b_config_eee_phy(phydev); @@ -1122,6 +1123,9 @@ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev) { r8169_apply_firmware(tp); + rtl8168g_enable_gphy_10m(phydev); + rtl8125_legacy_force_mode(phydev); + rtl8168g_disable_aldps(phydev); } void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev, -- 2.51.0 From a3d8520e6a19ab018da6c7fc22512c913697a829 Mon Sep 17 00:00:00 2001 From: Heiner Kallweit Date: Thu, 31 Oct 2024 22:44:36 +0100 Subject: [PATCH 10/16] r8169: align RTL8126 EEE config with vendor driver Align the EEE config for RTL8126A with vendor driver r8126 to avoid compatibility issues. Signed-off-by: Heiner Kallweit Link: https://patch.msgid.link/71e4859e-4cd0-4b6b-b7fa-621d7721992f@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/realtek/r8169_phy_config.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/realtek/r8169_phy_config.c b/drivers/net/ethernet/realtek/r8169_phy_config.c index 54b254b9bf6c..1d5b33f6c4b5 100644 --- a/drivers/net/ethernet/realtek/r8169_phy_config.c +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c @@ -1126,6 +1126,7 @@ static void rtl8126a_hw_phy_config(struct rtl8169_private *tp, rtl8168g_enable_gphy_10m(phydev); rtl8125_legacy_force_mode(phydev); rtl8168g_disable_aldps(phydev); + rtl8125_common_config_eee_phy(phydev); } void r8169_hw_phy_config(struct rtl8169_private *tp, struct phy_device *phydev, -- 2.51.0 From 2c6ad81de163692733d592e8f45b797be8478ac9 Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:28 +0800 Subject: [PATCH 11/16] net: stmmac: Introduce separate files for FPE implementation By moving FPE related code info separate files, FPE implementation becomes a separate module initially. No functional change intended. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/e9ddf4fbf0fc053ae30592aa6c4363e72a4d8e62.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/stmicro/stmmac/Makefile | 2 +- .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac5.c | 150 -------- drivers/net/ethernet/stmicro/stmmac/dwmac5.h | 26 -- .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 - .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 27 +- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 10 - .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 2 +- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 354 ++++++++++++++++++ .../net/ethernet/stmicro/stmmac/stmmac_fpe.h | 45 +++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 149 +------- 11 files changed, 405 insertions(+), 363 deletions(-) create mode 100644 drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c create mode 100644 drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index c2f0e91f6bf8..7e46dca90628 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -6,7 +6,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \ mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o \ dwmac4_dma.o dwmac4_lib.o dwmac4_core.o dwmac5.o hwif.o \ stmmac_tc.o dwxgmac2_core.o dwxgmac2_dma.o dwxgmac2_descs.o \ - stmmac_xdp.o stmmac_est.o \ + stmmac_xdp.o stmmac_est.o stmmac_fpe.o \ $(stmmac-y) stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index e65a65666cc1..4d217926820a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -16,6 +16,7 @@ #include #include #include "stmmac.h" +#include "stmmac_fpe.h" #include "stmmac_pcs.h" #include "dwmac4.h" #include "dwmac5.h" diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c index 08add508db84..1c431b918719 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c @@ -572,153 +572,3 @@ int dwmac5_flex_pps_config(void __iomem *ioaddr, int index, writel(val, ioaddr + MAC_PPS_CONTROL); return 0; } - -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) -{ - u32 value; - - if (tx_enable) { - cfg->fpe_csr = EFPE; - value = readl(ioaddr + GMAC_RXQ_CTRL1); - value &= ~GMAC_RXQCTRL_FPRQ; - value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; - writel(value, ioaddr + GMAC_RXQ_CTRL1); - } else { - cfg->fpe_csr = 0; - } - writel(cfg->fpe_csr, ioaddr + MAC_FPE_CTRL_STS); - - value = readl(ioaddr + GMAC_INT_EN); - - if (pmac_enable) { - if (!(value & GMAC_INT_FPE_EN)) { - /* Dummy read to clear any pending masked interrupts */ - readl(ioaddr + MAC_FPE_CTRL_STS); - - value |= GMAC_INT_FPE_EN; - } - } else { - value &= ~GMAC_INT_FPE_EN; - } - - writel(value, ioaddr + GMAC_INT_EN); -} - -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) -{ - u32 value; - int status; - - status = FPE_EVENT_UNKNOWN; - - /* Reads from the MAC_FPE_CTRL_STS register should only be performed - * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" - */ - value = readl(ioaddr + MAC_FPE_CTRL_STS); - - if (value & TRSP) { - status |= FPE_EVENT_TRSP; - netdev_dbg(dev, "FPE: Respond mPacket is transmitted\n"); - } - - if (value & TVER) { - status |= FPE_EVENT_TVER; - netdev_dbg(dev, "FPE: Verify mPacket is transmitted\n"); - } - - if (value & RRSP) { - status |= FPE_EVENT_RRSP; - netdev_dbg(dev, "FPE: Respond mPacket is received\n"); - } - - if (value & RVER) { - status |= FPE_EVENT_RVER; - netdev_dbg(dev, "FPE: Verify mPacket is received\n"); - } - - return status; -} - -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type) -{ - u32 value = cfg->fpe_csr; - - if (type == MPACKET_VERIFY) - value |= SVER; - else if (type == MPACKET_RESPONSE) - value |= SRSP; - - writel(value, ioaddr + MAC_FPE_CTRL_STS); -} - -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) -{ - return FIELD_GET(DWMAC5_ADD_FRAG_SZ, readl(ioaddr + MTL_FPE_CTRL_STS)); -} - -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) -{ - u32 value; - - value = readl(ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(value, add_frag_size, DWMAC5_ADD_FRAG_SZ), - ioaddr + MTL_FPE_CTRL_STS); -} - -#define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mapping" -#define WEIGHT_ERR_MSG "TXQ weight %u differs across other TXQs in TC: [%u]" - -int dwmac5_fpe_map_preemption_class(struct net_device *ndev, - struct netlink_ext_ack *extack, u32 pclass) -{ - u32 val, offset, count, queue_weight, preemptible_txqs = 0; - struct stmmac_priv *priv = netdev_priv(ndev); - u32 num_tc = ndev->num_tc; - - if (!pclass) - goto update_mapping; - - /* DWMAC CORE4+ can not program TC:TXQ mapping to hardware. - * - * Synopsys Databook: - * "The number of Tx DMA channels is equal to the number of Tx queues, - * and is direct one-to-one mapping." - */ - for (u32 tc = 0; tc < num_tc; tc++) { - count = ndev->tc_to_txq[tc].count; - offset = ndev->tc_to_txq[tc].offset; - - if (pclass & BIT(tc)) - preemptible_txqs |= GENMASK(offset + count - 1, offset); - - /* This is 1:1 mapping, go to next TC */ - if (count == 1) - continue; - - if (priv->plat->tx_sched_algorithm == MTL_TX_ALGORITHM_SP) { - NL_SET_ERR_MSG_MOD(extack, ALG_ERR_MSG); - return -EINVAL; - } - - queue_weight = priv->plat->tx_queues_cfg[offset].weight; - - for (u32 i = 1; i < count; i++) { - if (priv->plat->tx_queues_cfg[offset + i].weight != - queue_weight) { - NL_SET_ERR_MSG_FMT_MOD(extack, WEIGHT_ERR_MSG, - queue_weight, tc); - return -EINVAL; - } - } - } - -update_mapping: - val = readl(priv->ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(val, preemptible_txqs, DWMAC5_PREEMPTION_CLASS), - priv->ioaddr + MTL_FPE_CTRL_STS); - - return 0; -} diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac5.h b/drivers/net/ethernet/stmicro/stmmac/dwmac5.h index 6c6eb6790e83..00b151b3b688 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac5.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac5.h @@ -11,15 +11,6 @@ #define PRTYEN BIT(1) #define TMOUTEN BIT(0) -#define MAC_FPE_CTRL_STS 0x00000234 -#define TRSP BIT(19) -#define TVER BIT(18) -#define RRSP BIT(17) -#define RVER BIT(16) -#define SRSP BIT(2) -#define SVER BIT(1) -#define EFPE BIT(0) - #define MAC_PPS_CONTROL 0x00000b70 #define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1) #define PPS_MINIDX(x) ((x) * 8) @@ -39,12 +30,6 @@ #define MAC_PPSx_INTERVAL(x) (0x00000b88 + ((x) * 0x10)) #define MAC_PPSx_WIDTH(x) (0x00000b8c + ((x) * 0x10)) -#define MTL_FPE_CTRL_STS 0x00000c90 -/* Preemption Classification */ -#define DWMAC5_PREEMPTION_CLASS GENMASK(15, 8) -/* Additional Fragment Size of preempted frames */ -#define DWMAC5_ADD_FRAG_SZ GENMASK(1, 0) - #define MTL_RXP_CONTROL_STATUS 0x00000ca0 #define RXPI BIT(31) #define NPE GENMASK(23, 16) @@ -108,16 +93,5 @@ int dwmac5_rxp_config(void __iomem *ioaddr, struct stmmac_tc_entry *entries, int dwmac5_flex_pps_config(void __iomem *ioaddr, int index, struct stmmac_pps_cfg *cfg, bool enable, u32 sub_second_inc, u32 systime_flags); -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type); -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev); -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr); -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size); -int dwmac5_fpe_map_preemption_class(struct net_device *ndev, - struct netlink_ext_ack *extack, u32 pclass); #endif /* __DWMAC5_H__ */ diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 6a2c7d22df1e..917796293c26 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -193,8 +193,6 @@ #define XGMAC_MDIO_ADDR 0x00000200 #define XGMAC_MDIO_DATA 0x00000204 #define XGMAC_MDIO_C22P 0x00000220 -#define XGMAC_FPE_CTRL_STS 0x00000280 -#define XGMAC_EFPE BIT(0) #define XGMAC_ADDRx_HIGH(x) (0x00000300 + (x) * 0x8) #define XGMAC_ADDR_MAX 32 #define XGMAC_AE BIT(31) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index f519d43738b0..111ba5a524ed 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -8,6 +8,7 @@ #include #include #include "stmmac.h" +#include "stmmac_fpe.h" #include "stmmac_ptp.h" #include "dwxlgmac2.h" #include "dwxgmac2.h" @@ -1504,32 +1505,6 @@ static void dwxgmac2_set_arp_offload(struct mac_device_info *hw, bool en, writel(value, ioaddr + XGMAC_RX_CONFIG); } -static void dwxgmac3_fpe_configure(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) -{ - u32 value; - - if (!tx_enable) { - value = readl(ioaddr + XGMAC_FPE_CTRL_STS); - - value &= ~XGMAC_EFPE; - - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); - return; - } - - value = readl(ioaddr + XGMAC_RXQ_CTRL1); - value &= ~XGMAC_RQ; - value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; - writel(value, ioaddr + XGMAC_RXQ_CTRL1); - - value = readl(ioaddr + XGMAC_FPE_CTRL_STS); - value |= XGMAC_EFPE; - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); -} - const struct stmmac_ops dwxgmac210_ops = { .core_init = dwxgmac2_core_init, .set_mac = dwxgmac2_set_mac, diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index ea135203ff2e..816b979e72cc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -146,15 +146,6 @@ struct stmmac_channel { u32 index; }; -/* FPE link-partner hand-shaking mPacket type */ -enum stmmac_mpacket_type { - MPACKET_VERIFY = 0, - MPACKET_RESPONSE = 1, -}; - -#define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 -#define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 - struct stmmac_fpe_cfg { /* Serialize access to MAC Merge state between ethtool requests * and link state updates. @@ -420,7 +411,6 @@ bool stmmac_eee_init(struct stmmac_priv *priv); int stmmac_reinit_queues(struct net_device *dev, u32 rx_cnt, u32 tx_cnt); int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size); int stmmac_bus_clks_config(struct stmmac_priv *priv, bool enabled); -void stmmac_fpe_apply(struct stmmac_priv *priv); static inline bool stmmac_xdp_is_enabled(struct stmmac_priv *priv) { diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 2a37592a6281..2792a4c6cbcd 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -17,9 +17,9 @@ #include #include "stmmac.h" +#include "stmmac_fpe.h" #include "dwmac_dma.h" #include "dwxgmac2.h" -#include "dwmac5.h" #define REG_SPACE_SIZE 0x1060 #define GMAC4_REG_SPACE_SIZE 0x116C diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c new file mode 100644 index 000000000000..8cfb5bccfa52 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -0,0 +1,354 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2024 Furong Xu <0x1207@gmail.com> + * stmmac FPE(802.3 Qbu) handling + */ +#include "stmmac.h" +#include "stmmac_fpe.h" +#include "dwmac4.h" +#include "dwmac5.h" +#include "dwxgmac2.h" + +#define MAC_FPE_CTRL_STS 0x00000234 +#define TRSP BIT(19) +#define TVER BIT(18) +#define RRSP BIT(17) +#define RVER BIT(16) +#define SRSP BIT(2) +#define SVER BIT(1) +#define EFPE BIT(0) + +#define MTL_FPE_CTRL_STS 0x00000c90 +/* Preemption Classification */ +#define DWMAC5_PREEMPTION_CLASS GENMASK(15, 8) +/* Additional Fragment Size of preempted frames */ +#define DWMAC5_ADD_FRAG_SZ GENMASK(1, 0) + +#define XGMAC_FPE_CTRL_STS 0x00000280 +#define XGMAC_EFPE BIT(0) + +void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, + u32 num_txq, u32 num_rxq, + bool tx_enable, bool pmac_enable) +{ + u32 value; + + if (tx_enable) { + cfg->fpe_csr = EFPE; + value = readl(ioaddr + GMAC_RXQ_CTRL1); + value &= ~GMAC_RXQCTRL_FPRQ; + value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; + writel(value, ioaddr + GMAC_RXQ_CTRL1); + } else { + cfg->fpe_csr = 0; + } + writel(cfg->fpe_csr, ioaddr + MAC_FPE_CTRL_STS); + + value = readl(ioaddr + GMAC_INT_EN); + + if (pmac_enable) { + if (!(value & GMAC_INT_FPE_EN)) { + /* Dummy read to clear any pending masked interrupts */ + readl(ioaddr + MAC_FPE_CTRL_STS); + + value |= GMAC_INT_FPE_EN; + } + } else { + value &= ~GMAC_INT_FPE_EN; + } + + writel(value, ioaddr + GMAC_INT_EN); +} + +void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, + enum stmmac_mpacket_type type) +{ + u32 value = cfg->fpe_csr; + + if (type == MPACKET_VERIFY) + value |= SVER; + else if (type == MPACKET_RESPONSE) + value |= SRSP; + + writel(value, ioaddr + MAC_FPE_CTRL_STS); +} + +void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) +{ + struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; + + /* This is interrupt context, just spin_lock() */ + spin_lock(&fpe_cfg->lock); + + if (!fpe_cfg->pmac_enabled || status == FPE_EVENT_UNKNOWN) + goto unlock_out; + + /* LP has sent verify mPacket */ + if ((status & FPE_EVENT_RVER) == FPE_EVENT_RVER) + stmmac_fpe_send_mpacket(priv, priv->ioaddr, fpe_cfg, + MPACKET_RESPONSE); + + /* Local has sent verify mPacket */ + if ((status & FPE_EVENT_TVER) == FPE_EVENT_TVER && + fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) + fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING; + + /* LP has sent response mPacket */ + if ((status & FPE_EVENT_RRSP) == FPE_EVENT_RRSP && + fpe_cfg->status == ETHTOOL_MM_VERIFY_STATUS_VERIFYING) + fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; + +unlock_out: + spin_unlock(&fpe_cfg->lock); +} + +int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) +{ + u32 value; + int status; + + status = FPE_EVENT_UNKNOWN; + + /* Reads from the MAC_FPE_CTRL_STS register should only be performed + * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" + */ + value = readl(ioaddr + MAC_FPE_CTRL_STS); + + if (value & TRSP) { + status |= FPE_EVENT_TRSP; + netdev_dbg(dev, "FPE: Respond mPacket is transmitted\n"); + } + + if (value & TVER) { + status |= FPE_EVENT_TVER; + netdev_dbg(dev, "FPE: Verify mPacket is transmitted\n"); + } + + if (value & RRSP) { + status |= FPE_EVENT_RRSP; + netdev_dbg(dev, "FPE: Respond mPacket is received\n"); + } + + if (value & RVER) { + status |= FPE_EVENT_RVER; + netdev_dbg(dev, "FPE: Verify mPacket is received\n"); + } + + return status; +} + +/** + * stmmac_fpe_verify_timer - Timer for MAC Merge verification + * @t: timer_list struct containing private info + * + * Verify the MAC Merge capability in the local TX direction, by + * transmitting Verify mPackets up to 3 times. Wait until link + * partner responds with a Response mPacket, otherwise fail. + */ +static void stmmac_fpe_verify_timer(struct timer_list *t) +{ + struct stmmac_fpe_cfg *fpe_cfg = from_timer(fpe_cfg, t, verify_timer); + struct stmmac_priv *priv = container_of(fpe_cfg, struct stmmac_priv, + fpe_cfg); + unsigned long flags; + bool rearm = false; + + spin_lock_irqsave(&fpe_cfg->lock, flags); + + switch (fpe_cfg->status) { + case ETHTOOL_MM_VERIFY_STATUS_INITIAL: + case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: + if (fpe_cfg->verify_retries != 0) { + stmmac_fpe_send_mpacket(priv, priv->ioaddr, + fpe_cfg, MPACKET_VERIFY); + rearm = true; + } else { + fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_FAILED; + } + + fpe_cfg->verify_retries--; + break; + + case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: + stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, + priv->plat->tx_queues_to_use, + priv->plat->rx_queues_to_use, + true, true); + break; + + default: + break; + } + + if (rearm) { + mod_timer(&fpe_cfg->verify_timer, + jiffies + msecs_to_jiffies(fpe_cfg->verify_time)); + } + + spin_unlock_irqrestore(&fpe_cfg->lock, flags); +} + +static void stmmac_fpe_verify_timer_arm(struct stmmac_fpe_cfg *fpe_cfg) +{ + if (fpe_cfg->pmac_enabled && fpe_cfg->tx_enabled && + fpe_cfg->verify_enabled && + fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_FAILED && + fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) { + timer_setup(&fpe_cfg->verify_timer, stmmac_fpe_verify_timer, 0); + mod_timer(&fpe_cfg->verify_timer, jiffies); + } +} + +void stmmac_fpe_init(struct stmmac_priv *priv) +{ + priv->fpe_cfg.verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES; + priv->fpe_cfg.verify_time = STMMAC_FPE_MM_MAX_VERIFY_TIME_MS; + priv->fpe_cfg.status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; + timer_setup(&priv->fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0); + spin_lock_init(&priv->fpe_cfg.lock); +} + +void stmmac_fpe_apply(struct stmmac_priv *priv) +{ + struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; + + /* If verification is disabled, configure FPE right away. + * Otherwise let the timer code do it. + */ + if (!fpe_cfg->verify_enabled) { + stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, + priv->plat->tx_queues_to_use, + priv->plat->rx_queues_to_use, + fpe_cfg->tx_enabled, + fpe_cfg->pmac_enabled); + } else { + fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_INITIAL; + fpe_cfg->verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES; + + if (netif_running(priv->dev)) + stmmac_fpe_verify_timer_arm(fpe_cfg); + } +} + +void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) +{ + struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; + unsigned long flags; + + timer_shutdown_sync(&fpe_cfg->verify_timer); + + spin_lock_irqsave(&fpe_cfg->lock, flags); + + if (is_up && fpe_cfg->pmac_enabled) { + /* VERIFY process requires pmac enabled when NIC comes up */ + stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, + priv->plat->tx_queues_to_use, + priv->plat->rx_queues_to_use, + false, true); + + /* New link => maybe new partner => new verification process */ + stmmac_fpe_apply(priv); + } else { + /* No link => turn off EFPE */ + stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, + priv->plat->tx_queues_to_use, + priv->plat->rx_queues_to_use, + false, false); + } + + spin_unlock_irqrestore(&fpe_cfg->lock, flags); +} + +int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) +{ + return FIELD_GET(DWMAC5_ADD_FRAG_SZ, readl(ioaddr + MTL_FPE_CTRL_STS)); +} + +void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) +{ + u32 value; + + value = readl(ioaddr + MTL_FPE_CTRL_STS); + writel(u32_replace_bits(value, add_frag_size, DWMAC5_ADD_FRAG_SZ), + ioaddr + MTL_FPE_CTRL_STS); +} + +#define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mapping" +#define WEIGHT_ERR_MSG "TXQ weight %u differs across other TXQs in TC: [%u]" + +int dwmac5_fpe_map_preemption_class(struct net_device *ndev, + struct netlink_ext_ack *extack, u32 pclass) +{ + u32 val, offset, count, queue_weight, preemptible_txqs = 0; + struct stmmac_priv *priv = netdev_priv(ndev); + u32 num_tc = ndev->num_tc; + + if (!pclass) + goto update_mapping; + + /* DWMAC CORE4+ can not program TC:TXQ mapping to hardware. + * + * Synopsys Databook: + * "The number of Tx DMA channels is equal to the number of Tx queues, + * and is direct one-to-one mapping." + */ + for (u32 tc = 0; tc < num_tc; tc++) { + count = ndev->tc_to_txq[tc].count; + offset = ndev->tc_to_txq[tc].offset; + + if (pclass & BIT(tc)) + preemptible_txqs |= GENMASK(offset + count - 1, offset); + + /* This is 1:1 mapping, go to next TC */ + if (count == 1) + continue; + + if (priv->plat->tx_sched_algorithm == MTL_TX_ALGORITHM_SP) { + NL_SET_ERR_MSG_MOD(extack, ALG_ERR_MSG); + return -EINVAL; + } + + queue_weight = priv->plat->tx_queues_cfg[offset].weight; + + for (u32 i = 1; i < count; i++) { + if (priv->plat->tx_queues_cfg[offset + i].weight != + queue_weight) { + NL_SET_ERR_MSG_FMT_MOD(extack, WEIGHT_ERR_MSG, + queue_weight, tc); + return -EINVAL; + } + } + } + +update_mapping: + val = readl(priv->ioaddr + MTL_FPE_CTRL_STS); + writel(u32_replace_bits(val, preemptible_txqs, DWMAC5_PREEMPTION_CLASS), + priv->ioaddr + MTL_FPE_CTRL_STS); + + return 0; +} + +void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, + u32 num_txq, u32 num_rxq, + bool tx_enable, bool pmac_enable) +{ + u32 value; + + if (!tx_enable) { + value = readl(ioaddr + XGMAC_FPE_CTRL_STS); + + value &= ~XGMAC_EFPE; + + writel(value, ioaddr + XGMAC_FPE_CTRL_STS); + return; + } + + value = readl(ioaddr + XGMAC_RXQ_CTRL1); + value &= ~XGMAC_RQ; + value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; + writel(value, ioaddr + XGMAC_RXQ_CTRL1); + + value = readl(ioaddr + XGMAC_FPE_CTRL_STS); + value |= XGMAC_EFPE; + writel(value, ioaddr + XGMAC_FPE_CTRL_STS); +} diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h new file mode 100644 index 000000000000..25725fd5182f --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2024 Furong Xu <0x1207@gmail.com> + * stmmac FPE(802.3 Qbu) handling + */ +#ifndef _STMMAC_FPE_H_ +#define _STMMAC_FPE_H_ + +#include +#include + +#define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 +#define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 + +/* FPE link-partner hand-shaking mPacket type */ +enum stmmac_mpacket_type { + MPACKET_VERIFY = 0, + MPACKET_RESPONSE = 1, +}; + +struct stmmac_priv; +struct stmmac_fpe_cfg; + +void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up); +void stmmac_fpe_event_status(struct stmmac_priv *priv, int status); +void stmmac_fpe_init(struct stmmac_priv *priv); +void stmmac_fpe_apply(struct stmmac_priv *priv); + +void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, + u32 num_txq, u32 num_rxq, + bool tx_enable, bool pmac_enable); +void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, + struct stmmac_fpe_cfg *cfg, + enum stmmac_mpacket_type type); +int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev); +int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr); +void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size); +int dwmac5_fpe_map_preemption_class(struct net_device *ndev, + struct netlink_ext_ack *extack, u32 pclass); + +void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, + u32 num_txq, u32 num_rxq, + bool tx_enable, bool pmac_enable); + +#endif diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 208dbc68aaf9..20bd5440abca 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -43,6 +43,7 @@ #include #include #include "stmmac_ptp.h" +#include "stmmac_fpe.h" #include "stmmac.h" #include "stmmac_xdp.h" #include @@ -966,35 +967,6 @@ static void stmmac_mac_config(struct phylink_config *config, unsigned int mode, /* Nothing to do, xpcs_config() handles everything */ } -static void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) -{ - struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; - unsigned long flags; - - timer_shutdown_sync(&fpe_cfg->verify_timer); - - spin_lock_irqsave(&fpe_cfg->lock, flags); - - if (is_up && fpe_cfg->pmac_enabled) { - /* VERIFY process requires pmac enabled when NIC comes up */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, true); - - /* New link => maybe new partner => new verification process */ - stmmac_fpe_apply(priv); - } else { - /* No link => turn off EFPE */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, false); - } - - spin_unlock_irqrestore(&fpe_cfg->lock, flags); -} - static void stmmac_mac_link_down(struct phylink_config *config, unsigned int mode, phy_interface_t interface) { @@ -5965,35 +5937,6 @@ static int stmmac_set_features(struct net_device *netdev, return 0; } -static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) -{ - struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; - - /* This is interrupt context, just spin_lock() */ - spin_lock(&fpe_cfg->lock); - - if (!fpe_cfg->pmac_enabled || status == FPE_EVENT_UNKNOWN) - goto unlock_out; - - /* LP has sent verify mPacket */ - if ((status & FPE_EVENT_RVER) == FPE_EVENT_RVER) - stmmac_fpe_send_mpacket(priv, priv->ioaddr, fpe_cfg, - MPACKET_RESPONSE); - - /* Local has sent verify mPacket */ - if ((status & FPE_EVENT_TVER) == FPE_EVENT_TVER && - fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) - fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_VERIFYING; - - /* LP has sent response mPacket */ - if ((status & FPE_EVENT_RRSP) == FPE_EVENT_RRSP && - fpe_cfg->status == ETHTOOL_MM_VERIFY_STATUS_VERIFYING) - fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED; - -unlock_out: - spin_unlock(&fpe_cfg->lock); -} - static void stmmac_common_interrupt(struct stmmac_priv *priv) { u32 rx_cnt = priv->plat->rx_queues_to_use; @@ -7349,90 +7292,6 @@ int stmmac_reinit_ringparam(struct net_device *dev, u32 rx_size, u32 tx_size) return ret; } -/** - * stmmac_fpe_verify_timer - Timer for MAC Merge verification - * @t: timer_list struct containing private info - * - * Verify the MAC Merge capability in the local TX direction, by - * transmitting Verify mPackets up to 3 times. Wait until link - * partner responds with a Response mPacket, otherwise fail. - */ -static void stmmac_fpe_verify_timer(struct timer_list *t) -{ - struct stmmac_fpe_cfg *fpe_cfg = from_timer(fpe_cfg, t, verify_timer); - struct stmmac_priv *priv = container_of(fpe_cfg, struct stmmac_priv, - fpe_cfg); - unsigned long flags; - bool rearm = false; - - spin_lock_irqsave(&fpe_cfg->lock, flags); - - switch (fpe_cfg->status) { - case ETHTOOL_MM_VERIFY_STATUS_INITIAL: - case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: - if (fpe_cfg->verify_retries != 0) { - stmmac_fpe_send_mpacket(priv, priv->ioaddr, - fpe_cfg, MPACKET_VERIFY); - rearm = true; - } else { - fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_FAILED; - } - - fpe_cfg->verify_retries--; - break; - - case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - true, true); - break; - - default: - break; - } - - if (rearm) { - mod_timer(&fpe_cfg->verify_timer, - jiffies + msecs_to_jiffies(fpe_cfg->verify_time)); - } - - spin_unlock_irqrestore(&fpe_cfg->lock, flags); -} - -static void stmmac_fpe_verify_timer_arm(struct stmmac_fpe_cfg *fpe_cfg) -{ - if (fpe_cfg->pmac_enabled && fpe_cfg->tx_enabled && - fpe_cfg->verify_enabled && - fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_FAILED && - fpe_cfg->status != ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED) { - timer_setup(&fpe_cfg->verify_timer, stmmac_fpe_verify_timer, 0); - mod_timer(&fpe_cfg->verify_timer, jiffies); - } -} - -void stmmac_fpe_apply(struct stmmac_priv *priv) -{ - struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; - - /* If verification is disabled, configure FPE right away. - * Otherwise let the timer code do it. - */ - if (!fpe_cfg->verify_enabled) { - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - fpe_cfg->tx_enabled, - fpe_cfg->pmac_enabled); - } else { - fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_INITIAL; - fpe_cfg->verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES; - - if (netif_running(priv->dev)) - stmmac_fpe_verify_timer_arm(fpe_cfg); - } -} - static int stmmac_xdp_rx_timestamp(const struct xdp_md *_ctx, u64 *timestamp) { const struct stmmac_xdp_buff *ctx = (void *)_ctx; @@ -7711,11 +7570,7 @@ int stmmac_dvr_probe(struct device *device, mutex_init(&priv->lock); - priv->fpe_cfg.verify_retries = STMMAC_FPE_MM_MAX_VERIFY_RETRIES; - priv->fpe_cfg.verify_time = STMMAC_FPE_MM_MAX_VERIFY_TIME_MS; - priv->fpe_cfg.status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; - timer_setup(&priv->fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0); - spin_lock_init(&priv->fpe_cfg.lock); + stmmac_fpe_init(priv); /* If a specific clk_csr value is passed from the platform * this means that the CSR Clock Range selection cannot be -- 2.51.0 From 61e6051f4bbb635e3f800fcf30fefb6a4a42cd2b Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:29 +0800 Subject: [PATCH 12/16] net: stmmac: Rework macro definitions for gmac4 and xgmac Rename and add macro definitions to better reuse them in common code. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/510b85288b13aa2cce5adf849291009c6f29a84a.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 77 ++++++++++--------- 1 file changed, 39 insertions(+), 38 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index 8cfb5bccfa52..41c9cccfb5de 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -9,23 +9,23 @@ #include "dwmac5.h" #include "dwxgmac2.h" -#define MAC_FPE_CTRL_STS 0x00000234 -#define TRSP BIT(19) -#define TVER BIT(18) -#define RRSP BIT(17) -#define RVER BIT(16) -#define SRSP BIT(2) -#define SVER BIT(1) -#define EFPE BIT(0) - -#define MTL_FPE_CTRL_STS 0x00000c90 +#define GMAC5_MAC_FPE_CTRL_STS 0x00000234 +#define XGMAC_MAC_FPE_CTRL_STS 0x00000280 + +#define GMAC5_MTL_FPE_CTRL_STS 0x00000c90 +#define XGMAC_MTL_FPE_CTRL_STS 0x00001090 /* Preemption Classification */ -#define DWMAC5_PREEMPTION_CLASS GENMASK(15, 8) +#define FPE_MTL_PREEMPTION_CLASS GENMASK(15, 8) /* Additional Fragment Size of preempted frames */ -#define DWMAC5_ADD_FRAG_SZ GENMASK(1, 0) +#define FPE_MTL_ADD_FRAG_SZ GENMASK(1, 0) -#define XGMAC_FPE_CTRL_STS 0x00000280 -#define XGMAC_EFPE BIT(0) +#define STMMAC_MAC_FPE_CTRL_STS_TRSP BIT(19) +#define STMMAC_MAC_FPE_CTRL_STS_TVER BIT(18) +#define STMMAC_MAC_FPE_CTRL_STS_RRSP BIT(17) +#define STMMAC_MAC_FPE_CTRL_STS_RVER BIT(16) +#define STMMAC_MAC_FPE_CTRL_STS_SRSP BIT(2) +#define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) +#define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, u32 num_txq, u32 num_rxq, @@ -34,7 +34,7 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, u32 value; if (tx_enable) { - cfg->fpe_csr = EFPE; + cfg->fpe_csr = STMMAC_MAC_FPE_CTRL_STS_EFPE; value = readl(ioaddr + GMAC_RXQ_CTRL1); value &= ~GMAC_RXQCTRL_FPRQ; value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; @@ -42,14 +42,14 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, } else { cfg->fpe_csr = 0; } - writel(cfg->fpe_csr, ioaddr + MAC_FPE_CTRL_STS); + writel(cfg->fpe_csr, ioaddr + GMAC5_MAC_FPE_CTRL_STS); value = readl(ioaddr + GMAC_INT_EN); if (pmac_enable) { if (!(value & GMAC_INT_FPE_EN)) { /* Dummy read to clear any pending masked interrupts */ - readl(ioaddr + MAC_FPE_CTRL_STS); + readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); value |= GMAC_INT_FPE_EN; } @@ -66,11 +66,11 @@ void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, u32 value = cfg->fpe_csr; if (type == MPACKET_VERIFY) - value |= SVER; + value |= STMMAC_MAC_FPE_CTRL_STS_SVER; else if (type == MPACKET_RESPONSE) - value |= SRSP; + value |= STMMAC_MAC_FPE_CTRL_STS_SRSP; - writel(value, ioaddr + MAC_FPE_CTRL_STS); + writel(value, ioaddr + GMAC5_MAC_FPE_CTRL_STS); } void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) @@ -112,24 +112,24 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) /* Reads from the MAC_FPE_CTRL_STS register should only be performed * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" */ - value = readl(ioaddr + MAC_FPE_CTRL_STS); + value = readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); - if (value & TRSP) { + if (value & STMMAC_MAC_FPE_CTRL_STS_TRSP) { status |= FPE_EVENT_TRSP; netdev_dbg(dev, "FPE: Respond mPacket is transmitted\n"); } - if (value & TVER) { + if (value & STMMAC_MAC_FPE_CTRL_STS_TVER) { status |= FPE_EVENT_TVER; netdev_dbg(dev, "FPE: Verify mPacket is transmitted\n"); } - if (value & RRSP) { + if (value & STMMAC_MAC_FPE_CTRL_STS_RRSP) { status |= FPE_EVENT_RRSP; netdev_dbg(dev, "FPE: Respond mPacket is received\n"); } - if (value & RVER) { + if (value & STMMAC_MAC_FPE_CTRL_STS_RVER) { status |= FPE_EVENT_RVER; netdev_dbg(dev, "FPE: Verify mPacket is received\n"); } @@ -261,16 +261,17 @@ void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) { - return FIELD_GET(DWMAC5_ADD_FRAG_SZ, readl(ioaddr + MTL_FPE_CTRL_STS)); + return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, + readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS)); } void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) { u32 value; - value = readl(ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(value, add_frag_size, DWMAC5_ADD_FRAG_SZ), - ioaddr + MTL_FPE_CTRL_STS); + value = readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS); + writel(u32_replace_bits(value, add_frag_size, FPE_MTL_ADD_FRAG_SZ), + ioaddr + GMAC5_MTL_FPE_CTRL_STS); } #define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mapping" @@ -321,9 +322,9 @@ int dwmac5_fpe_map_preemption_class(struct net_device *ndev, } update_mapping: - val = readl(priv->ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(val, preemptible_txqs, DWMAC5_PREEMPTION_CLASS), - priv->ioaddr + MTL_FPE_CTRL_STS); + val = readl(priv->ioaddr + GMAC5_MTL_FPE_CTRL_STS); + writel(u32_replace_bits(val, preemptible_txqs, FPE_MTL_PREEMPTION_CLASS), + priv->ioaddr + GMAC5_MTL_FPE_CTRL_STS); return 0; } @@ -335,11 +336,11 @@ void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, u32 value; if (!tx_enable) { - value = readl(ioaddr + XGMAC_FPE_CTRL_STS); + value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); - value &= ~XGMAC_EFPE; + value &= ~STMMAC_MAC_FPE_CTRL_STS_EFPE; - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); + writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); return; } @@ -348,7 +349,7 @@ void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; writel(value, ioaddr + XGMAC_RXQ_CTRL1); - value = readl(ioaddr + XGMAC_FPE_CTRL_STS); - value |= XGMAC_EFPE; - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); + value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); + value |= STMMAC_MAC_FPE_CTRL_STS_EFPE; + writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); } -- 2.51.0 From af478ca822042a18fbb07eac856eff35ecfe2e7f Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:30 +0800 Subject: [PATCH 13/16] net: stmmac: Introduce stmmac_fpe_supported() A single "priv->dma_cap.fpesel" checks HW capability only, while both HW capability and driver capability shall be checked by later refactoring to prevent unexpected behavior for FPE on unsupported MAC cores and keep FPE as an optional implementation for current and new MAC cores. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/01e9cd13aedd38cb0e9a5d9875c475ce35250188.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 5 +++++ drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 10 +++++----- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 2792a4c6cbcd..704019e2755b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -1271,7 +1271,7 @@ static int stmmac_get_mm(struct net_device *ndev, unsigned long flags; u32 frag_size; - if (!priv->dma_cap.fpesel) + if (!stmmac_fpe_supported(priv)) return -EOPNOTSUPP; spin_lock_irqsave(&priv->fpe_cfg.lock, flags); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index 41c9cccfb5de..2b99033f9425 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -27,6 +27,11 @@ #define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) #define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) +bool stmmac_fpe_supported(struct stmmac_priv *priv) +{ + return priv->dma_cap.fpesel; +} + void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, u32 num_txq, u32 num_rxq, bool tx_enable, bool pmac_enable) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h index 25725fd5182f..fc9d869f9b6a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h @@ -23,6 +23,7 @@ struct stmmac_fpe_cfg; void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up); void stmmac_fpe_event_status(struct stmmac_priv *priv, int status); +bool stmmac_fpe_supported(struct stmmac_priv *priv); void stmmac_fpe_init(struct stmmac_priv *priv); void stmmac_fpe_apply(struct stmmac_priv *priv); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 20bd5440abca..342edec8b507 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -978,7 +978,7 @@ static void stmmac_mac_link_down(struct phylink_config *config, priv->eee_enabled = stmmac_eee_init(priv); stmmac_set_eee_pls(priv, priv->hw, false); - if (priv->dma_cap.fpesel) + if (stmmac_fpe_supported(priv)) stmmac_fpe_link_state_handle(priv, false); } @@ -1092,7 +1092,7 @@ static void stmmac_mac_link_up(struct phylink_config *config, stmmac_set_eee_pls(priv, priv->hw, true); } - if (priv->dma_cap.fpesel) + if (stmmac_fpe_supported(priv)) stmmac_fpe_link_state_handle(priv, true); if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY) @@ -4040,7 +4040,7 @@ static int stmmac_release(struct net_device *dev) stmmac_release_ptp(priv); - if (priv->dma_cap.fpesel) + if (stmmac_fpe_supported(priv)) timer_shutdown_sync(&priv->fpe_cfg.verify_timer); pm_runtime_put(priv->device); @@ -5955,7 +5955,7 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv) stmmac_est_irq_status(priv, priv, priv->dev, &priv->xstats, tx_cnt); - if (priv->dma_cap.fpesel) { + if (stmmac_fpe_supported(priv)) { int status = stmmac_fpe_irq_status(priv, priv->ioaddr, priv->dev); @@ -7745,7 +7745,7 @@ int stmmac_suspend(struct device *dev) } rtnl_unlock(); - if (priv->dma_cap.fpesel) + if (stmmac_fpe_supported(priv)) timer_shutdown_sync(&priv->fpe_cfg.verify_timer); priv->speed = SPEED_UNKNOWN; -- 2.51.0 From c9cd9a5a834c27b3ac7989505e7fa9299520f2c5 Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:31 +0800 Subject: [PATCH 14/16] net: stmmac: Refactor FPE functions to generic version FPE implementation for DWMAC4 and DWXGMAC differs only for: 1) Offset address of MAC_FPE_CTRL_STS and MTL_FPE_CTRL_STS 2) FPRQ(Frame Preemption Residue Queue) field in MAC_RxQ_Ctrl1 3) Bit offset of Frame Preemption Interrupt Enable Refactor FPE functions to avoid code duplication and to simplify the code flow by avoiding the use of function pointers. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/49de4607bae69ffe751b13329a3c07a990b82419.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 - .../net/ethernet/stmicro/stmmac/dwmac4_core.c | 10 -- .../net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- .../ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 - drivers/net/ethernet/stmicro/stmmac/hwif.c | 7 + drivers/net/ethernet/stmicro/stmmac/hwif.h | 20 +-- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 + .../ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 162 ++++++++++-------- .../net/ethernet/stmicro/stmmac/stmmac_fpe.h | 25 +-- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 8 +- 11 files changed, 105 insertions(+), 137 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 28fff6cab812..0c050324997a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -69,7 +69,6 @@ #define GMAC_RXQCTRL_TACPQE BIT(21) #define GMAC_RXQCTRL_TACPQE_SHIFT 21 #define GMAC_RXQCTRL_FPRQ GENMASK(26, 24) -#define GMAC_RXQCTRL_FPRQ_SHIFT 24 /* MAC Packet Filtering */ #define GMAC_PACKET_FILTER_PR BIT(0) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c index 4d217926820a..c25781874aa7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c @@ -1262,11 +1262,6 @@ const struct stmmac_ops dwmac410_ops = { .set_arp_offload = dwmac4_set_arp_offload, .config_l3_filter = dwmac4_config_l3_filter, .config_l4_filter = dwmac4_config_l4_filter, - .fpe_configure = dwmac5_fpe_configure, - .fpe_send_mpacket = dwmac5_fpe_send_mpacket, - .fpe_irq_status = dwmac5_fpe_irq_status, - .fpe_get_add_frag_size = dwmac5_fpe_get_add_frag_size, - .fpe_set_add_frag_size = dwmac5_fpe_set_add_frag_size, .fpe_map_preemption_class = dwmac5_fpe_map_preemption_class, .add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr, .del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr, @@ -1317,11 +1312,6 @@ const struct stmmac_ops dwmac510_ops = { .set_arp_offload = dwmac4_set_arp_offload, .config_l3_filter = dwmac4_config_l3_filter, .config_l4_filter = dwmac4_config_l4_filter, - .fpe_configure = dwmac5_fpe_configure, - .fpe_send_mpacket = dwmac5_fpe_send_mpacket, - .fpe_irq_status = dwmac5_fpe_irq_status, - .fpe_get_add_frag_size = dwmac5_fpe_get_add_frag_size, - .fpe_set_add_frag_size = dwmac5_fpe_set_add_frag_size, .fpe_map_preemption_class = dwmac5_fpe_map_preemption_class, .add_hw_vlan_rx_fltr = dwmac4_add_hw_vlan_rx_fltr, .del_hw_vlan_rx_fltr = dwmac4_del_hw_vlan_rx_fltr, diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 917796293c26..efd47db05dbc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -85,7 +85,6 @@ #define XGMAC_MCBCQ GENMASK(11, 8) #define XGMAC_MCBCQ_SHIFT 8 #define XGMAC_RQ GENMASK(7, 4) -#define XGMAC_RQ_SHIFT 4 #define XGMAC_UPQ GENMASK(3, 0) #define XGMAC_UPQ_SHIFT 0 #define XGMAC_RXQ_CTRL2 0x000000a8 @@ -96,6 +95,7 @@ #define XGMAC_LPIIS BIT(5) #define XGMAC_PMTIS BIT(4) #define XGMAC_INT_EN 0x000000b4 +#define XGMAC_FPEIE BIT(15) #define XGMAC_TSIE BIT(12) #define XGMAC_LPIIE BIT(5) #define XGMAC_PMTIE BIT(4) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index 111ba5a524ed..de6ffda31a80 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -1545,7 +1545,6 @@ const struct stmmac_ops dwxgmac210_ops = { .config_l3_filter = dwxgmac2_config_l3_filter, .config_l4_filter = dwxgmac2_config_l4_filter, .set_arp_offload = dwxgmac2_set_arp_offload, - .fpe_configure = dwxgmac3_fpe_configure, }; static void dwxlgmac2_rx_queue_enable(struct mac_device_info *hw, u8 mode, @@ -1602,7 +1601,6 @@ const struct stmmac_ops dwxlgmac2_ops = { .config_l3_filter = dwxgmac2_config_l3_filter, .config_l4_filter = dwxgmac2_config_l4_filter, .set_arp_offload = dwxgmac2_set_arp_offload, - .fpe_configure = dwxgmac3_fpe_configure, }; int dwxgmac2_setup(struct stmmac_priv *priv) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.c b/drivers/net/ethernet/stmicro/stmmac/hwif.c index 88cce28b2f98..cfc50289aed6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.c +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.c @@ -6,6 +6,7 @@ #include "common.h" #include "stmmac.h" +#include "stmmac_fpe.h" #include "stmmac_ptp.h" #include "stmmac_est.h" @@ -185,6 +186,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac4_dma_ops, @@ -205,6 +207,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac410_dma_ops, @@ -225,6 +228,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_GMAC4_OFFSET, .mmc_off = MMC_GMAC4_OFFSET, .est_off = EST_GMAC4_OFFSET, + .fpe_reg = &dwmac5_fpe_reg, }, .desc = &dwmac4_desc_ops, .dma = &dwmac410_dma_ops, @@ -246,6 +250,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_XGMAC_OFFSET, .mmc_off = MMC_XGMAC_OFFSET, .est_off = EST_XGMAC_OFFSET, + .fpe_reg = &dwxgmac3_fpe_reg, }, .desc = &dwxgmac210_desc_ops, .dma = &dwxgmac210_dma_ops, @@ -267,6 +272,7 @@ static const struct stmmac_hwif_entry { .ptp_off = PTP_XGMAC_OFFSET, .mmc_off = MMC_XGMAC_OFFSET, .est_off = EST_XGMAC_OFFSET, + .fpe_reg = &dwxgmac3_fpe_reg, }, .desc = &dwxgmac210_desc_ops, .dma = &dwxgmac210_dma_ops, @@ -353,6 +359,7 @@ int stmmac_hwif_init(struct stmmac_priv *priv) mac->est = mac->est ? : entry->est; priv->hw = mac; + priv->fpe_cfg.reg = entry->regs.fpe_reg; priv->ptpaddr = priv->ioaddr + entry->regs.ptp_off; priv->mmcaddr = priv->ioaddr + entry->regs.mmc_off; if (entry->est) diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index d5a9f01ecac5..64f8ed67dcc4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -420,15 +420,6 @@ struct stmmac_ops { bool en, bool udp, bool sa, bool inv, u32 match); void (*set_arp_offload)(struct mac_device_info *hw, bool en, u32 addr); - void (*fpe_configure)(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); - void (*fpe_send_mpacket)(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type); - int (*fpe_irq_status)(void __iomem *ioaddr, struct net_device *dev); - int (*fpe_get_add_frag_size)(const void __iomem *ioaddr); - void (*fpe_set_add_frag_size)(void __iomem *ioaddr, u32 add_frag_size); int (*fpe_map_preemption_class)(struct net_device *ndev, struct netlink_ext_ack *extack, u32 pclass); @@ -530,16 +521,6 @@ struct stmmac_ops { stmmac_do_callback(__priv, mac, config_l4_filter, __args) #define stmmac_set_arp_offload(__priv, __args...) \ stmmac_do_void_callback(__priv, mac, set_arp_offload, __args) -#define stmmac_fpe_configure(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_configure, __args) -#define stmmac_fpe_send_mpacket(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_send_mpacket, __args) -#define stmmac_fpe_irq_status(__priv, __args...) \ - stmmac_do_callback(__priv, mac, fpe_irq_status, __args) -#define stmmac_fpe_get_add_frag_size(__priv, __args...) \ - stmmac_do_callback(__priv, mac, fpe_get_add_frag_size, __args) -#define stmmac_fpe_set_add_frag_size(__priv, __args...) \ - stmmac_do_void_callback(__priv, mac, fpe_set_add_frag_size, __args) #define stmmac_fpe_map_preemption_class(__priv, __args...) \ stmmac_do_void_callback(__priv, mac, fpe_map_preemption_class, __args) @@ -678,6 +659,7 @@ struct stmmac_est_ops { stmmac_do_void_callback(__priv, est, irq_status, __args) struct stmmac_regs_off { + const struct stmmac_fpe_reg *fpe_reg; u32 ptp_off; u32 mmc_off; u32 est_off; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index 816b979e72cc..1d86439b8a14 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -152,6 +152,7 @@ struct stmmac_fpe_cfg { */ spinlock_t lock; + const struct stmmac_fpe_reg *reg; u32 fpe_csr; /* MAC_FPE_CTRL_STS reg cache */ enum ethtool_mm_verify_status status; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 704019e2755b..1d77389ce953 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -1294,7 +1294,7 @@ static int stmmac_get_mm(struct net_device *ndev, else state->tx_active = false; - frag_size = stmmac_fpe_get_add_frag_size(priv, priv->ioaddr); + frag_size = stmmac_fpe_get_add_frag_size(priv); state->tx_min_frag_size = ethtool_mm_frag_size_add_to_min(frag_size); spin_unlock_irqrestore(&priv->fpe_cfg.lock, flags); @@ -1329,7 +1329,7 @@ static int stmmac_set_mm(struct net_device *ndev, struct ethtool_mm_cfg *cfg, if (!cfg->verify_enabled) fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; - stmmac_fpe_set_add_frag_size(priv, priv->ioaddr, frag_size); + stmmac_fpe_set_add_frag_size(priv, frag_size); stmmac_fpe_apply(priv); spin_unlock_irqrestore(&fpe_cfg->lock, flags); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index 2b99033f9425..affb68604b96 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -27,58 +27,80 @@ #define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) #define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) +/* FPE link-partner hand-shaking mPacket type */ +enum stmmac_mpacket_type { + MPACKET_VERIFY = 0, + MPACKET_RESPONSE = 1, +}; + +struct stmmac_fpe_reg { + const u32 mac_fpe_reg; /* offset of MAC_FPE_CTRL_STS */ + const u32 mtl_fpe_reg; /* offset of MTL_FPE_CTRL_STS */ + const u32 rxq_ctrl1_reg; /* offset of MAC_RxQ_Ctrl1 */ + const u32 fprq_mask; /* Frame Preemption Residue Queue */ + const u32 int_en_reg; /* offset of MAC_Interrupt_Enable */ + const u32 int_en_bit; /* Frame Preemption Interrupt Enable */ +}; + bool stmmac_fpe_supported(struct stmmac_priv *priv) { - return priv->dma_cap.fpesel; + return priv->dma_cap.fpesel && priv->fpe_cfg.reg && + priv->hw->mac->fpe_map_preemption_class; } -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) +static void stmmac_fpe_configure(struct stmmac_priv *priv, bool tx_enable, + bool pmac_enable) { + struct stmmac_fpe_cfg *cfg = &priv->fpe_cfg; + const struct stmmac_fpe_reg *reg = cfg->reg; + u32 num_rxq = priv->plat->rx_queues_to_use; + void __iomem *ioaddr = priv->ioaddr; u32 value; if (tx_enable) { cfg->fpe_csr = STMMAC_MAC_FPE_CTRL_STS_EFPE; - value = readl(ioaddr + GMAC_RXQ_CTRL1); - value &= ~GMAC_RXQCTRL_FPRQ; - value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; - writel(value, ioaddr + GMAC_RXQ_CTRL1); + value = readl(ioaddr + reg->rxq_ctrl1_reg); + value &= ~reg->fprq_mask; + /* Keep this SHIFT, FIELD_PREP() expects a constant mask :-/ */ + value |= (num_rxq - 1) << __ffs(reg->fprq_mask); + writel(value, ioaddr + reg->rxq_ctrl1_reg); } else { cfg->fpe_csr = 0; } - writel(cfg->fpe_csr, ioaddr + GMAC5_MAC_FPE_CTRL_STS); + writel(cfg->fpe_csr, ioaddr + reg->mac_fpe_reg); - value = readl(ioaddr + GMAC_INT_EN); + value = readl(ioaddr + reg->int_en_reg); if (pmac_enable) { - if (!(value & GMAC_INT_FPE_EN)) { + if (!(value & reg->int_en_bit)) { /* Dummy read to clear any pending masked interrupts */ - readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); + readl(ioaddr + reg->mac_fpe_reg); - value |= GMAC_INT_FPE_EN; + value |= reg->int_en_bit; } } else { - value &= ~GMAC_INT_FPE_EN; + value &= ~reg->int_en_bit; } - writel(value, ioaddr + GMAC_INT_EN); + writel(value, ioaddr + reg->int_en_reg); } -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type) +static void stmmac_fpe_send_mpacket(struct stmmac_priv *priv, + enum stmmac_mpacket_type type) { - u32 value = cfg->fpe_csr; + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + u32 value = priv->fpe_cfg.fpe_csr; if (type == MPACKET_VERIFY) value |= STMMAC_MAC_FPE_CTRL_STS_SVER; else if (type == MPACKET_RESPONSE) value |= STMMAC_MAC_FPE_CTRL_STS_SRSP; - writel(value, ioaddr + GMAC5_MAC_FPE_CTRL_STS); + writel(value, ioaddr + reg->mac_fpe_reg); } -void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) +static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) { struct stmmac_fpe_cfg *fpe_cfg = &priv->fpe_cfg; @@ -90,8 +112,7 @@ void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) /* LP has sent verify mPacket */ if ((status & FPE_EVENT_RVER) == FPE_EVENT_RVER) - stmmac_fpe_send_mpacket(priv, priv->ioaddr, fpe_cfg, - MPACKET_RESPONSE); + stmmac_fpe_send_mpacket(priv, MPACKET_RESPONSE); /* Local has sent verify mPacket */ if ((status & FPE_EVENT_TVER) == FPE_EVENT_TVER && @@ -107,17 +128,18 @@ unlock_out: spin_unlock(&fpe_cfg->lock); } -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) +void stmmac_fpe_irq_status(struct stmmac_priv *priv) { + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + struct net_device *dev = priv->dev; + int status = FPE_EVENT_UNKNOWN; u32 value; - int status; - - status = FPE_EVENT_UNKNOWN; /* Reads from the MAC_FPE_CTRL_STS register should only be performed * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" */ - value = readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); + value = readl(ioaddr + reg->mac_fpe_reg); if (value & STMMAC_MAC_FPE_CTRL_STS_TRSP) { status |= FPE_EVENT_TRSP; @@ -139,7 +161,7 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) netdev_dbg(dev, "FPE: Verify mPacket is received\n"); } - return status; + stmmac_fpe_event_status(priv, status); } /** @@ -164,8 +186,7 @@ static void stmmac_fpe_verify_timer(struct timer_list *t) case ETHTOOL_MM_VERIFY_STATUS_INITIAL: case ETHTOOL_MM_VERIFY_STATUS_VERIFYING: if (fpe_cfg->verify_retries != 0) { - stmmac_fpe_send_mpacket(priv, priv->ioaddr, - fpe_cfg, MPACKET_VERIFY); + stmmac_fpe_send_mpacket(priv, MPACKET_VERIFY); rearm = true; } else { fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_FAILED; @@ -175,10 +196,7 @@ static void stmmac_fpe_verify_timer(struct timer_list *t) break; case ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED: - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - true, true); + stmmac_fpe_configure(priv, true, true); break; default: @@ -211,6 +229,10 @@ void stmmac_fpe_init(struct stmmac_priv *priv) priv->fpe_cfg.status = ETHTOOL_MM_VERIFY_STATUS_DISABLED; timer_setup(&priv->fpe_cfg.verify_timer, stmmac_fpe_verify_timer, 0); spin_lock_init(&priv->fpe_cfg.lock); + + if ((!priv->fpe_cfg.reg || !priv->hw->mac->fpe_map_preemption_class) && + priv->dma_cap.fpesel) + dev_info(priv->device, "FPE is not supported by driver.\n"); } void stmmac_fpe_apply(struct stmmac_priv *priv) @@ -221,10 +243,7 @@ void stmmac_fpe_apply(struct stmmac_priv *priv) * Otherwise let the timer code do it. */ if (!fpe_cfg->verify_enabled) { - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - fpe_cfg->tx_enabled, + stmmac_fpe_configure(priv, fpe_cfg->tx_enabled, fpe_cfg->pmac_enabled); } else { fpe_cfg->status = ETHTOOL_MM_VERIFY_STATUS_INITIAL; @@ -246,37 +265,35 @@ void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) if (is_up && fpe_cfg->pmac_enabled) { /* VERIFY process requires pmac enabled when NIC comes up */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, true); + stmmac_fpe_configure(priv, false, true); /* New link => maybe new partner => new verification process */ stmmac_fpe_apply(priv); } else { /* No link => turn off EFPE */ - stmmac_fpe_configure(priv, priv->ioaddr, fpe_cfg, - priv->plat->tx_queues_to_use, - priv->plat->rx_queues_to_use, - false, false); + stmmac_fpe_configure(priv, false, false); } spin_unlock_irqrestore(&fpe_cfg->lock, flags); } -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) +int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv) { - return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, - readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS)); + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; + + return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, readl(ioaddr + reg->mtl_fpe_reg)); } -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) +void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_size) { + const struct stmmac_fpe_reg *reg = priv->fpe_cfg.reg; + void __iomem *ioaddr = priv->ioaddr; u32 value; - value = readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS); + value = readl(ioaddr + reg->mtl_fpe_reg); writel(u32_replace_bits(value, add_frag_size, FPE_MTL_ADD_FRAG_SZ), - ioaddr + GMAC5_MTL_FPE_CTRL_STS); + ioaddr + reg->mtl_fpe_reg); } #define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mapping" @@ -334,27 +351,20 @@ update_mapping: return 0; } -void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable) -{ - u32 value; - - if (!tx_enable) { - value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); - - value &= ~STMMAC_MAC_FPE_CTRL_STS_EFPE; - - writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); - return; - } - - value = readl(ioaddr + XGMAC_RXQ_CTRL1); - value &= ~XGMAC_RQ; - value |= (num_rxq - 1) << XGMAC_RQ_SHIFT; - writel(value, ioaddr + XGMAC_RXQ_CTRL1); - - value = readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); - value |= STMMAC_MAC_FPE_CTRL_STS_EFPE; - writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); -} +const struct stmmac_fpe_reg dwmac5_fpe_reg = { + .mac_fpe_reg = GMAC5_MAC_FPE_CTRL_STS, + .mtl_fpe_reg = GMAC5_MTL_FPE_CTRL_STS, + .rxq_ctrl1_reg = GMAC_RXQ_CTRL1, + .fprq_mask = GMAC_RXQCTRL_FPRQ, + .int_en_reg = GMAC_INT_EN, + .int_en_bit = GMAC_INT_FPE_EN, +}; + +const struct stmmac_fpe_reg dwxgmac3_fpe_reg = { + .mac_fpe_reg = XGMAC_MAC_FPE_CTRL_STS, + .mtl_fpe_reg = XGMAC_MTL_FPE_CTRL_STS, + .rxq_ctrl1_reg = XGMAC_RXQ_CTRL1, + .fprq_mask = XGMAC_RQ, + .int_en_reg = XGMAC_INT_EN, + .int_en_bit = XGMAC_FPEIE, +}; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h index fc9d869f9b6a..b5a896d315bf 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.h @@ -12,35 +12,20 @@ #define STMMAC_FPE_MM_MAX_VERIFY_RETRIES 3 #define STMMAC_FPE_MM_MAX_VERIFY_TIME_MS 128 -/* FPE link-partner hand-shaking mPacket type */ -enum stmmac_mpacket_type { - MPACKET_VERIFY = 0, - MPACKET_RESPONSE = 1, -}; - struct stmmac_priv; -struct stmmac_fpe_cfg; void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up); -void stmmac_fpe_event_status(struct stmmac_priv *priv, int status); bool stmmac_fpe_supported(struct stmmac_priv *priv); void stmmac_fpe_init(struct stmmac_priv *priv); void stmmac_fpe_apply(struct stmmac_priv *priv); +void stmmac_fpe_irq_status(struct stmmac_priv *priv); +int stmmac_fpe_get_add_frag_size(struct stmmac_priv *priv); +void stmmac_fpe_set_add_frag_size(struct stmmac_priv *priv, u32 add_frag_size); -void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); -void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, - struct stmmac_fpe_cfg *cfg, - enum stmmac_mpacket_type type); -int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev); -int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr); -void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size); int dwmac5_fpe_map_preemption_class(struct net_device *ndev, struct netlink_ext_ack *extack, u32 pclass); -void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg, - u32 num_txq, u32 num_rxq, - bool tx_enable, bool pmac_enable); +extern const struct stmmac_fpe_reg dwmac5_fpe_reg; +extern const struct stmmac_fpe_reg dwxgmac3_fpe_reg; #endif diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 342edec8b507..12f0db0e8830 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -5955,12 +5955,8 @@ static void stmmac_common_interrupt(struct stmmac_priv *priv) stmmac_est_irq_status(priv, priv, priv->dev, &priv->xstats, tx_cnt); - if (stmmac_fpe_supported(priv)) { - int status = stmmac_fpe_irq_status(priv, priv->ioaddr, - priv->dev); - - stmmac_fpe_event_status(priv, status); - } + if (stmmac_fpe_supported(priv)) + stmmac_fpe_irq_status(priv); /* To handle GMAC own interrupts */ if ((priv->plat->has_gmac) || xmac) { -- 2.51.0 From 2558fe30ae8bfc178284e29e9adb2ecac69db139 Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:32 +0800 Subject: [PATCH 15/16] net: stmmac: Get the TC number of net_device by netdev_get_num_tc() netdev_get_num_tc() is the right method, we should not access net_device.num_tc directly. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/6298463f4655a76faf94e4273a4205c13ca17c77.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index affb68604b96..ab717c9bba41 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -304,7 +304,7 @@ int dwmac5_fpe_map_preemption_class(struct net_device *ndev, { u32 val, offset, count, queue_weight, preemptible_txqs = 0; struct stmmac_priv *priv = netdev_priv(ndev); - u32 num_tc = ndev->num_tc; + int num_tc = netdev_get_num_tc(ndev); if (!pclass) goto update_mapping; -- 2.51.0 From df9e7b0250ad4149b7523e89d3d523a74eea4927 Mon Sep 17 00:00:00 2001 From: Furong Xu <0x1207@gmail.com> Date: Fri, 1 Nov 2024 21:31:33 +0800 Subject: [PATCH 16/16] net: stmmac: xgmac: Rename XGMAC_RQ to XGMAC_FPRQ Synopsys XGMAC Databook defines MAC_RxQ_Ctrl1 register: RQ: Frame Preemption Residue Queue XGMAC_FPRQ is more readable and more consistent with GMAC4. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/611991edf9e9d6fac8b29c3fe952791b193ca179.1730449003.git.0x1207@gmail.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index efd47db05dbc..a04a79003692 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -84,7 +84,7 @@ #define XGMAC_MCBCQEN BIT(15) #define XGMAC_MCBCQ GENMASK(11, 8) #define XGMAC_MCBCQ_SHIFT 8 -#define XGMAC_RQ GENMASK(7, 4) +#define XGMAC_FPRQ GENMASK(7, 4) #define XGMAC_UPQ GENMASK(3, 0) #define XGMAC_UPQ_SHIFT 0 #define XGMAC_RXQ_CTRL2 0x000000a8 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c index ab717c9bba41..5ccdc6887b28 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -364,7 +364,7 @@ const struct stmmac_fpe_reg dwxgmac3_fpe_reg = { .mac_fpe_reg = XGMAC_MAC_FPE_CTRL_STS, .mtl_fpe_reg = XGMAC_MTL_FPE_CTRL_STS, .rxq_ctrl1_reg = XGMAC_RXQ_CTRL1, - .fprq_mask = XGMAC_RQ, + .fprq_mask = XGMAC_FPRQ, .int_en_reg = XGMAC_INT_EN, .int_en_bit = XGMAC_FPEIE, }; -- 2.51.0