From 8824dc7f947ac5916cf166bb8289af48c2b50bc7 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andr=C3=A9=20Draszik?= Date: Fri, 9 May 2025 14:22:41 +0100 Subject: [PATCH 01/16] nvmem: max77759: Add Maxim MAX77759 NVMEM driver MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The Maxim MAX77759 is a companion PMIC for USB Type-C applications and includes Battery Charger, Fuel Gauge, temperature sensors, USB Type-C Port Controller (TCPC), NVMEM, and a GPIO expander. This driver exposes the non volatile memory using the platform device registered by the core MFD driver. Signed-off-by: André Draszik Acked-by: Srinivas Kandagatla Acked-by: Peter Griffin Link: https://lore.kernel.org/r/20250509-max77759-mfd-v10-3-962ac15ee3ef@linaro.org Signed-off-by: Lee Jones --- MAINTAINERS | 1 + drivers/nvmem/Kconfig | 12 +++ drivers/nvmem/Makefile | 2 + drivers/nvmem/max77759-nvmem.c | 145 +++++++++++++++++++++++++++++++++ 4 files changed, 160 insertions(+) create mode 100644 drivers/nvmem/max77759-nvmem.c diff --git a/MAINTAINERS b/MAINTAINERS index 5c5ff0ea4030..1fe7d9e8e44d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14582,6 +14582,7 @@ S: Maintained F: Documentation/devicetree/bindings/*/maxim,max77759*.yaml F: drivers/gpio/gpio-max77759.c F: drivers/mfd/max77759.c +F: drivers/nvmem/max77759-nvmem.c F: include/linux/mfd/max77759.h MAXIM MAX77802 PMIC REGULATOR DEVICE DRIVER diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 8671b7c974b9..3de07ef52490 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -154,6 +154,18 @@ config NVMEM_LPC18XX_OTP To compile this driver as a module, choose M here: the module will be called nvmem_lpc18xx_otp. +config NVMEM_MAX77759 + tristate "Maxim Integrated MAX77759 NVMEM Support" + depends on MFD_MAX77759 + default MFD_MAX77759 + help + Say Y here to include support for the user-accessible storage found + in Maxim Integrated MAX77759 PMICs. This IC provides space for 30 + bytes of storage. + + This driver can also be built as a module. If so, the module + will be called nvmem-max77759. + config NVMEM_MESON_EFUSE tristate "Amlogic Meson GX eFuse Support" depends on (ARCH_MESON || COMPILE_TEST) && MESON_SM diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 5b77bbb6488b..a9d03cfbbd27 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -34,6 +34,8 @@ obj-$(CONFIG_NVMEM_LPC18XX_EEPROM) += nvmem_lpc18xx_eeprom.o nvmem_lpc18xx_eeprom-y := lpc18xx_eeprom.o obj-$(CONFIG_NVMEM_LPC18XX_OTP) += nvmem_lpc18xx_otp.o nvmem_lpc18xx_otp-y := lpc18xx_otp.o +obj-$(CONFIG_NVMEM_MAX77759) += nvmem-max77759.o +nvmem-max77759-y := max77759-nvmem.o obj-$(CONFIG_NVMEM_MESON_EFUSE) += nvmem_meson_efuse.o nvmem_meson_efuse-y := meson-efuse.o obj-$(CONFIG_NVMEM_MESON_MX_EFUSE) += nvmem_meson_mx_efuse.o diff --git a/drivers/nvmem/max77759-nvmem.c b/drivers/nvmem/max77759-nvmem.c new file mode 100644 index 000000000000..c9961ad0e232 --- /dev/null +++ b/drivers/nvmem/max77759-nvmem.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright 2020 Google Inc +// Copyright 2025 Linaro Ltd. +// +// NVMEM driver for Maxim MAX77759 + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MAX77759_NVMEM_OPCODE_HEADER_LEN 3 +/* + * NVMEM commands have a three byte header (which becomes part of the command), + * so we need to subtract that. + */ +#define MAX77759_NVMEM_SIZE (MAX77759_MAXQ_OPCODE_MAXLENGTH \ + - MAX77759_NVMEM_OPCODE_HEADER_LEN) + +struct max77759_nvmem { + struct device *dev; + struct max77759 *max77759; +}; + +static int max77759_nvmem_reg_read(void *priv, unsigned int offset, + void *val, size_t bytes) +{ + struct max77759_nvmem *nvmem = priv; + DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, + MAX77759_NVMEM_OPCODE_HEADER_LEN); + DEFINE_FLEX(struct max77759_maxq_response, rsp, rsp, length, + MAX77759_MAXQ_OPCODE_MAXLENGTH); + int ret; + + cmd->cmd[0] = MAX77759_MAXQ_OPCODE_USER_SPACE_READ; + cmd->cmd[1] = offset; + cmd->cmd[2] = bytes; + rsp->length = bytes + MAX77759_NVMEM_OPCODE_HEADER_LEN; + + ret = max77759_maxq_command(nvmem->max77759, cmd, rsp); + if (ret < 0) + return ret; + + if (memcmp(cmd->cmd, rsp->rsp, MAX77759_NVMEM_OPCODE_HEADER_LEN)) { + dev_warn(nvmem->dev, "protocol error (read)\n"); + return -EIO; + } + + memcpy(val, &rsp->rsp[MAX77759_NVMEM_OPCODE_HEADER_LEN], bytes); + + return 0; +} + +static int max77759_nvmem_reg_write(void *priv, unsigned int offset, + void *val, size_t bytes) +{ + struct max77759_nvmem *nvmem = priv; + DEFINE_FLEX(struct max77759_maxq_command, cmd, cmd, length, + MAX77759_MAXQ_OPCODE_MAXLENGTH); + DEFINE_FLEX(struct max77759_maxq_response, rsp, rsp, length, + MAX77759_MAXQ_OPCODE_MAXLENGTH); + int ret; + + cmd->cmd[0] = MAX77759_MAXQ_OPCODE_USER_SPACE_WRITE; + cmd->cmd[1] = offset; + cmd->cmd[2] = bytes; + memcpy(&cmd->cmd[MAX77759_NVMEM_OPCODE_HEADER_LEN], val, bytes); + cmd->length = bytes + MAX77759_NVMEM_OPCODE_HEADER_LEN; + rsp->length = cmd->length; + + ret = max77759_maxq_command(nvmem->max77759, cmd, rsp); + if (ret < 0) + return ret; + + if (memcmp(cmd->cmd, rsp->rsp, cmd->length)) { + dev_warn(nvmem->dev, "protocol error (write)\n"); + return -EIO; + } + + return 0; +} + +static int max77759_nvmem_probe(struct platform_device *pdev) +{ + struct nvmem_config config = { + .dev = &pdev->dev, + .name = dev_name(&pdev->dev), + .id = NVMEM_DEVID_NONE, + .type = NVMEM_TYPE_EEPROM, + .ignore_wp = true, + .size = MAX77759_NVMEM_SIZE, + .word_size = sizeof(u8), + .stride = sizeof(u8), + .reg_read = max77759_nvmem_reg_read, + .reg_write = max77759_nvmem_reg_write, + }; + struct max77759_nvmem *nvmem; + + nvmem = devm_kzalloc(&pdev->dev, sizeof(*nvmem), GFP_KERNEL); + if (!nvmem) + return -ENOMEM; + + nvmem->dev = &pdev->dev; + nvmem->max77759 = dev_get_drvdata(pdev->dev.parent); + + config.priv = nvmem; + + return PTR_ERR_OR_ZERO(devm_nvmem_register(config.dev, &config)); +} + +static const struct of_device_id max77759_nvmem_of_id[] = { + { .compatible = "maxim,max77759-nvmem", }, + { } +}; +MODULE_DEVICE_TABLE(of, max77759_nvmem_of_id); + +static const struct platform_device_id max77759_nvmem_platform_id[] = { + { "max77759-nvmem", }, + { } +}; +MODULE_DEVICE_TABLE(platform, max77759_nvmem_platform_id); + +static struct platform_driver max77759_nvmem_driver = { + .driver = { + .name = "max77759-nvmem", + .probe_type = PROBE_PREFER_ASYNCHRONOUS, + .of_match_table = max77759_nvmem_of_id, + }, + .probe = max77759_nvmem_probe, + .id_table = max77759_nvmem_platform_id, +}; + +module_platform_driver(max77759_nvmem_driver); + +MODULE_AUTHOR("André Draszik "); +MODULE_DESCRIPTION("NVMEM driver for Maxim MAX77759"); +MODULE_LICENSE("GPL"); -- 2.51.0 From 3f9ce9d0760ad68a9c20167664d026d91da66879 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 29 Apr 2025 14:51:27 +0200 Subject: [PATCH 02/16] dt-bindings: mfd: stm32-lptimer: Add support for stm32mp25 Add a new stm32mp25 compatible to stm32-lptimer dt-bindings, to support STM32MP25 SoC. Some features has been updated or added to the low-power timer: - new capture compare channels - up to two PWM channels - PWM input capture - peripheral interconnect in stm32mp25 has been updated (new triggers). - registers/bits has been added or revisited (IER access). So introduce a new compatible to handle this diversity. Signed-off-by: Fabrice Gasnier Reviewed-by: "Rob Herring (Arm)" Link: https://lore.kernel.org/r/20250429125133.1574167-2-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones --- .../bindings/mfd/st,stm32-lptimer.yaml | 40 ++++++++++++++++--- 1 file changed, 34 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index d41308856408..4eabafb8079d 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -21,7 +21,12 @@ maintainers: properties: compatible: - const: st,stm32-lptimer + oneOf: + - items: + - const: st,stm32mp25-lptimer + - const: st,stm32-lptimer + - items: + - const: st,stm32-lptimer reg: maxItems: 1 @@ -48,13 +53,21 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + pwm: type: object additionalProperties: false properties: compatible: - const: st,stm32-pwm-lp + oneOf: + - items: + - const: st,stm32mp25-pwm-lp + - const: st,stm32-pwm-lp + - items: + - const: st,stm32-pwm-lp "#pwm-cells": const: 3 @@ -69,7 +82,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-counter + oneOf: + - items: + - const: st,stm32mp25-lptimer-counter + - const: st,stm32-lptimer-counter + - items: + - const: st,stm32-lptimer-counter required: - compatible @@ -80,7 +98,12 @@ properties: properties: compatible: - const: st,stm32-lptimer-timer + oneOf: + - items: + - const: st,stm32mp25-lptimer-timer + - const: st,stm32-lptimer-timer + - items: + - const: st,stm32-lptimer-timer required: - compatible @@ -92,13 +115,18 @@ patternProperties: properties: compatible: - const: st,stm32-lptimer-trigger + oneOf: + - items: + - const: st,stm32mp25-lptimer-trigger + - const: st,stm32-lptimer-trigger + - items: + - const: st,stm32-lptimer-trigger reg: description: Identify trigger hardware block. items: minimum: 0 - maximum: 2 + maximum: 4 required: - compatible -- 2.51.0 From 4f8ceb0302b36c5f78bcc8d0e7cfa2372fba134c Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 29 Apr 2025 14:51:28 +0200 Subject: [PATCH 03/16] mfd: stm32-lptimer: Add support for stm32mp25 Add support for STM32MP25 SoC. A new hardware configuration register (HWCFGR2) has been added, to gather number of capture/compare channels, autonomous mode and input capture capability. The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a smaller set of features. This can now be read from HWCFGR registers. Add new registers to the stm32-lptimer.h: CCMR1, CCR2, HWCFGR1/2 and VERR. Update the stm32_lptimer data struct so signal the number of capture/compare channels to the child devices. Also Remove some unused bit masks (CMPOK_ARROK / CMPOKCF_ARROKCF). Signed-off-by: Fabrice Gasnier Link: https://lore.kernel.org/r/20250429125133.1574167-3-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones --- drivers/mfd/stm32-lptimer.c | 33 ++++++++++++++++++++++++++- include/linux/mfd/stm32-lptimer.h | 37 ++++++++++++++++++++++++++++--- 2 files changed, 66 insertions(+), 4 deletions(-) diff --git a/drivers/mfd/stm32-lptimer.c b/drivers/mfd/stm32-lptimer.c index b2704a9809c7..09073dbc9c80 100644 --- a/drivers/mfd/stm32-lptimer.c +++ b/drivers/mfd/stm32-lptimer.c @@ -6,6 +6,7 @@ * Inspired by Benjamin Gaignard's stm32-timers driver */ +#include #include #include #include @@ -49,6 +50,36 @@ static int stm32_lptimer_detect_encoder(struct stm32_lptimer *ddata) return 0; } +static int stm32_lptimer_detect_hwcfgr(struct stm32_lptimer *ddata) +{ + u32 val; + int ret; + + ret = regmap_read(ddata->regmap, STM32_LPTIM_VERR, &ddata->version); + if (ret) + return ret; + + /* Try to guess parameters from HWCFGR: e.g. encoder mode (STM32MP15) */ + ret = regmap_read(ddata->regmap, STM32_LPTIM_HWCFGR1, &val); + if (ret) + return ret; + + /* Fallback to legacy init if HWCFGR isn't present */ + if (!val) + return stm32_lptimer_detect_encoder(ddata); + + ddata->has_encoder = FIELD_GET(STM32_LPTIM_HWCFGR1_ENCODER, val); + + ret = regmap_read(ddata->regmap, STM32_LPTIM_HWCFGR2, &val); + if (ret) + return ret; + + /* Number of capture/compare channels */ + ddata->num_cc_chans = FIELD_GET(STM32_LPTIM_HWCFGR2_CHAN_NUM, val); + + return 0; +} + static int stm32_lptimer_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -73,7 +104,7 @@ static int stm32_lptimer_probe(struct platform_device *pdev) if (IS_ERR(ddata->clk)) return PTR_ERR(ddata->clk); - ret = stm32_lptimer_detect_encoder(ddata); + ret = stm32_lptimer_detect_hwcfgr(ddata); if (ret) return ret; diff --git a/include/linux/mfd/stm32-lptimer.h b/include/linux/mfd/stm32-lptimer.h index 06d3f11dc3c9..a592c8dc716d 100644 --- a/include/linux/mfd/stm32-lptimer.h +++ b/include/linux/mfd/stm32-lptimer.h @@ -17,20 +17,30 @@ #define STM32_LPTIM_IER 0x08 /* Interrupt Enable Reg */ #define STM32_LPTIM_CFGR 0x0C /* Configuration Reg */ #define STM32_LPTIM_CR 0x10 /* Control Reg */ -#define STM32_LPTIM_CMP 0x14 /* Compare Reg */ +#define STM32_LPTIM_CMP 0x14 /* Compare Reg (MP25 CCR1) */ #define STM32_LPTIM_ARR 0x18 /* Autoreload Reg */ #define STM32_LPTIM_CNT 0x1C /* Counter Reg */ +#define STM32_LPTIM_CCMR1 0x2C /* Capture/Compare Mode MP25 */ +#define STM32_LPTIM_CCR2 0x34 /* Compare Reg2 MP25 */ + +#define STM32_LPTIM_HWCFGR2 0x3EC /* Hardware configuration register 2 - MP25 */ +#define STM32_LPTIM_HWCFGR1 0x3F0 /* Hardware configuration register 1 - MP15 */ +#define STM32_LPTIM_VERR 0x3F4 /* Version identification register - MP15 */ /* STM32_LPTIM_ISR - bit fields */ +#define STM32_LPTIM_DIEROK_ARROK (BIT(24) | BIT(4)) /* MP25 */ +#define STM32_LPTIM_CMP2_ARROK (BIT(19) | BIT(4)) #define STM32_LPTIM_CMPOK_ARROK GENMASK(4, 3) #define STM32_LPTIM_ARROK BIT(4) #define STM32_LPTIM_CMPOK BIT(3) /* STM32_LPTIM_ICR - bit fields */ -#define STM32_LPTIM_ARRMCF BIT(1) +#define STM32_LPTIM_DIEROKCF_ARROKCF (BIT(24) | BIT(4)) /* MP25 */ +#define STM32_LPTIM_CMP2OKCF_ARROKCF (BIT(19) | BIT(4)) #define STM32_LPTIM_CMPOKCF_ARROKCF GENMASK(4, 3) +#define STM32_LPTIM_ARRMCF BIT(1) -/* STM32_LPTIM_IER - bit flieds */ +/* STM32_LPTIM_IER - bit fields */ #define STM32_LPTIM_ARRMIE BIT(1) /* STM32_LPTIM_CR - bit fields */ @@ -53,16 +63,37 @@ /* STM32_LPTIM_ARR */ #define STM32_LPTIM_MAX_ARR 0xFFFF +/* STM32_LPTIM_CCMR1 */ +#define STM32_LPTIM_CC2P GENMASK(19, 18) +#define STM32_LPTIM_CC2E BIT(17) +#define STM32_LPTIM_CC2SEL BIT(16) +#define STM32_LPTIM_CC1P GENMASK(3, 2) +#define STM32_LPTIM_CC1E BIT(1) +#define STM32_LPTIM_CC1SEL BIT(0) + +/* STM32_LPTIM_HWCFGR1 */ +#define STM32_LPTIM_HWCFGR1_ENCODER BIT(16) + +/* STM32_LPTIM_HWCFGR2 */ +#define STM32_LPTIM_HWCFGR2_CHAN_NUM GENMASK(3, 0) + +/* STM32_LPTIM_VERR */ +#define STM32_LPTIM_VERR_23 0x23 /* STM32MP25 */ + /** * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device * @clk: clock reference for this instance * @regmap: register map reference for this instance * @has_encoder: indicates this Low-Power Timer supports encoder mode + * @num_cc_chans: indicates the number of capture/compare channels + * @version: indicates the major and minor revision of the controller */ struct stm32_lptimer { struct clk *clk; struct regmap *regmap; bool has_encoder; + unsigned int num_cc_chans; + u32 version; }; #endif -- 2.51.0 From 5414bc8c57c41038b1994cd21a2cc0b8415c1544 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 29 Apr 2025 14:51:29 +0200 Subject: [PATCH 04/16] clocksource/drivers/stm32-lptimer: Add support for stm32mp25 On stm32mp25, DIER (former IER) must only be modified when the lptimer is enabled. On earlier SoCs, it must be only be modified when it is disabled. There's also a new DIEROK flag, to ensure register access has completed. Add a new "set_evt" routine to be used on stm32mp25, called depending on the version register, read by the MFD core (LPTIM_VERR). Signed-off-by: Patrick Delaunay Signed-off-by: Fabrice Gasnier Acked-by: Daniel Lezcano Link: https://lore.kernel.org/r/20250429125133.1574167-4-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones --- drivers/clocksource/timer-stm32-lp.c | 61 ++++++++++++++++++++++++++-- 1 file changed, 57 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/timer-stm32-lp.c b/drivers/clocksource/timer-stm32-lp.c index 928da2f6de69..6e7944ffd7c0 100644 --- a/drivers/clocksource/timer-stm32-lp.c +++ b/drivers/clocksource/timer-stm32-lp.c @@ -5,6 +5,7 @@ * Pascal Paillet for STMicroelectronics. */ +#include #include #include #include @@ -27,6 +28,7 @@ struct stm32_lp_private { u32 psc; struct device *dev; struct clk *clk; + u32 version; }; static struct stm32_lp_private* @@ -47,12 +49,46 @@ static int stm32_clkevent_lp_shutdown(struct clock_event_device *clkevt) return 0; } -static int stm32_clkevent_lp_set_timer(unsigned long evt, - struct clock_event_device *clkevt, - int is_periodic) +static int stm32mp25_clkevent_lp_set_evt(struct stm32_lp_private *priv, unsigned long evt) { - struct stm32_lp_private *priv = to_priv(clkevt); + int ret; + u32 val; + + regmap_read(priv->reg, STM32_LPTIM_CR, &val); + if (!FIELD_GET(STM32_LPTIM_ENABLE, val)) { + /* Enable LPTIMER to be able to write into IER and ARR registers */ + regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); + /* + * After setting the ENABLE bit, a delay of two counter clock cycles is needed + * before the LPTIM is actually enabled. For 32KHz rate, this makes approximately + * 62.5 micro-seconds, round it up. + */ + udelay(63); + } + /* set next event counter */ + regmap_write(priv->reg, STM32_LPTIM_ARR, evt); + /* enable ARR interrupt */ + regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE); + + /* Poll DIEROK and ARROK to ensure register access has completed */ + ret = regmap_read_poll_timeout_atomic(priv->reg, STM32_LPTIM_ISR, val, + (val & STM32_LPTIM_DIEROK_ARROK) == + STM32_LPTIM_DIEROK_ARROK, + 10, 500); + if (ret) { + dev_err(priv->dev, "access to LPTIM timed out\n"); + /* Disable LPTIMER */ + regmap_write(priv->reg, STM32_LPTIM_CR, 0); + return ret; + } + /* Clear DIEROK and ARROK flags */ + regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_DIEROKCF_ARROKCF); + return 0; +} + +static void stm32_clkevent_lp_set_evt(struct stm32_lp_private *priv, unsigned long evt) +{ /* disable LPTIMER to be able to write into IER register*/ regmap_write(priv->reg, STM32_LPTIM_CR, 0); /* enable ARR interrupt */ @@ -61,6 +97,22 @@ static int stm32_clkevent_lp_set_timer(unsigned long evt, regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); /* set next event counter */ regmap_write(priv->reg, STM32_LPTIM_ARR, evt); +} + +static int stm32_clkevent_lp_set_timer(unsigned long evt, + struct clock_event_device *clkevt, + int is_periodic) +{ + struct stm32_lp_private *priv = to_priv(clkevt); + int ret; + + if (priv->version == STM32_LPTIM_VERR_23) { + ret = stm32mp25_clkevent_lp_set_evt(priv, evt); + if (ret) + return ret; + } else { + stm32_clkevent_lp_set_evt(priv, evt); + } /* start counter */ if (is_periodic) @@ -176,6 +228,7 @@ static int stm32_clkevent_lp_probe(struct platform_device *pdev) return -ENOMEM; priv->reg = ddata->regmap; + priv->version = ddata->version; priv->clk = ddata->clk; ret = clk_prepare_enable(priv->clk); if (ret) -- 2.51.0 From 3f51b232c1da8e59eb562f1d81533334827a4799 Mon Sep 17 00:00:00 2001 From: Fabrice Gasnier Date: Tue, 29 Apr 2025 14:51:30 +0200 Subject: [PATCH 05/16] pwm: stm32-lp: Add support for stm32mp25 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Add support for STM32MP25 SoC. A new compatible has been added to the dt-bindings. It represents handle new features, registers and bits diversity. It isn't used currently in the driver, as matching is done by retrieving MFD parent data. New dedicated capture/compare channels has been added: e.g. a new compare register for channel 2. Some controls (polarity / cc channel enable) are handled in CCMR register on this new variant (instead of wavepol bit). So, Low-power timer can now have up to two PWM outputs. Use device data from the MFD parent to configure the number of PWM channels e.g. 'npwm'. Update current get_state() and apply() ops to support either: - one PWM channel (as on older revision, or LPTIM5 on STM32MP25) - two PWM channels (e.g. LPTIM1/2/3/4 on STM32MP25 that has the full feature set) Introduce new routines to manage common prescaler, reload register and global enable bit. Signed-off-by: Fabrice Gasnier Acked-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20250429125133.1574167-5-fabrice.gasnier@foss.st.com Signed-off-by: Lee Jones --- drivers/pwm/pwm-stm32-lp.c | 219 ++++++++++++++++++++++++++++++++----- 1 file changed, 193 insertions(+), 26 deletions(-) diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c index 5832dce8ed9d..4789eafb8bac 100644 --- a/drivers/pwm/pwm-stm32-lp.c +++ b/drivers/pwm/pwm-stm32-lp.c @@ -20,6 +20,7 @@ struct stm32_pwm_lp { struct clk *clk; struct regmap *regmap; + unsigned int num_cc_chans; }; static inline struct stm32_pwm_lp *to_stm32_pwm_lp(struct pwm_chip *chip) @@ -30,13 +31,101 @@ static inline struct stm32_pwm_lp *to_stm32_pwm_lp(struct pwm_chip *chip) /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */ #define STM32_LPTIM_MAX_PRESCALER 128 +static int stm32_pwm_lp_update_allowed(struct stm32_pwm_lp *priv, int channel) +{ + int ret; + u32 ccmr1; + unsigned long ccmr; + + /* Only one PWM on this LPTIMER: enable, prescaler and reload value can be changed */ + if (!priv->num_cc_chans) + return true; + + ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); + if (ret) + return ret; + ccmr = ccmr1 & (STM32_LPTIM_CC1E | STM32_LPTIM_CC2E); + + /* More than one channel enabled: enable, prescaler or ARR value can't be changed */ + if (bitmap_weight(&ccmr, sizeof(u32) * BITS_PER_BYTE) > 1) + return false; + + /* + * Only one channel is enabled (or none): check status on the other channel, to + * report if enable, prescaler or ARR value can be changed. + */ + if (channel) + return !(ccmr1 & STM32_LPTIM_CC1E); + else + return !(ccmr1 & STM32_LPTIM_CC2E); +} + +static int stm32_pwm_lp_compare_channel_apply(struct stm32_pwm_lp *priv, int channel, + bool enable, enum pwm_polarity polarity) +{ + u32 ccmr1, val, mask; + bool reenable; + int ret; + + /* No dedicated CC channel: nothing to do */ + if (!priv->num_cc_chans) + return 0; + + ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); + if (ret) + return ret; + + if (channel) { + /* Must disable CC channel (CCxE) to modify polarity (CCxP), then re-enable */ + reenable = (enable && FIELD_GET(STM32_LPTIM_CC2E, ccmr1)) && + (polarity != FIELD_GET(STM32_LPTIM_CC2P, ccmr1)); + + mask = STM32_LPTIM_CC2SEL | STM32_LPTIM_CC2E | STM32_LPTIM_CC2P; + val = FIELD_PREP(STM32_LPTIM_CC2P, polarity); + val |= FIELD_PREP(STM32_LPTIM_CC2E, enable); + } else { + reenable = (enable && FIELD_GET(STM32_LPTIM_CC1E, ccmr1)) && + (polarity != FIELD_GET(STM32_LPTIM_CC1P, ccmr1)); + + mask = STM32_LPTIM_CC1SEL | STM32_LPTIM_CC1E | STM32_LPTIM_CC1P; + val = FIELD_PREP(STM32_LPTIM_CC1P, polarity); + val |= FIELD_PREP(STM32_LPTIM_CC1E, enable); + } + + if (reenable) { + u32 cfgr, presc; + unsigned long rate; + unsigned int delay_us; + + ret = regmap_update_bits(priv->regmap, STM32_LPTIM_CCMR1, + channel ? STM32_LPTIM_CC2E : STM32_LPTIM_CC1E, 0); + if (ret) + return ret; + /* + * After a write to the LPTIM_CCMRx register, a new write operation can only be + * performed after a delay of at least (PRESC × 3) clock cycles + */ + ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); + if (ret) + return ret; + presc = FIELD_GET(STM32_LPTIM_PRESC, cfgr); + rate = clk_get_rate(priv->clk) >> presc; + if (!rate) + return -EINVAL; + delay_us = 3 * DIV_ROUND_UP(USEC_PER_SEC, rate); + usleep_range(delay_us, delay_us * 2); + } + + return regmap_update_bits(priv->regmap, STM32_LPTIM_CCMR1, mask, val); +} + static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { struct stm32_pwm_lp *priv = to_stm32_pwm_lp(chip); unsigned long long prd, div, dty; struct pwm_state cstate; - u32 val, mask, cfgr, presc = 0; + u32 arr, val, mask, cfgr, presc = 0; bool reenable; int ret; @@ -45,10 +134,28 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (!state->enabled) { if (cstate.enabled) { - /* Disable LP timer */ - ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); + /* Disable CC channel if any */ + ret = stm32_pwm_lp_compare_channel_apply(priv, pwm->hwpwm, false, + state->polarity); if (ret) return ret; + ret = regmap_write(priv->regmap, pwm->hwpwm ? + STM32_LPTIM_CCR2 : STM32_LPTIM_CMP, 0); + if (ret) + return ret; + + /* Check if the timer can be disabled */ + ret = stm32_pwm_lp_update_allowed(priv, pwm->hwpwm); + if (ret < 0) + return ret; + + if (ret) { + /* Disable LP timer */ + ret = regmap_write(priv->regmap, STM32_LPTIM_CR, 0); + if (ret) + return ret; + } + /* disable clock to PWM counter */ clk_disable(priv->clk); } @@ -79,6 +186,23 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, dty = prd * state->duty_cycle; do_div(dty, state->period); + ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); + if (ret) + return ret; + + /* + * When there are several channels, they share the same prescaler and reload value. + * Check if this can be changed, or the values are the same for all channels. + */ + if (!stm32_pwm_lp_update_allowed(priv, pwm->hwpwm)) { + ret = regmap_read(priv->regmap, STM32_LPTIM_ARR, &arr); + if (ret) + return ret; + + if ((FIELD_GET(STM32_LPTIM_PRESC, cfgr) != presc) || (arr != prd - 1)) + return -EBUSY; + } + if (!cstate.enabled) { /* enable clock to drive PWM counter */ ret = clk_enable(priv->clk); @@ -86,15 +210,20 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, return ret; } - ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); - if (ret) - goto err; - if ((FIELD_GET(STM32_LPTIM_PRESC, cfgr) != presc) || - (FIELD_GET(STM32_LPTIM_WAVPOL, cfgr) != state->polarity)) { + ((FIELD_GET(STM32_LPTIM_WAVPOL, cfgr) != state->polarity) && !priv->num_cc_chans)) { val = FIELD_PREP(STM32_LPTIM_PRESC, presc); - val |= FIELD_PREP(STM32_LPTIM_WAVPOL, state->polarity); - mask = STM32_LPTIM_PRESC | STM32_LPTIM_WAVPOL; + mask = STM32_LPTIM_PRESC; + + if (!priv->num_cc_chans) { + /* + * WAVPOL bit is only available when no capature compare channel is used, + * e.g. on LPTIMER instances that have only one output channel. CCMR1 is + * used otherwise. + */ + val |= FIELD_PREP(STM32_LPTIM_WAVPOL, state->polarity); + mask |= STM32_LPTIM_WAVPOL; + } /* Must disable LP timer to modify CFGR */ reenable = true; @@ -120,20 +249,27 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm, if (ret) goto err; - ret = regmap_write(priv->regmap, STM32_LPTIM_CMP, prd - (1 + dty)); + /* Write CMP/CCRx register and ensure it's been properly written */ + ret = regmap_write(priv->regmap, pwm->hwpwm ? STM32_LPTIM_CCR2 : STM32_LPTIM_CMP, + prd - (1 + dty)); if (ret) goto err; - /* ensure CMP & ARR registers are properly written */ - ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, + /* ensure ARR and CMP/CCRx registers are properly written */ + ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, pwm->hwpwm ? + (val & STM32_LPTIM_CMP2_ARROK) == STM32_LPTIM_CMP2_ARROK : (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK, 100, 1000); if (ret) { dev_err(pwmchip_parent(chip), "ARR/CMP registers write issue\n"); goto err; } - ret = regmap_write(priv->regmap, STM32_LPTIM_ICR, - STM32_LPTIM_CMPOKCF_ARROKCF); + ret = regmap_write(priv->regmap, STM32_LPTIM_ICR, pwm->hwpwm ? + STM32_LPTIM_CMP2OKCF_ARROKCF : STM32_LPTIM_CMPOKCF_ARROKCF); + if (ret) + goto err; + + ret = stm32_pwm_lp_compare_channel_apply(priv, pwm->hwpwm, true, state->polarity); if (ret) goto err; @@ -161,11 +297,22 @@ static int stm32_pwm_lp_get_state(struct pwm_chip *chip, { struct stm32_pwm_lp *priv = to_stm32_pwm_lp(chip); unsigned long rate = clk_get_rate(priv->clk); - u32 val, presc, prd; + u32 val, presc, prd, ccmr1; + bool enabled; u64 tmp; regmap_read(priv->regmap, STM32_LPTIM_CR, &val); - state->enabled = !!FIELD_GET(STM32_LPTIM_ENABLE, val); + enabled = !!FIELD_GET(STM32_LPTIM_ENABLE, val); + if (priv->num_cc_chans) { + /* There's a CC chan, need to also check if it's enabled */ + regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); + if (pwm->hwpwm) + enabled &= !!FIELD_GET(STM32_LPTIM_CC2E, ccmr1); + else + enabled &= !!FIELD_GET(STM32_LPTIM_CC1E, ccmr1); + } + state->enabled = enabled; + /* Keep PWM counter clock refcount in sync with PWM initial state */ if (state->enabled) { int ret = clk_enable(priv->clk); @@ -176,14 +323,21 @@ static int stm32_pwm_lp_get_state(struct pwm_chip *chip, regmap_read(priv->regmap, STM32_LPTIM_CFGR, &val); presc = FIELD_GET(STM32_LPTIM_PRESC, val); - state->polarity = FIELD_GET(STM32_LPTIM_WAVPOL, val); + if (priv->num_cc_chans) { + if (pwm->hwpwm) + state->polarity = FIELD_GET(STM32_LPTIM_CC2P, ccmr1); + else + state->polarity = FIELD_GET(STM32_LPTIM_CC1P, ccmr1); + } else { + state->polarity = FIELD_GET(STM32_LPTIM_WAVPOL, val); + } regmap_read(priv->regmap, STM32_LPTIM_ARR, &prd); tmp = prd + 1; tmp = (tmp << presc) * NSEC_PER_SEC; state->period = DIV_ROUND_CLOSEST_ULL(tmp, rate); - regmap_read(priv->regmap, STM32_LPTIM_CMP, &val); + regmap_read(priv->regmap, pwm->hwpwm ? STM32_LPTIM_CCR2 : STM32_LPTIM_CMP, &val); tmp = prd - val; tmp = (tmp << presc) * NSEC_PER_SEC; state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, rate); @@ -201,15 +355,25 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev) struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent); struct stm32_pwm_lp *priv; struct pwm_chip *chip; + unsigned int npwm; int ret; - chip = devm_pwmchip_alloc(&pdev->dev, 1, sizeof(*priv)); + if (!ddata->num_cc_chans) { + /* No dedicated CC channel, so there's only one PWM channel */ + npwm = 1; + } else { + /* There are dedicated CC channels, each with one PWM output */ + npwm = ddata->num_cc_chans; + } + + chip = devm_pwmchip_alloc(&pdev->dev, npwm, sizeof(*priv)); if (IS_ERR(chip)) return PTR_ERR(chip); priv = to_stm32_pwm_lp(chip); priv->regmap = ddata->regmap; priv->clk = ddata->clk; + priv->num_cc_chans = ddata->num_cc_chans; chip->ops = &stm32_pwm_lp_ops; ret = devm_pwmchip_add(&pdev->dev, chip); @@ -225,12 +389,15 @@ static int stm32_pwm_lp_suspend(struct device *dev) { struct pwm_chip *chip = dev_get_drvdata(dev); struct pwm_state state; - - pwm_get_state(&chip->pwms[0], &state); - if (state.enabled) { - dev_err(dev, "The consumer didn't stop us (%s)\n", - chip->pwms[0].label); - return -EBUSY; + unsigned int i; + + for (i = 0; i < chip->npwm; i++) { + pwm_get_state(&chip->pwms[i], &state); + if (state.enabled) { + dev_err(dev, "The consumer didn't stop us (%s)\n", + chip->pwms[i].label); + return -EBUSY; + } } return pinctrl_pm_select_sleep_state(dev); -- 2.51.0 From 9d56594f3ebf6ea4b23884412d3fde11f39518d2 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:28 +0200 Subject: [PATCH 06/16] dt-bindings: mfd: brcm,bcm59056: Convert to YAML Convert devicetree bindings for the Broadcom BCM59056 PMU MFD from TXT to YAML format. This patch does not change any functionality; the bindings remain the same. The bindings have been split into two parts: the MFD binding and a separate binding for the regulator node, to simplify the addition of other models later (which have different regulators). Signed-off-by: Artur Weber Reviewed-by: "Rob Herring (Arm)" Reviewed-by: Stanislav Jakubek Link: https://lore.kernel.org/r/20250515-bcm59054-v9-1-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- .../devicetree/bindings/mfd/brcm,bcm59056.txt | 39 -------------- .../bindings/mfd/brcm,bcm59056.yaml | 54 +++++++++++++++++++ .../bindings/regulator/brcm,bcm59056.yaml | 51 ++++++++++++++++++ 3 files changed, 105 insertions(+), 39 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm59056.txt create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml create mode 100644 Documentation/devicetree/bindings/regulator/brcm,bcm59056.yaml diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm59056.txt b/Documentation/devicetree/bindings/mfd/brcm,bcm59056.txt deleted file mode 100644 index be51a15e05f9..000000000000 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm59056.txt +++ /dev/null @@ -1,39 +0,0 @@ -------------------------------- -BCM590xx Power Management Units -------------------------------- - -Required properties: -- compatible: "brcm,bcm59056" -- reg: I2C slave address -- interrupts: interrupt for the PMU. Generic interrupt client node bindings - are described in interrupt-controller/interrupts.txt - ------------------- -Voltage Regulators ------------------- - -Optional child nodes: -- regulators: container node for regulators following the generic - regulator binding in regulator/regulator.txt - - The valid regulator node names for BCM59056 are: - rfldo, camldo1, camldo2, simldo1, simldo2, sdldo, sdxldo, - mmcldo1, mmcldo2, audldo, micldo, usbldo, vibldo, - csr, iosr1, iosr2, msr, sdsr1, sdsr2, vsr, - gpldo1, gpldo2, gpldo3, gpldo4, gpldo5, gpldo6, - vbus - -Example: - pmu: bcm59056@8 { - compatible = "brcm,bcm59056"; - reg = <0x08>; - interrupts = ; - regulators { - rfldo_reg: rfldo { - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - }; - - ... - }; - }; diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml new file mode 100644 index 000000000000..b387ef9885c3 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/brcm,bcm59056.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM590xx Power Management Units + +maintainers: + - Artur Weber + +properties: + compatible: + const: brcm,bcm59056 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + regulators: + type: object + $ref: /schemas/regulator/brcm,bcm59056.yaml# + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@8 { + compatible = "brcm,bcm59056"; + reg = <0x08>; + interrupts = ; + + regulators { + rfldo { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/brcm,bcm59056.yaml b/Documentation/devicetree/bindings/regulator/brcm,bcm59056.yaml new file mode 100644 index 000000000000..7a5e36394d21 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/brcm,bcm59056.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/brcm,bcm59056.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM59056 Power Management Unit regulators + +description: | + This is a part of device tree bindings for the BCM59056 power + management unit. + + See Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml for + additional information and example. + +maintainers: + - Artur Weber + +patternProperties: + "^(cam|sim|mmc)ldo[1-2]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(rf|sd|sdx|aud|mic|usb|vib)ldo$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(c|m|v)sr$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(io|sd)sr[1-2]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^gpldo[1-6]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +properties: + vbus: + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +additionalProperties: false -- 2.51.0 From 13980ebf8e9431975fe834df9df31dea39cb9a45 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:29 +0200 Subject: [PATCH 07/16] dt-bindings: mfd: brcm,bcm59056: Add compatible for BCM59054 The BCM59054 MFD is fairly similar to the BCM59056, and will use the same driver. Add compatible and specify the allowed regulator nodes. Signed-off-by: Artur Weber Reviewed-by: "Rob Herring (Arm)" Reviewed-by: Stanislav Jakubek Link: https://lore.kernel.org/r/20250515-bcm59054-v9-2-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- .../bindings/mfd/brcm,bcm59056.yaml | 26 ++++++++- .../bindings/regulator/brcm,bcm59054.yaml | 56 +++++++++++++++++++ 2 files changed, 80 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/regulator/brcm,bcm59054.yaml diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml index b387ef9885c3..b67d7a723fc2 100644 --- a/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml +++ b/Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml @@ -11,7 +11,9 @@ maintainers: properties: compatible: - const: brcm,bcm59056 + enum: + - brcm,bcm59054 + - brcm,bcm59056 reg: maxItems: 1 @@ -21,7 +23,6 @@ properties: regulators: type: object - $ref: /schemas/regulator/brcm,bcm59056.yaml# required: - compatible @@ -30,6 +31,27 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: brcm,bcm59054 + then: + properties: + regulators: + $ref: /schemas/regulator/brcm,bcm59054.yaml# + + - if: + properties: + compatible: + contains: + const: brcm,bcm59056 + then: + properties: + regulators: + $ref: /schemas/regulator/brcm,bcm59056.yaml# + examples: - | #include diff --git a/Documentation/devicetree/bindings/regulator/brcm,bcm59054.yaml b/Documentation/devicetree/bindings/regulator/brcm,bcm59054.yaml new file mode 100644 index 000000000000..5b46d7fca05e --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/brcm,bcm59054.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/brcm,bcm59054.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM59054 Power Management Unit regulators + +description: | + This is a part of device tree bindings for the BCM59054 power + management unit. + + See Documentation/devicetree/bindings/mfd/brcm,bcm59056.yaml for + additional information and example. + +maintainers: + - Artur Weber + +patternProperties: + "^(cam|sim|mmc)ldo[1-2]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(rf|sd|sdx|aud|mic|usb|vib|tcx)ldo$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(c|mm|v)sr$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^(io|sd)sr[1-2]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^gpldo[1-3]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + "^lvldo[1-2]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +properties: + vbus: + type: object + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + +additionalProperties: false -- 2.51.0 From 6adf48a3aa316ce360e02dd10222e96da9a0eff5 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:30 +0200 Subject: [PATCH 08/16] mfd: bcm590xx: Add support for multiple device types + BCM59054 compatible The BCM59054 is another chip from the BCM590xx line of PMUs, commonly used on devices with the BCM21664/BCM23550 chipsets. Prepare the BCM590xx driver for supporting other devices by adding the PMUID register values for supported chip types and store them in the MFD data struct as "pmu_id". (These will be checked against the actual PMUID register values in a later commit.) Then, add a DT compatible for the BCM59054, and provide the PMU ID as OF match data. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Link: https://lore.kernel.org/r/20250515-bcm59054-v9-3-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/bcm590xx.c | 12 +++++++++++- include/linux/mfd/bcm590xx.h | 7 +++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/bcm590xx.c b/drivers/mfd/bcm590xx.c index 8b56786d85d0..4620eed0066f 100644 --- a/drivers/mfd/bcm590xx.c +++ b/drivers/mfd/bcm590xx.c @@ -50,6 +50,8 @@ static int bcm590xx_i2c_probe(struct i2c_client *i2c_pri) bcm590xx->dev = &i2c_pri->dev; bcm590xx->i2c_pri = i2c_pri; + bcm590xx->pmu_id = (uintptr_t) of_device_get_match_data(bcm590xx->dev); + bcm590xx->regmap_pri = devm_regmap_init_i2c(i2c_pri, &bcm590xx_regmap_config_pri); if (IS_ERR(bcm590xx->regmap_pri)) { @@ -91,12 +93,20 @@ err: } static const struct of_device_id bcm590xx_of_match[] = { - { .compatible = "brcm,bcm59056" }, + { + .compatible = "brcm,bcm59054", + .data = (void *)BCM590XX_PMUID_BCM59054, + }, + { + .compatible = "brcm,bcm59056", + .data = (void *)BCM590XX_PMUID_BCM59056, + }, { } }; MODULE_DEVICE_TABLE(of, bcm590xx_of_match); static const struct i2c_device_id bcm590xx_i2c_id[] = { + { "bcm59054" }, { "bcm59056" }, { } }; diff --git a/include/linux/mfd/bcm590xx.h b/include/linux/mfd/bcm590xx.h index 6b8791da6119..76c30e629333 100644 --- a/include/linux/mfd/bcm590xx.h +++ b/include/linux/mfd/bcm590xx.h @@ -13,6 +13,10 @@ #include #include +/* PMU ID register values; also used as device type */ +#define BCM590XX_PMUID_BCM59054 0x54 +#define BCM590XX_PMUID_BCM59056 0x56 + /* max register address */ #define BCM590XX_MAX_REGISTER_PRI 0xe7 #define BCM590XX_MAX_REGISTER_SEC 0xf0 @@ -24,6 +28,9 @@ struct bcm590xx { struct regmap *regmap_pri; struct regmap *regmap_sec; unsigned int id; + + /* PMU ID value; also used as device type */ + u8 pmu_id; }; #endif /* __LINUX_MFD_BCM590XX_H */ -- 2.51.0 From d310cdbb4ee6285f374d4dfc32173c35f8a2273e Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:31 +0200 Subject: [PATCH 09/16] mfd: bcm590xx: Add PMU ID/revision parsing function The BCM590xx PMUs have two I2C registers for reading the PMU ID and revision. The revision is useful for subdevice drivers, since different revisions may have slight differences in behavior (for example - BCM59054 has different regulator configurations for revision A0 and A1). Check the PMU ID register and make sure it matches the DT compatible. Fetch the digital and analog revision from the PMUREV register so that it can be used in subdevice drivers. Also add some known revision values to bcm590xx.h, for convenience when writing subdevice drivers. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Link: https://lore.kernel.org/r/20250515-bcm59054-v9-4-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/mfd/bcm590xx.c | 54 ++++++++++++++++++++++++++++++++++++ include/linux/mfd/bcm590xx.h | 14 ++++++++++ 2 files changed, 68 insertions(+) diff --git a/drivers/mfd/bcm590xx.c b/drivers/mfd/bcm590xx.c index 4620eed0066f..5a8456bbd63f 100644 --- a/drivers/mfd/bcm590xx.c +++ b/drivers/mfd/bcm590xx.c @@ -17,6 +17,15 @@ #include #include +/* Under primary I2C address: */ +#define BCM590XX_REG_PMUID 0x1e + +#define BCM590XX_REG_PMUREV 0x1f +#define BCM590XX_PMUREV_DIG_MASK 0xF +#define BCM590XX_PMUREV_DIG_SHIFT 0 +#define BCM590XX_PMUREV_ANA_MASK 0xF0 +#define BCM590XX_PMUREV_ANA_SHIFT 4 + static const struct mfd_cell bcm590xx_devs[] = { { .name = "bcm590xx-vregs", @@ -37,6 +46,47 @@ static const struct regmap_config bcm590xx_regmap_config_sec = { .cache_type = REGCACHE_MAPLE, }; +/* Map PMU ID value to model name string */ +static const char * const bcm590xx_names[] = { + [BCM590XX_PMUID_BCM59054] = "BCM59054", + [BCM590XX_PMUID_BCM59056] = "BCM59056", +}; + +static int bcm590xx_parse_version(struct bcm590xx *bcm590xx) +{ + unsigned int id, rev; + int ret; + + /* Get PMU ID and verify that it matches compatible */ + ret = regmap_read(bcm590xx->regmap_pri, BCM590XX_REG_PMUID, &id); + if (ret) { + dev_err(bcm590xx->dev, "failed to read PMU ID: %d\n", ret); + return ret; + } + + if (id != bcm590xx->pmu_id) { + dev_err(bcm590xx->dev, "Incorrect ID for %s: expected %x, got %x.\n", + bcm590xx_names[bcm590xx->pmu_id], bcm590xx->pmu_id, id); + return -ENODEV; + } + + /* Get PMU revision and store it in the info struct */ + ret = regmap_read(bcm590xx->regmap_pri, BCM590XX_REG_PMUREV, &rev); + if (ret) { + dev_err(bcm590xx->dev, "failed to read PMU revision: %d\n", ret); + return ret; + } + + bcm590xx->rev_digital = (rev & BCM590XX_PMUREV_DIG_MASK) >> BCM590XX_PMUREV_DIG_SHIFT; + + bcm590xx->rev_analog = (rev & BCM590XX_PMUREV_ANA_MASK) >> BCM590XX_PMUREV_ANA_SHIFT; + + dev_dbg(bcm590xx->dev, "PMU ID 0x%x (%s), revision: digital %d, analog %d", + id, bcm590xx_names[id], bcm590xx->rev_digital, bcm590xx->rev_analog); + + return 0; +} + static int bcm590xx_i2c_probe(struct i2c_client *i2c_pri) { struct bcm590xx *bcm590xx; @@ -78,6 +128,10 @@ static int bcm590xx_i2c_probe(struct i2c_client *i2c_pri) goto err; } + ret = bcm590xx_parse_version(bcm590xx); + if (ret) + goto err; + ret = devm_mfd_add_devices(&i2c_pri->dev, -1, bcm590xx_devs, ARRAY_SIZE(bcm590xx_devs), NULL, 0, NULL); if (ret < 0) { diff --git a/include/linux/mfd/bcm590xx.h b/include/linux/mfd/bcm590xx.h index 76c30e629333..a54c50b2d2c8 100644 --- a/include/linux/mfd/bcm590xx.h +++ b/include/linux/mfd/bcm590xx.h @@ -17,6 +17,16 @@ #define BCM590XX_PMUID_BCM59054 0x54 #define BCM590XX_PMUID_BCM59056 0x56 +/* Known chip revision IDs */ +#define BCM59054_REV_DIGITAL_A1 1 +#define BCM59054_REV_ANALOG_A1 2 + +#define BCM59056_REV_DIGITAL_A0 1 +#define BCM59056_REV_ANALOG_A0 1 + +#define BCM59056_REV_DIGITAL_B0 2 +#define BCM59056_REV_ANALOG_B0 2 + /* max register address */ #define BCM590XX_MAX_REGISTER_PRI 0xe7 #define BCM590XX_MAX_REGISTER_SEC 0xf0 @@ -31,6 +41,10 @@ struct bcm590xx { /* PMU ID value; also used as device type */ u8 pmu_id; + + /* Chip revision, read from PMUREV reg */ + u8 rev_digital; + u8 rev_analog; }; #endif /* __LINUX_MFD_BCM590XX_H */ -- 2.51.0 From 37512643e1f889549e4f9632d6bccef6804cb776 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:32 +0200 Subject: [PATCH 10/16] regulator: bcm590xx: Use dev_err_probe for regulator register error Instead of calling dev_err() and returning PTR_ERR(...) separately, use a single "return dev_err_probe" statement. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20250515-bcm59054-v9-5-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/bcm590xx-regulator.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm590xx-regulator.c index 9f0cda46b015..a17311fa30e4 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -340,12 +340,10 @@ static int bcm590xx_probe(struct platform_device *pdev) rdev = devm_regulator_register(&pdev->dev, &pmu->desc[i], &config); - if (IS_ERR(rdev)) { - dev_err(bcm590xx->dev, - "failed to register %s regulator\n", - pdev->name); - return PTR_ERR(rdev); - } + if (IS_ERR(rdev)) + return dev_err_probe(bcm590xx->dev, PTR_ERR(rdev), + "failed to register %s regulator\n", + pdev->name); } return 0; -- 2.51.0 From 75dc12b4450269821fca4c8634f5185d28cf2117 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:33 +0200 Subject: [PATCH 11/16] regulator: bcm590xx: Store regulator descriptions in table Instead of filling in the regulator description programatically, store the data in a struct. This will make it a bit nicer to introduce support for other BCM590xx chips besides the BCM59056. To do this, add a new struct type, bcm590xx_reg_data, to store all of the necessary information. Drop the old IS_LDO, IS_GPLDO... macros in favor of the "type" field in this struct. Adapt the old bcm590xx_reg struct to the new types. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20250515-bcm59054-v9-6-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/bcm590xx-regulator.c | 473 +++++++++++++++++-------- include/linux/mfd/bcm590xx.h | 6 + 2 files changed, 322 insertions(+), 157 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm590xx-regulator.c index a17311fa30e4..c2427ea16662 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -20,6 +20,18 @@ /* I2C slave 0 registers */ #define BCM590XX_RFLDOPMCTRL1 0x60 +#define BCM590XX_CAMLDO1PMCTRL1 0x62 +#define BCM590XX_CAMLDO2PMCTRL1 0x64 +#define BCM590XX_SIMLDO1PMCTRL1 0x66 +#define BCM590XX_SIMLDO2PMCTRL1 0x68 +#define BCM590XX_SDLDOPMCTRL1 0x6a +#define BCM590XX_SDXLDOPMCTRL1 0x6c +#define BCM590XX_MMCLDO1PMCTRL1 0x6e +#define BCM590XX_MMCLDO2PMCTRL1 0x70 +#define BCM590XX_AUDLDOPMCTRL1 0x72 +#define BCM590XX_MICLDOPMCTRL1 0x74 +#define BCM590XX_USBLDOPMCTRL1 0x76 +#define BCM590XX_VIBLDOPMCTRL1 0x78 #define BCM590XX_IOSR1PMCTRL1 0x7a #define BCM590XX_IOSR2PMCTRL1 0x7c #define BCM590XX_CSRPMCTRL1 0x7e @@ -28,7 +40,25 @@ #define BCM590XX_MSRPMCTRL1 0x8a #define BCM590XX_VSRPMCTRL1 0x8e #define BCM590XX_RFLDOCTRL 0x96 +#define BCM590XX_CAMLDO1CTRL 0x97 +#define BCM590XX_CAMLDO2CTRL 0x98 +#define BCM590XX_SIMLDO1CTRL 0x99 +#define BCM590XX_SIMLDO2CTRL 0x9a +#define BCM590XX_SDLDOCTRL 0x9b +#define BCM590XX_SDXLDOCTRL 0x9c +#define BCM590XX_MMCLDO1CTRL 0x9d +#define BCM590XX_MMCLDO2CTRL 0x9e +#define BCM590XX_AUDLDOCTRL 0x9f +#define BCM590XX_MICLDOCTRL 0xa0 +#define BCM590XX_USBLDOCTRL 0xa1 +#define BCM590XX_VIBLDOCTRL 0xa2 #define BCM590XX_CSRVOUT1 0xc0 +#define BCM590XX_IOSR1VOUT1 0xc3 +#define BCM590XX_IOSR2VOUT1 0xc6 +#define BCM590XX_MSRVOUT1 0xc9 +#define BCM590XX_SDSR1VOUT1 0xcc +#define BCM590XX_SDSR2VOUT1 0xcf +#define BCM590XX_VSRVOUT1 0xd2 /* I2C slave 1 registers */ #define BCM590XX_GPLDO5PMCTRL1 0x16 @@ -94,11 +124,6 @@ #define BCM590XX_NUM_REGS 27 -#define BCM590XX_REG_IS_LDO(n) (n < BCM590XX_REG_CSR) -#define BCM590XX_REG_IS_GPLDO(n) \ - ((n > BCM590XX_REG_VSR) && (n < BCM590XX_REG_VBUS)) -#define BCM590XX_REG_IS_VBUS(n) (n == BCM590XX_REG_VBUS) - /* LDO group A: supported voltages in microvolts */ static const unsigned int ldo_a_table[] = { 1200000, 1800000, 2500000, 2700000, 2800000, @@ -111,10 +136,6 @@ static const unsigned int ldo_c_table[] = { 2900000, 3000000, 3300000, }; -static const unsigned int ldo_vbus[] = { - 5000000, -}; - /* DCDC group CSR: supported voltages in microvolts */ static const struct linear_range dcdc_csr_ranges[] = { REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), @@ -137,115 +158,25 @@ static const struct linear_range dcdc_sdsr1_ranges[] = { REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), }; -struct bcm590xx_info { - const char *name; - const char *vin_name; - u8 n_voltages; - const unsigned int *volt_table; - u8 n_linear_ranges; - const struct linear_range *linear_ranges; +enum bcm590xx_reg_type { + BCM590XX_REG_TYPE_LDO, + BCM590XX_REG_TYPE_GPLDO, + BCM590XX_REG_TYPE_SR, + BCM590XX_REG_TYPE_VBUS }; -#define BCM590XX_REG_TABLE(_name, _table) \ - { \ - .name = #_name, \ - .n_voltages = ARRAY_SIZE(_table), \ - .volt_table = _table, \ - } - -#define BCM590XX_REG_RANGES(_name, _ranges) \ - { \ - .name = #_name, \ - .n_voltages = 64, \ - .n_linear_ranges = ARRAY_SIZE(_ranges), \ - .linear_ranges = _ranges, \ - } - -static struct bcm590xx_info bcm590xx_regs[] = { - BCM590XX_REG_TABLE(rfldo, ldo_a_table), - BCM590XX_REG_TABLE(camldo1, ldo_c_table), - BCM590XX_REG_TABLE(camldo2, ldo_c_table), - BCM590XX_REG_TABLE(simldo1, ldo_a_table), - BCM590XX_REG_TABLE(simldo2, ldo_a_table), - BCM590XX_REG_TABLE(sdldo, ldo_c_table), - BCM590XX_REG_TABLE(sdxldo, ldo_a_table), - BCM590XX_REG_TABLE(mmcldo1, ldo_a_table), - BCM590XX_REG_TABLE(mmcldo2, ldo_a_table), - BCM590XX_REG_TABLE(audldo, ldo_a_table), - BCM590XX_REG_TABLE(micldo, ldo_a_table), - BCM590XX_REG_TABLE(usbldo, ldo_a_table), - BCM590XX_REG_TABLE(vibldo, ldo_c_table), - BCM590XX_REG_RANGES(csr, dcdc_csr_ranges), - BCM590XX_REG_RANGES(iosr1, dcdc_iosr1_ranges), - BCM590XX_REG_RANGES(iosr2, dcdc_iosr1_ranges), - BCM590XX_REG_RANGES(msr, dcdc_iosr1_ranges), - BCM590XX_REG_RANGES(sdsr1, dcdc_sdsr1_ranges), - BCM590XX_REG_RANGES(sdsr2, dcdc_iosr1_ranges), - BCM590XX_REG_RANGES(vsr, dcdc_iosr1_ranges), - BCM590XX_REG_TABLE(gpldo1, ldo_a_table), - BCM590XX_REG_TABLE(gpldo2, ldo_a_table), - BCM590XX_REG_TABLE(gpldo3, ldo_a_table), - BCM590XX_REG_TABLE(gpldo4, ldo_a_table), - BCM590XX_REG_TABLE(gpldo5, ldo_a_table), - BCM590XX_REG_TABLE(gpldo6, ldo_a_table), - BCM590XX_REG_TABLE(vbus, ldo_vbus), +struct bcm590xx_reg_data { + enum bcm590xx_reg_type type; + enum bcm590xx_regmap_type regmap; + const struct regulator_desc desc; }; struct bcm590xx_reg { - struct regulator_desc *desc; struct bcm590xx *mfd; + unsigned int n_regulators; + const struct bcm590xx_reg_data *regs; }; -static int bcm590xx_get_vsel_register(int id) -{ - if (BCM590XX_REG_IS_LDO(id)) - return BCM590XX_RFLDOCTRL + id; - else if (BCM590XX_REG_IS_GPLDO(id)) - return BCM590XX_GPLDO1CTRL + id; - else - return BCM590XX_CSRVOUT1 + (id - BCM590XX_REG_CSR) * 3; -} - -static int bcm590xx_get_enable_register(int id) -{ - int reg = 0; - - if (BCM590XX_REG_IS_LDO(id)) - reg = BCM590XX_RFLDOPMCTRL1 + id * 2; - else if (BCM590XX_REG_IS_GPLDO(id)) - reg = BCM590XX_GPLDO1PMCTRL1 + id * 2; - else - switch (id) { - case BCM590XX_REG_CSR: - reg = BCM590XX_CSRPMCTRL1; - break; - case BCM590XX_REG_IOSR1: - reg = BCM590XX_IOSR1PMCTRL1; - break; - case BCM590XX_REG_IOSR2: - reg = BCM590XX_IOSR2PMCTRL1; - break; - case BCM590XX_REG_MSR: - reg = BCM590XX_MSRPMCTRL1; - break; - case BCM590XX_REG_SDSR1: - reg = BCM590XX_SDSR1PMCTRL1; - break; - case BCM590XX_REG_SDSR2: - reg = BCM590XX_SDSR2PMCTRL1; - break; - case BCM590XX_REG_VSR: - reg = BCM590XX_VSRPMCTRL1; - break; - case BCM590XX_REG_VBUS: - reg = BCM590XX_OTG_CTRL; - break; - } - - - return reg; -} - static const struct regulator_ops bcm590xx_ops_ldo = { .is_enabled = regulator_is_enabled_regmap, .enable = regulator_enable_regmap, @@ -272,73 +203,301 @@ static const struct regulator_ops bcm590xx_ops_vbus = { .disable = regulator_disable_regmap, }; +#define BCM590XX_REG_DESC(_name, _name_lower) \ + .id = BCM590XX_REG_##_name, \ + .name = #_name_lower, \ + .of_match = of_match_ptr(#_name_lower), \ + .regulators_node = of_match_ptr("regulators"), \ + .type = REGULATOR_VOLTAGE, \ + .owner = THIS_MODULE \ + +#define BCM590XX_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_REG_DESC(_name, _name_lower), \ + .ops = &bcm590xx_ops_ldo, \ + .n_voltages = ARRAY_SIZE(_table), \ + .volt_table = _table, \ + .vsel_reg = BCM590XX_##_name##CTRL, \ + .vsel_mask = BCM590XX_LDO_VSEL_MASK, \ + .enable_reg = BCM590XX_##_name##PMCTRL1, \ + .enable_mask = BCM590XX_REG_ENABLE, \ + .enable_is_inverted = true + +#define BCM590XX_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_REG_DESC(_name, _name_lower), \ + .ops = &bcm590xx_ops_dcdc, \ + .n_voltages = 64, \ + .linear_ranges = _ranges, \ + .n_linear_ranges = ARRAY_SIZE(_ranges), \ + .vsel_reg = BCM590XX_##_name##VOUT1, \ + .vsel_mask = BCM590XX_SR_VSEL_MASK, \ + .enable_reg = BCM590XX_##_name##PMCTRL1, \ + .enable_mask = BCM590XX_REG_ENABLE, \ + .enable_is_inverted = true + +static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(RFLDO, rfldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(SDLDO, sdldo, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(AUDLDO, audldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(MICLDO, micldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(USBLDO, usbldo, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_LDO_DESC(VIBLDO, vibldo, ldo_c_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(MSR, msr, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM590XX_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM590XX_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM590XX_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + static int bcm590xx_probe(struct platform_device *pdev) { struct bcm590xx *bcm590xx = dev_get_drvdata(pdev->dev.parent); struct bcm590xx_reg *pmu; + const struct bcm590xx_reg_data *info; struct regulator_config config = { }; - struct bcm590xx_info *info; struct regulator_dev *rdev; - int i; + unsigned int i; pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL); if (!pmu) return -ENOMEM; pmu->mfd = bcm590xx; + pmu->n_regulators = BCM590XX_NUM_REGS; + pmu->regs = bcm590xx_regs; platform_set_drvdata(pdev, pmu); - pmu->desc = devm_kcalloc(&pdev->dev, - BCM590XX_NUM_REGS, - sizeof(struct regulator_desc), - GFP_KERNEL); - if (!pmu->desc) - return -ENOMEM; - - info = bcm590xx_regs; - - for (i = 0; i < BCM590XX_NUM_REGS; i++, info++) { - /* Register the regulators */ - pmu->desc[i].name = info->name; - pmu->desc[i].of_match = of_match_ptr(info->name); - pmu->desc[i].regulators_node = of_match_ptr("regulators"); - pmu->desc[i].supply_name = info->vin_name; - pmu->desc[i].id = i; - pmu->desc[i].volt_table = info->volt_table; - pmu->desc[i].n_voltages = info->n_voltages; - pmu->desc[i].linear_ranges = info->linear_ranges; - pmu->desc[i].n_linear_ranges = info->n_linear_ranges; - - if ((BCM590XX_REG_IS_LDO(i)) || (BCM590XX_REG_IS_GPLDO(i))) { - pmu->desc[i].ops = &bcm590xx_ops_ldo; - pmu->desc[i].vsel_mask = BCM590XX_LDO_VSEL_MASK; - } else if (BCM590XX_REG_IS_VBUS(i)) - pmu->desc[i].ops = &bcm590xx_ops_vbus; - else { - pmu->desc[i].ops = &bcm590xx_ops_dcdc; - pmu->desc[i].vsel_mask = BCM590XX_SR_VSEL_MASK; - } - - if (BCM590XX_REG_IS_VBUS(i)) - pmu->desc[i].enable_mask = BCM590XX_VBUS_ENABLE; - else { - pmu->desc[i].vsel_reg = bcm590xx_get_vsel_register(i); - pmu->desc[i].enable_is_inverted = true; - pmu->desc[i].enable_mask = BCM590XX_REG_ENABLE; - } - pmu->desc[i].enable_reg = bcm590xx_get_enable_register(i); - pmu->desc[i].type = REGULATOR_VOLTAGE; - pmu->desc[i].owner = THIS_MODULE; + /* Register the regulators */ + for (i = 0; i < pmu->n_regulators; i++) { + info = &pmu->regs[i]; config.dev = bcm590xx->dev; config.driver_data = pmu; - if (BCM590XX_REG_IS_GPLDO(i) || BCM590XX_REG_IS_VBUS(i)) - config.regmap = bcm590xx->regmap_sec; - else + + switch (info->regmap) { + case BCM590XX_REGMAP_PRI: config.regmap = bcm590xx->regmap_pri; + break; + case BCM590XX_REGMAP_SEC: + config.regmap = bcm590xx->regmap_sec; + break; + default: + dev_err(bcm590xx->dev, + "invalid regmap for %s regulator; this is a driver bug\n", + pdev->name); + return -EINVAL; + } - rdev = devm_regulator_register(&pdev->dev, &pmu->desc[i], + rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); if (IS_ERR(rdev)) return dev_err_probe(bcm590xx->dev, PTR_ERR(rdev), diff --git a/include/linux/mfd/bcm590xx.h b/include/linux/mfd/bcm590xx.h index a54c50b2d2c8..09d4ae054242 100644 --- a/include/linux/mfd/bcm590xx.h +++ b/include/linux/mfd/bcm590xx.h @@ -27,6 +27,12 @@ #define BCM59056_REV_DIGITAL_B0 2 #define BCM59056_REV_ANALOG_B0 2 +/* regmap types */ +enum bcm590xx_regmap_type { + BCM590XX_REGMAP_PRI, + BCM590XX_REGMAP_SEC, +}; + /* max register address */ #define BCM590XX_MAX_REGISTER_PRI 0xe7 #define BCM590XX_MAX_REGISTER_SEC 0xf0 -- 2.51.0 From d92f474420e5bb2c8b773a4fe9cf93b6051dc1ff Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:34 +0200 Subject: [PATCH 12/16] regulator: bcm590xx: Rename BCM59056-specific data as such Previously, the driver used the BCM590XX prefix for register data specific to the BCM59056. As we will be introducing other regulators to this driver as well, make the BCM59056-specific values use the BCM59056 prefix. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20250515-bcm59054-v9-7-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/bcm590xx-regulator.c | 369 +++++++++++++------------ 1 file changed, 189 insertions(+), 180 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm590xx-regulator.c index c2427ea16662..f35b2b72e46f 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -18,146 +18,11 @@ #include #include -/* I2C slave 0 registers */ -#define BCM590XX_RFLDOPMCTRL1 0x60 -#define BCM590XX_CAMLDO1PMCTRL1 0x62 -#define BCM590XX_CAMLDO2PMCTRL1 0x64 -#define BCM590XX_SIMLDO1PMCTRL1 0x66 -#define BCM590XX_SIMLDO2PMCTRL1 0x68 -#define BCM590XX_SDLDOPMCTRL1 0x6a -#define BCM590XX_SDXLDOPMCTRL1 0x6c -#define BCM590XX_MMCLDO1PMCTRL1 0x6e -#define BCM590XX_MMCLDO2PMCTRL1 0x70 -#define BCM590XX_AUDLDOPMCTRL1 0x72 -#define BCM590XX_MICLDOPMCTRL1 0x74 -#define BCM590XX_USBLDOPMCTRL1 0x76 -#define BCM590XX_VIBLDOPMCTRL1 0x78 -#define BCM590XX_IOSR1PMCTRL1 0x7a -#define BCM590XX_IOSR2PMCTRL1 0x7c -#define BCM590XX_CSRPMCTRL1 0x7e -#define BCM590XX_SDSR1PMCTRL1 0x82 -#define BCM590XX_SDSR2PMCTRL1 0x86 -#define BCM590XX_MSRPMCTRL1 0x8a -#define BCM590XX_VSRPMCTRL1 0x8e -#define BCM590XX_RFLDOCTRL 0x96 -#define BCM590XX_CAMLDO1CTRL 0x97 -#define BCM590XX_CAMLDO2CTRL 0x98 -#define BCM590XX_SIMLDO1CTRL 0x99 -#define BCM590XX_SIMLDO2CTRL 0x9a -#define BCM590XX_SDLDOCTRL 0x9b -#define BCM590XX_SDXLDOCTRL 0x9c -#define BCM590XX_MMCLDO1CTRL 0x9d -#define BCM590XX_MMCLDO2CTRL 0x9e -#define BCM590XX_AUDLDOCTRL 0x9f -#define BCM590XX_MICLDOCTRL 0xa0 -#define BCM590XX_USBLDOCTRL 0xa1 -#define BCM590XX_VIBLDOCTRL 0xa2 -#define BCM590XX_CSRVOUT1 0xc0 -#define BCM590XX_IOSR1VOUT1 0xc3 -#define BCM590XX_IOSR2VOUT1 0xc6 -#define BCM590XX_MSRVOUT1 0xc9 -#define BCM590XX_SDSR1VOUT1 0xcc -#define BCM590XX_SDSR2VOUT1 0xcf -#define BCM590XX_VSRVOUT1 0xd2 - -/* I2C slave 1 registers */ -#define BCM590XX_GPLDO5PMCTRL1 0x16 -#define BCM590XX_GPLDO6PMCTRL1 0x18 -#define BCM590XX_GPLDO1CTRL 0x1a -#define BCM590XX_GPLDO2CTRL 0x1b -#define BCM590XX_GPLDO3CTRL 0x1c -#define BCM590XX_GPLDO4CTRL 0x1d -#define BCM590XX_GPLDO5CTRL 0x1e -#define BCM590XX_GPLDO6CTRL 0x1f -#define BCM590XX_OTG_CTRL 0x40 -#define BCM590XX_GPLDO1PMCTRL1 0x57 -#define BCM590XX_GPLDO2PMCTRL1 0x59 -#define BCM590XX_GPLDO3PMCTRL1 0x5b -#define BCM590XX_GPLDO4PMCTRL1 0x5d - #define BCM590XX_REG_ENABLE BIT(7) #define BCM590XX_VBUS_ENABLE BIT(2) #define BCM590XX_LDO_VSEL_MASK GENMASK(5, 3) #define BCM590XX_SR_VSEL_MASK GENMASK(5, 0) -/* - * RFLDO to VSR regulators are - * accessed via I2C slave 0 - */ - -/* LDO regulator IDs */ -#define BCM590XX_REG_RFLDO 0 -#define BCM590XX_REG_CAMLDO1 1 -#define BCM590XX_REG_CAMLDO2 2 -#define BCM590XX_REG_SIMLDO1 3 -#define BCM590XX_REG_SIMLDO2 4 -#define BCM590XX_REG_SDLDO 5 -#define BCM590XX_REG_SDXLDO 6 -#define BCM590XX_REG_MMCLDO1 7 -#define BCM590XX_REG_MMCLDO2 8 -#define BCM590XX_REG_AUDLDO 9 -#define BCM590XX_REG_MICLDO 10 -#define BCM590XX_REG_USBLDO 11 -#define BCM590XX_REG_VIBLDO 12 - -/* DCDC regulator IDs */ -#define BCM590XX_REG_CSR 13 -#define BCM590XX_REG_IOSR1 14 -#define BCM590XX_REG_IOSR2 15 -#define BCM590XX_REG_MSR 16 -#define BCM590XX_REG_SDSR1 17 -#define BCM590XX_REG_SDSR2 18 -#define BCM590XX_REG_VSR 19 - -/* - * GPLDO1 to VBUS regulators are - * accessed via I2C slave 1 - */ - -#define BCM590XX_REG_GPLDO1 20 -#define BCM590XX_REG_GPLDO2 21 -#define BCM590XX_REG_GPLDO3 22 -#define BCM590XX_REG_GPLDO4 23 -#define BCM590XX_REG_GPLDO5 24 -#define BCM590XX_REG_GPLDO6 25 -#define BCM590XX_REG_VBUS 26 - -#define BCM590XX_NUM_REGS 27 - -/* LDO group A: supported voltages in microvolts */ -static const unsigned int ldo_a_table[] = { - 1200000, 1800000, 2500000, 2700000, 2800000, - 2900000, 3000000, 3300000, -}; - -/* LDO group C: supported voltages in microvolts */ -static const unsigned int ldo_c_table[] = { - 3100000, 1800000, 2500000, 2700000, 2800000, - 2900000, 3000000, 3300000, -}; - -/* DCDC group CSR: supported voltages in microvolts */ -static const struct linear_range dcdc_csr_ranges[] = { - REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), - REGULATOR_LINEAR_RANGE(1360000, 51, 55, 20000), - REGULATOR_LINEAR_RANGE(900000, 56, 63, 0), -}; - -/* DCDC group IOSR1: supported voltages in microvolts */ -static const struct linear_range dcdc_iosr1_ranges[] = { - REGULATOR_LINEAR_RANGE(860000, 2, 51, 10000), - REGULATOR_LINEAR_RANGE(1500000, 52, 52, 0), - REGULATOR_LINEAR_RANGE(1800000, 53, 53, 0), - REGULATOR_LINEAR_RANGE(900000, 54, 63, 0), -}; - -/* DCDC group SDSR1: supported voltages in microvolts */ -static const struct linear_range dcdc_sdsr1_ranges[] = { - REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), - REGULATOR_LINEAR_RANGE(1340000, 51, 51, 0), - REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), -}; - enum bcm590xx_reg_type { BCM590XX_REG_TYPE_LDO, BCM590XX_REG_TYPE_GPLDO, @@ -203,43 +68,187 @@ static const struct regulator_ops bcm590xx_ops_vbus = { .disable = regulator_disable_regmap, }; -#define BCM590XX_REG_DESC(_name, _name_lower) \ - .id = BCM590XX_REG_##_name, \ +#define BCM590XX_REG_DESC(_model, _name, _name_lower) \ + .id = _model##_REG_##_name, \ .name = #_name_lower, \ .of_match = of_match_ptr(#_name_lower), \ .regulators_node = of_match_ptr("regulators"), \ .type = REGULATOR_VOLTAGE, \ .owner = THIS_MODULE \ -#define BCM590XX_LDO_DESC(_name, _name_lower, _table) \ - BCM590XX_REG_DESC(_name, _name_lower), \ +#define BCM590XX_LDO_DESC(_model, _model_lower, _name, _name_lower, _table) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ .ops = &bcm590xx_ops_ldo, \ - .n_voltages = ARRAY_SIZE(_table), \ - .volt_table = _table, \ - .vsel_reg = BCM590XX_##_name##CTRL, \ + .n_voltages = ARRAY_SIZE(_model_lower##_##_table), \ + .volt_table = _model_lower##_##_table, \ + .vsel_reg = _model##_##_name##CTRL, \ .vsel_mask = BCM590XX_LDO_VSEL_MASK, \ - .enable_reg = BCM590XX_##_name##PMCTRL1, \ + .enable_reg = _model##_##_name##PMCTRL1, \ .enable_mask = BCM590XX_REG_ENABLE, \ .enable_is_inverted = true -#define BCM590XX_SR_DESC(_name, _name_lower, _ranges) \ - BCM590XX_REG_DESC(_name, _name_lower), \ +#define BCM590XX_SR_DESC(_model, _model_lower, _name, _name_lower, _ranges) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ .ops = &bcm590xx_ops_dcdc, \ .n_voltages = 64, \ - .linear_ranges = _ranges, \ - .n_linear_ranges = ARRAY_SIZE(_ranges), \ - .vsel_reg = BCM590XX_##_name##VOUT1, \ + .linear_ranges = _model_lower##_##_ranges, \ + .n_linear_ranges = ARRAY_SIZE(_model_lower##_##_ranges), \ + .vsel_reg = _model##_##_name##VOUT1, \ .vsel_mask = BCM590XX_SR_VSEL_MASK, \ - .enable_reg = BCM590XX_##_name##PMCTRL1, \ + .enable_reg = _model##_##_name##PMCTRL1, \ .enable_mask = BCM590XX_REG_ENABLE, \ .enable_is_inverted = true -static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { +#define BCM59056_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59056, _name, _name_lower) +#define BCM59056_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59056, bcm59056, _name, _name_lower, _table) +#define BCM59056_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59056, bcm59056, _name, _name_lower, _ranges) + +/* BCM59056 data */ + +/* I2C slave 0 registers */ +#define BCM59056_RFLDOPMCTRL1 0x60 +#define BCM59056_CAMLDO1PMCTRL1 0x62 +#define BCM59056_CAMLDO2PMCTRL1 0x64 +#define BCM59056_SIMLDO1PMCTRL1 0x66 +#define BCM59056_SIMLDO2PMCTRL1 0x68 +#define BCM59056_SDLDOPMCTRL1 0x6a +#define BCM59056_SDXLDOPMCTRL1 0x6c +#define BCM59056_MMCLDO1PMCTRL1 0x6e +#define BCM59056_MMCLDO2PMCTRL1 0x70 +#define BCM59056_AUDLDOPMCTRL1 0x72 +#define BCM59056_MICLDOPMCTRL1 0x74 +#define BCM59056_USBLDOPMCTRL1 0x76 +#define BCM59056_VIBLDOPMCTRL1 0x78 +#define BCM59056_IOSR1PMCTRL1 0x7a +#define BCM59056_IOSR2PMCTRL1 0x7c +#define BCM59056_CSRPMCTRL1 0x7e +#define BCM59056_SDSR1PMCTRL1 0x82 +#define BCM59056_SDSR2PMCTRL1 0x86 +#define BCM59056_MSRPMCTRL1 0x8a +#define BCM59056_VSRPMCTRL1 0x8e +#define BCM59056_RFLDOCTRL 0x96 +#define BCM59056_CAMLDO1CTRL 0x97 +#define BCM59056_CAMLDO2CTRL 0x98 +#define BCM59056_SIMLDO1CTRL 0x99 +#define BCM59056_SIMLDO2CTRL 0x9a +#define BCM59056_SDLDOCTRL 0x9b +#define BCM59056_SDXLDOCTRL 0x9c +#define BCM59056_MMCLDO1CTRL 0x9d +#define BCM59056_MMCLDO2CTRL 0x9e +#define BCM59056_AUDLDOCTRL 0x9f +#define BCM59056_MICLDOCTRL 0xa0 +#define BCM59056_USBLDOCTRL 0xa1 +#define BCM59056_VIBLDOCTRL 0xa2 +#define BCM59056_CSRVOUT1 0xc0 +#define BCM59056_IOSR1VOUT1 0xc3 +#define BCM59056_IOSR2VOUT1 0xc6 +#define BCM59056_MSRVOUT1 0xc9 +#define BCM59056_SDSR1VOUT1 0xcc +#define BCM59056_SDSR2VOUT1 0xcf +#define BCM59056_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59056_GPLDO5PMCTRL1 0x16 +#define BCM59056_GPLDO6PMCTRL1 0x18 +#define BCM59056_GPLDO1CTRL 0x1a +#define BCM59056_GPLDO2CTRL 0x1b +#define BCM59056_GPLDO3CTRL 0x1c +#define BCM59056_GPLDO4CTRL 0x1d +#define BCM59056_GPLDO5CTRL 0x1e +#define BCM59056_GPLDO6CTRL 0x1f +#define BCM59056_OTG_CTRL 0x40 +#define BCM59056_GPLDO1PMCTRL1 0x57 +#define BCM59056_GPLDO2PMCTRL1 0x59 +#define BCM59056_GPLDO3PMCTRL1 0x5b +#define BCM59056_GPLDO4PMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59056_REG_RFLDO 0 +#define BCM59056_REG_CAMLDO1 1 +#define BCM59056_REG_CAMLDO2 2 +#define BCM59056_REG_SIMLDO1 3 +#define BCM59056_REG_SIMLDO2 4 +#define BCM59056_REG_SDLDO 5 +#define BCM59056_REG_SDXLDO 6 +#define BCM59056_REG_MMCLDO1 7 +#define BCM59056_REG_MMCLDO2 8 +#define BCM59056_REG_AUDLDO 9 +#define BCM59056_REG_MICLDO 10 +#define BCM59056_REG_USBLDO 11 +#define BCM59056_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59056_REG_CSR 13 +#define BCM59056_REG_IOSR1 14 +#define BCM59056_REG_IOSR2 15 +#define BCM59056_REG_MSR 16 +#define BCM59056_REG_SDSR1 17 +#define BCM59056_REG_SDSR2 18 +#define BCM59056_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59056_REG_GPLDO1 20 +#define BCM59056_REG_GPLDO2 21 +#define BCM59056_REG_GPLDO3 22 +#define BCM59056_REG_GPLDO4 23 +#define BCM59056_REG_GPLDO5 24 +#define BCM59056_REG_GPLDO6 25 +#define BCM59056_REG_VBUS 26 + +#define BCM59056_NUM_REGS 27 + +/* LDO group A: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_a_table[] = { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group C: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_c_table[] = { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_csr_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1360000, 51, 55, 20000), + REGULATOR_LINEAR_RANGE(900000, 56, 63, 0), +}; + +/* DCDC group IOSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_iosr1_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 51, 10000), + REGULATOR_LINEAR_RANGE(1500000, 52, 52, 0), + REGULATOR_LINEAR_RANGE(1800000, 53, 53, 0), + REGULATOR_LINEAR_RANGE(900000, 54, 63, 0), +}; + +/* DCDC group SDSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_sdsr1_ranges[] = { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1340000, 51, 51, 0), + REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59056_regs[BCM59056_NUM_REGS] = { { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(RFLDO, rfldo, ldo_a_table), + BCM59056_LDO_DESC(RFLDO, rfldo, ldo_a_table), }, }, @@ -247,7 +256,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), + BCM59056_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), }, }, @@ -255,7 +264,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), + BCM59056_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), }, }, @@ -263,7 +272,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), + BCM59056_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), }, }, @@ -271,7 +280,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), + BCM59056_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), }, }, @@ -279,7 +288,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(SDLDO, sdldo, ldo_c_table), + BCM59056_LDO_DESC(SDLDO, sdldo, ldo_c_table), }, }, @@ -287,7 +296,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), + BCM59056_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), }, }, @@ -295,7 +304,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), + BCM59056_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), }, }, @@ -303,7 +312,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), + BCM59056_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), }, }, @@ -311,7 +320,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(AUDLDO, audldo, ldo_a_table), + BCM59056_LDO_DESC(AUDLDO, audldo, ldo_a_table), }, }, @@ -319,7 +328,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(MICLDO, micldo, ldo_a_table), + BCM59056_LDO_DESC(MICLDO, micldo, ldo_a_table), }, }, @@ -327,7 +336,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(USBLDO, usbldo, ldo_a_table), + BCM59056_LDO_DESC(USBLDO, usbldo, ldo_a_table), }, }, @@ -335,7 +344,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_LDO, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_LDO_DESC(VIBLDO, vibldo, ldo_c_table), + BCM59056_LDO_DESC(VIBLDO, vibldo, ldo_c_table), }, }, @@ -343,7 +352,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(CSR, csr, dcdc_csr_ranges), + BCM59056_SR_DESC(CSR, csr, dcdc_csr_ranges), }, }, @@ -351,7 +360,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), + BCM59056_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), }, }, @@ -359,7 +368,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), + BCM59056_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), }, }, @@ -367,7 +376,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(MSR, msr, dcdc_iosr1_ranges), + BCM59056_SR_DESC(MSR, msr, dcdc_iosr1_ranges), }, }, @@ -375,7 +384,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), + BCM59056_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), }, }, @@ -383,7 +392,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), + BCM59056_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), }, }, @@ -391,7 +400,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_SR, .regmap = BCM590XX_REGMAP_PRI, .desc = { - BCM590XX_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), + BCM59056_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), }, }, @@ -399,7 +408,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), + BCM59056_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), }, }, @@ -407,7 +416,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), + BCM59056_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), }, }, @@ -415,7 +424,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), + BCM59056_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), }, }, @@ -423,7 +432,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), + BCM59056_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), }, }, @@ -431,7 +440,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), + BCM59056_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), }, }, @@ -439,7 +448,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_GPLDO, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), + BCM59056_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), }, }, @@ -447,11 +456,11 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] = { .type = BCM590XX_REG_TYPE_VBUS, .regmap = BCM590XX_REGMAP_SEC, .desc = { - BCM590XX_REG_DESC(VBUS, vbus), + BCM59056_REG_DESC(VBUS, vbus), .ops = &bcm590xx_ops_vbus, .n_voltages = 1, .fixed_uV = 5000000, - .enable_reg = BCM590XX_OTG_CTRL, + .enable_reg = BCM59056_OTG_CTRL, .enable_mask = BCM590XX_VBUS_ENABLE, }, }, @@ -471,8 +480,8 @@ static int bcm590xx_probe(struct platform_device *pdev) return -ENOMEM; pmu->mfd = bcm590xx; - pmu->n_regulators = BCM590XX_NUM_REGS; - pmu->regs = bcm590xx_regs; + pmu->n_regulators = BCM59056_NUM_REGS; + pmu->regs = bcm59056_regs; platform_set_drvdata(pdev, pmu); -- 2.51.0 From ef7f3631a44b8e0990ab8ffcbed4b2c3a4270883 Mon Sep 17 00:00:00 2001 From: Artur Weber Date: Thu, 15 May 2025 16:16:35 +0200 Subject: [PATCH 13/16] regulator: bcm590xx: Add support for BCM59054 regulators The BCM59056 and BCM59054 are very similar in terms of regulators. Add the register definitions for the BCM59054 and enable support for it in the driver. Signed-off-by: Artur Weber Reviewed-by: Stanislav Jakubek Reviewed-by: Mark Brown Link: https://lore.kernel.org/r/20250515-bcm59054-v9-8-14ba0ea2ea5b@gmail.com Signed-off-by: Lee Jones --- drivers/regulator/bcm590xx-regulator.c | 649 ++++++++++++++++++++++++- 1 file changed, 647 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm590xx-regulator.c index f35b2b72e46f..50414f4cb109 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -52,6 +52,17 @@ static const struct regulator_ops bcm590xx_ops_ldo = { .map_voltage = regulator_map_voltage_iterate, }; +/* + * LDO ops without voltage selection, used for MICLDO on BCM59054. + * (These are currently the same as VBUS ops, but will be different + * in the future once full PMMODE support is implemented.) + */ +static const struct regulator_ops bcm590xx_ops_ldo_novolt = { + .is_enabled = regulator_is_enabled_regmap, + .enable = regulator_enable_regmap, + .disable = regulator_disable_regmap, +}; + static const struct regulator_ops bcm590xx_ops_dcdc = { .is_enabled = regulator_is_enabled_regmap, .enable = regulator_enable_regmap, @@ -106,6 +117,13 @@ static const struct regulator_ops bcm590xx_ops_vbus = { #define BCM59056_SR_DESC(_name, _name_lower, _ranges) \ BCM590XX_SR_DESC(BCM59056, bcm59056, _name, _name_lower, _ranges) +#define BCM59054_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59054, _name, _name_lower) +#define BCM59054_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59054, bcm59054, _name, _name_lower, _table) +#define BCM59054_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59054, bcm59054, _name, _name_lower, _ranges) + /* BCM59056 data */ /* I2C slave 0 registers */ @@ -466,6 +484,617 @@ static const struct bcm590xx_reg_data bcm59056_regs[BCM59056_NUM_REGS] = { }, }; +/* BCM59054 data */ + +/* I2C slave 0 registers */ +#define BCM59054_RFLDOPMCTRL1 0x60 +#define BCM59054_CAMLDO1PMCTRL1 0x62 +#define BCM59054_CAMLDO2PMCTRL1 0x64 +#define BCM59054_SIMLDO1PMCTRL1 0x66 +#define BCM59054_SIMLDO2PMCTRL1 0x68 +#define BCM59054_SDLDOPMCTRL1 0x6a +#define BCM59054_SDXLDOPMCTRL1 0x6c +#define BCM59054_MMCLDO1PMCTRL1 0x6e +#define BCM59054_MMCLDO2PMCTRL1 0x70 +#define BCM59054_AUDLDOPMCTRL1 0x72 +#define BCM59054_MICLDOPMCTRL1 0x74 +#define BCM59054_USBLDOPMCTRL1 0x76 +#define BCM59054_VIBLDOPMCTRL1 0x78 +#define BCM59054_IOSR1PMCTRL1 0x7a +#define BCM59054_IOSR2PMCTRL1 0x7c +#define BCM59054_CSRPMCTRL1 0x7e +#define BCM59054_SDSR1PMCTRL1 0x82 +#define BCM59054_SDSR2PMCTRL1 0x86 +#define BCM59054_MMSRPMCTRL1 0x8a +#define BCM59054_VSRPMCTRL1 0x8e +#define BCM59054_RFLDOCTRL 0x96 +#define BCM59054_CAMLDO1CTRL 0x97 +#define BCM59054_CAMLDO2CTRL 0x98 +#define BCM59054_SIMLDO1CTRL 0x99 +#define BCM59054_SIMLDO2CTRL 0x9a +#define BCM59054_SDLDOCTRL 0x9b +#define BCM59054_SDXLDOCTRL 0x9c +#define BCM59054_MMCLDO1CTRL 0x9d +#define BCM59054_MMCLDO2CTRL 0x9e +#define BCM59054_AUDLDOCTRL 0x9f +#define BCM59054_MICLDOCTRL 0xa0 +#define BCM59054_USBLDOCTRL 0xa1 +#define BCM59054_VIBLDOCTRL 0xa2 +#define BCM59054_CSRVOUT1 0xc0 +#define BCM59054_IOSR1VOUT1 0xc3 +#define BCM59054_IOSR2VOUT1 0xc6 +#define BCM59054_MMSRVOUT1 0xc9 +#define BCM59054_SDSR1VOUT1 0xcc +#define BCM59054_SDSR2VOUT1 0xcf +#define BCM59054_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59054_LVLDO1PMCTRL1 0x16 +#define BCM59054_LVLDO2PMCTRL1 0x18 +#define BCM59054_GPLDO1CTRL 0x1a +#define BCM59054_GPLDO2CTRL 0x1b +#define BCM59054_GPLDO3CTRL 0x1c +#define BCM59054_TCXLDOCTRL 0x1d +#define BCM59054_LVLDO1CTRL 0x1e +#define BCM59054_LVLDO2CTRL 0x1f +#define BCM59054_OTG_CTRL 0x40 +#define BCM59054_GPLDO1PMCTRL1 0x57 +#define BCM59054_GPLDO2PMCTRL1 0x59 +#define BCM59054_GPLDO3PMCTRL1 0x5b +#define BCM59054_TCXLDOPMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59054_REG_RFLDO 0 +#define BCM59054_REG_CAMLDO1 1 +#define BCM59054_REG_CAMLDO2 2 +#define BCM59054_REG_SIMLDO1 3 +#define BCM59054_REG_SIMLDO2 4 +#define BCM59054_REG_SDLDO 5 +#define BCM59054_REG_SDXLDO 6 +#define BCM59054_REG_MMCLDO1 7 +#define BCM59054_REG_MMCLDO2 8 +#define BCM59054_REG_AUDLDO 9 +#define BCM59054_REG_MICLDO 10 +#define BCM59054_REG_USBLDO 11 +#define BCM59054_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59054_REG_CSR 13 +#define BCM59054_REG_IOSR1 14 +#define BCM59054_REG_IOSR2 15 +#define BCM59054_REG_MMSR 16 +#define BCM59054_REG_SDSR1 17 +#define BCM59054_REG_SDSR2 18 +#define BCM59054_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59054_REG_GPLDO1 20 +#define BCM59054_REG_GPLDO2 21 +#define BCM59054_REG_GPLDO3 22 +#define BCM59054_REG_TCXLDO 23 +#define BCM59054_REG_LVLDO1 24 +#define BCM59054_REG_LVLDO2 25 +#define BCM59054_REG_VBUS 26 + +#define BCM59054_NUM_REGS 27 + +/* LDO group 1: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_1_table[] = { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 2: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_2_table[] = { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 3: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_3_table[] = { + 1000000, 1107000, 1143000, 1214000, 1250000, + 1464000, 1500000, 1786000, +}; + +/* DCDC group SR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_sr_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(900000, 63, 63, 0), +}; + +/* DCDC group VSR (BCM59054A1): supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_vsr_a1_ranges[] = { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 59, 10000), + REGULATOR_LINEAR_RANGE(1700000, 60, 60, 0), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(1600000, 63, 63, 0), +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_csr_ranges[] = { + REGULATOR_LINEAR_RANGE(700000, 0, 1, 100000), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(900000, 61, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59054_regs[BCM59054_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_REG_DESC(MICLDO, micldo), + .ops = &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages = 1, + .fixed_uV = 1800000, + .enable_reg = BCM59054_MICLDOPMCTRL1, + .enable_mask = BCM590XX_REG_ENABLE, + .enable_is_inverted = true, + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(VSR, vsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM59054_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + +/* + * BCM59054A1 regulators; same as previous revision, but with different + * VSR voltage table. + */ +static const struct bcm590xx_reg_data bcm59054_a1_regs[BCM59054_NUM_REGS] = { + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_REG_DESC(MICLDO, micldo), + .ops = &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages = 1, + .fixed_uV = 1800000, + .enable_reg = BCM59054_MICLDOPMCTRL1, + .enable_mask = BCM590XX_REG_ENABLE, + .enable_is_inverted = true, + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_LDO, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_SR, + .regmap = BCM590XX_REGMAP_PRI, + .desc = { + BCM59054_SR_DESC(VSR, vsr, dcdc_vsr_a1_ranges), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_GPLDO, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type = BCM590XX_REG_TYPE_VBUS, + .regmap = BCM590XX_REGMAP_SEC, + .desc = { + BCM59054_REG_DESC(VBUS, vbus), + .ops = &bcm590xx_ops_vbus, + .n_voltages = 1, + .fixed_uV = 5000000, + .enable_reg = BCM59054_OTG_CTRL, + .enable_mask = BCM590XX_VBUS_ENABLE, + }, + }, +}; + static int bcm590xx_probe(struct platform_device *pdev) { struct bcm590xx *bcm590xx = dev_get_drvdata(pdev->dev.parent); @@ -480,8 +1109,24 @@ static int bcm590xx_probe(struct platform_device *pdev) return -ENOMEM; pmu->mfd = bcm590xx; - pmu->n_regulators = BCM59056_NUM_REGS; - pmu->regs = bcm59056_regs; + + switch (pmu->mfd->pmu_id) { + case BCM590XX_PMUID_BCM59054: + pmu->n_regulators = BCM59054_NUM_REGS; + if (pmu->mfd->rev_analog == BCM59054_REV_ANALOG_A1) + pmu->regs = bcm59054_a1_regs; + else + pmu->regs = bcm59054_regs; + break; + case BCM590XX_PMUID_BCM59056: + pmu->n_regulators = BCM59056_NUM_REGS; + pmu->regs = bcm59056_regs; + break; + default: + dev_err(bcm590xx->dev, + "unknown device type, could not initialize\n"); + return -EINVAL; + } platform_set_drvdata(pdev, pmu); -- 2.51.0 From 1d2aeee6dd629084cc524ec2d00100e70aa3c824 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 18 Mar 2025 10:13:41 +0100 Subject: [PATCH 14/16] mfd: aat2870: Use per-client debugfs directory The I2C core now provides a debugfs entry for each client. Let this driver use it instead of the custom directory in debugfs root. Further improvements by this change: automatic clean up on removal, support of multiple instances. Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20250318091426.22258-2-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- drivers/mfd/aat2870-core.c | 4 +--- include/linux/mfd/aat2870.h | 3 --- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/mfd/aat2870-core.c b/drivers/mfd/aat2870-core.c index 8ef510e84688..34d66ba9646a 100644 --- a/drivers/mfd/aat2870-core.c +++ b/drivers/mfd/aat2870-core.c @@ -320,9 +320,7 @@ static const struct file_operations aat2870_reg_fops = { static void aat2870_init_debugfs(struct aat2870_data *aat2870) { - aat2870->dentry_root = debugfs_create_dir("aat2870", NULL); - - debugfs_create_file("regs", 0644, aat2870->dentry_root, aat2870, + debugfs_create_file("regs", 0644, aat2870->client->debugfs, aat2870, &aat2870_reg_fops); } diff --git a/include/linux/mfd/aat2870.h b/include/linux/mfd/aat2870.h index 2445842d482d..c7a3c53eba68 100644 --- a/include/linux/mfd/aat2870.h +++ b/include/linux/mfd/aat2870.h @@ -133,9 +133,6 @@ struct aat2870_data { int (*read)(struct aat2870_data *aat2870, u8 addr, u8 *val); int (*write)(struct aat2870_data *aat2870, u8 addr, u8 val); int (*update)(struct aat2870_data *aat2870, u8 addr, u8 mask, u8 val); - - /* for debugfs */ - struct dentry *dentry_root; }; struct aat2870_subdev_info { -- 2.51.0 From 70a9d374293b42055626d59c2eeeff4d624806bf Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Tue, 18 Mar 2025 10:12:12 +0100 Subject: [PATCH 15/16] mfd: tps65010: Use per-client debugfs directory The I2C core now provides a debugfs entry for each client. Let this driver use it instead of the root directory. Further improvements by this change: automatic support of multiple instances. Signed-off-by: Wolfram Sang Link: https://lore.kernel.org/r/20250318091234.22170-1-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones --- drivers/mfd/tps65010.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mfd/tps65010.c b/drivers/mfd/tps65010.c index 00fb12c4f491..e7c57431c0cc 100644 --- a/drivers/mfd/tps65010.c +++ b/drivers/mfd/tps65010.c @@ -512,7 +512,6 @@ static void tps65010_remove(struct i2c_client *client) if (client->irq > 0) free_irq(client->irq, tps); cancel_delayed_work_sync(&tps->work); - debugfs_remove(tps->file); the_tps = NULL; } @@ -608,7 +607,7 @@ static int tps65010_probe(struct i2c_client *client) tps65010_work(&tps->work.work); - tps->file = debugfs_create_file(DRIVER_NAME, S_IRUGO, NULL, + tps->file = debugfs_create_file(DRIVER_NAME, S_IRUGO, client->debugfs, tps, DEBUG_FOPS); /* optionally register GPIOs */ -- 2.51.0 From a95fadf4a2998949f41e31a03326d2a46a360f0d Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Tue, 25 Mar 2025 10:21:59 +0100 Subject: [PATCH 16/16] MAINTAINERS: Adjust the file entry in SIEMENS IPC LED DRIVERS Commit 835a0c10d33b ("leds: Rename simple directory to simatic") renames the driver's directory to drivers/leds/simatic, but misses to adjust the SIEMENS IPC LED DRIVERS section in MAINTAINERS. Hence, ./scripts/get_maintainer.pl --self-test=patterns complains about a broken reference. Adjust the file entry to this renaming. Signed-off-by: Lukas Bulwahn Link: https://lore.kernel.org/r/20250325092159.213463-1-lukas.bulwahn@redhat.com Signed-off-by: Lee Jones --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 09f87cc4e2e5..f4af323fe84f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22108,7 +22108,7 @@ M: Benedikt Niedermayr M: Tobias Schaffner L: linux-leds@vger.kernel.org S: Maintained -F: drivers/leds/simple/ +F: drivers/leds/simatic/ SIEMENS IPC PLATFORM DRIVERS M: Bao Cheng Su -- 2.51.0