From 8c274d69093fcf5cc0d00a41994ce0a1523417ae Mon Sep 17 00:00:00 2001 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:38 +0200 Subject: [PATCH 01/16] net: sparx5: ops out PTP IRQ handler The PTP registers are located in two different register targets on Sparx5 and lan969x. We can't handle this with the register macros, so ops out the handler. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon Signed-off-by: Paolo Abeni --- drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 4 +++- drivers/net/ethernet/microchip/sparx5/sparx5_main.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index 22277a3e91ef..3decf72d1dd8 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -605,6 +605,7 @@ static int sparx5_start(struct sparx5 *sparx5) { u8 broadcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; const struct sparx5_consts *consts = sparx5->data->consts; + const struct sparx5_ops *ops = sparx5->data->ops; char queue_name[32]; u32 idx; int err; @@ -729,7 +730,7 @@ static int sparx5_start(struct sparx5 *sparx5) if (sparx5->ptp_irq >= 0) { err = devm_request_threaded_irq(sparx5->dev, sparx5->ptp_irq, - NULL, sparx5_ptp_irq_handler, + NULL, ops->ptp_irq_handler, IRQF_ONESHOT, "sparx5-ptp", sparx5); if (err) @@ -993,6 +994,7 @@ static const struct sparx5_ops sparx5_ops = { .get_hsch_max_group_rate = &sparx5_get_hsch_max_group_rate, .get_sdlb_group = &sparx5_get_sdlb_group, .set_port_mux = &sparx5_port_mux_set, + .ptp_irq_handler = &sparx5_ptp_irq_handler, }; static const struct sparx5_match_data sparx5_desc = { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index 8d985dfb65eb..cc8ab91d9805 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -269,6 +269,8 @@ struct sparx5_ops { struct sparx5_sdlb_group *(*get_sdlb_group)(int idx); int (*set_port_mux)(struct sparx5 *sparx5, struct sparx5_port *port, struct sparx5_port_config *conf); + + irqreturn_t (*ptp_irq_handler)(int irq, void *args); }; struct sparx5_main_io_resource { -- 2.51.0 From a0dd8906824b1131ad21d2d689d54628917ce8d1 Mon Sep 17 00:00:00 2001 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:39 +0200 Subject: [PATCH 02/16] net: sparx5: ops out function for DSM calendar calculation The DSM (Disassembler) calendar grants each port access to internal busses. The configuration of the calendar is done differently on Sparx5 and lan969x. Therefore ops out the function that calculates the calendar. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon Signed-off-by: Paolo Abeni --- .../microchip/sparx5/sparx5_calendar.c | 22 ++++--------------- .../ethernet/microchip/sparx5/sparx5_main.c | 1 + .../ethernet/microchip/sparx5/sparx5_main.h | 21 ++++++++++++++++++ 3 files changed, 26 insertions(+), 18 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c index 9b54d952e91a..6b9565e0fd7b 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c @@ -15,9 +15,7 @@ #define SPX5_CALBITS_PER_PORT 3 /* Bit per port in calendar register */ /* DSM calendar information */ -#define SPX5_DSM_CAL_LEN 64 #define SPX5_DSM_CAL_EMPTY 0xFFFF -#define SPX5_DSM_CAL_MAX_DEVS_PER_TAXI 13 #define SPX5_DSM_CAL_TAXIS 8 #define SPX5_DSM_CAL_BW_LOSS 553 @@ -37,19 +35,6 @@ static u32 sparx5_taxi_ports[SPX5_DSM_CAL_TAXIS][SPX5_DSM_CAL_MAX_DEVS_PER_TAXI] {64, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99, 99}, }; -struct sparx5_calendar_data { - u32 schedule[SPX5_DSM_CAL_LEN]; - u32 avg_dist[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; - u32 taxi_ports[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; - u32 taxi_speeds[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; - u32 dev_slots[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; - u32 new_slots[SPX5_DSM_CAL_LEN]; - u32 temp_sched[SPX5_DSM_CAL_LEN]; - u32 indices[SPX5_DSM_CAL_LEN]; - u32 short_list[SPX5_DSM_CAL_LEN]; - u32 long_list[SPX5_DSM_CAL_LEN]; -}; - static u32 sparx5_target_bandwidth(struct sparx5 *sparx5) { switch (sparx5->target_ct) { @@ -279,8 +264,8 @@ static u32 sparx5_dsm_cp_cal(u32 *sched) return SPX5_DSM_CAL_EMPTY; } -static int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi, - struct sparx5_calendar_data *data) +int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi, + struct sparx5_calendar_data *data) { bool slow_mode; u32 gcd, idx, sum, min, factor; @@ -566,6 +551,7 @@ update_err: /* Configure the DSM calendar based on port configuration */ int sparx5_config_dsm_calendar(struct sparx5 *sparx5) { + const struct sparx5_ops *ops = sparx5->data->ops; int taxi; struct sparx5_calendar_data *data; int err = 0; @@ -575,7 +561,7 @@ int sparx5_config_dsm_calendar(struct sparx5 *sparx5) return -ENOMEM; for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) { - err = sparx5_dsm_calendar_calc(sparx5, taxi, data); + err = ops->dsm_calendar_calc(sparx5, taxi, data); if (err) { dev_err(sparx5->dev, "DSM calendar calculation failed\n"); goto cal_out; diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index 3decf72d1dd8..d883cd40dfb3 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -995,6 +995,7 @@ static const struct sparx5_ops sparx5_ops = { .get_sdlb_group = &sparx5_get_sdlb_group, .set_port_mux = &sparx5_port_mux_set, .ptp_irq_handler = &sparx5_ptp_irq_handler, + .dsm_calendar_calc = &sparx5_dsm_calendar_calc, }; static const struct sparx5_match_data sparx5_desc = { diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index cc8ab91d9805..f21ec878b9a8 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -101,8 +101,24 @@ enum sparx5_vlan_port_type { #define IFH_PDU_TYPE_IPV4_UDP_PTP 0x6 #define IFH_PDU_TYPE_IPV6_UDP_PTP 0x7 +#define SPX5_DSM_CAL_LEN 64 +#define SPX5_DSM_CAL_MAX_DEVS_PER_TAXI 13 + struct sparx5; +struct sparx5_calendar_data { + u32 schedule[SPX5_DSM_CAL_LEN]; + u32 avg_dist[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; + u32 taxi_ports[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; + u32 taxi_speeds[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; + u32 dev_slots[SPX5_DSM_CAL_MAX_DEVS_PER_TAXI]; + u32 new_slots[SPX5_DSM_CAL_LEN]; + u32 temp_sched[SPX5_DSM_CAL_LEN]; + u32 indices[SPX5_DSM_CAL_LEN]; + u32 short_list[SPX5_DSM_CAL_LEN]; + u32 long_list[SPX5_DSM_CAL_LEN]; +}; + /* Frame DMA receive state: * For each DB, there is a SKB, and the skb data pointer is mapped in * the DB. Once a frame is received the skb is given to the upper layers @@ -271,6 +287,8 @@ struct sparx5_ops { struct sparx5_port_config *conf); irqreturn_t (*ptp_irq_handler)(int irq, void *args); + int (*dsm_calendar_calc)(struct sparx5 *sparx5, u32 taxi, + struct sparx5_calendar_data *data); }; struct sparx5_main_io_resource { @@ -418,6 +436,9 @@ void sparx5_vlan_port_apply(struct sparx5 *sparx5, struct sparx5_port *port); /* sparx5_calendar.c */ int sparx5_config_auto_calendar(struct sparx5 *sparx5); int sparx5_config_dsm_calendar(struct sparx5 *sparx5); +int sparx5_dsm_calendar_calc(struct sparx5 *sparx5, u32 taxi, + struct sparx5_calendar_data *data); + /* sparx5_ethtool.c */ void sparx5_get_stats64(struct net_device *ndev, struct rtnl_link_stats64 *stats); -- 2.51.0 From 4b67bcb9094e74890483e55ea2aaf2d57c4df843 Mon Sep 17 00:00:00 2001 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:40 +0200 Subject: [PATCH 03/16] net: sparx5: add is_sparx5 macro and use it throughout We dont want to ops out each time a function needs to do some platform specifics. In particular we have a few places, where it would be convenient to just branch out on the platform type. Add the function is_sparx5() and, initially, use it for: - register writes that should only be done on Sparx5 (QSYS_CAL_CTRL, CLKGEN_LCPLL1_CORE_CLK). - function calls that should only be done on Sparx5 (ethtool_op_get_ts_info()) - register writes that are chip-exclusive (MASK_CFG1/2, PGID_CFG1/2, these are replicated for n_ports >32 on Sparx5). The is_sparx5() function simply checks the target chip type, to determine if this is a Sparx5 SKU or not. Reviewed-by: Steen Hegelund Reviewed-by: Jacob Keller Signed-off-by: Daniel Machon Signed-off-by: Paolo Abeni --- .../microchip/sparx5/sparx5_calendar.c | 7 +- .../microchip/sparx5/sparx5_ethtool.c | 2 +- .../ethernet/microchip/sparx5/sparx5_main.c | 88 ++++++++++++------- .../ethernet/microchip/sparx5/sparx5_main.h | 3 + .../ethernet/microchip/sparx5/sparx5_vlan.c | 42 ++++++--- 5 files changed, 90 insertions(+), 52 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c index 6b9565e0fd7b..63f6c5484fdb 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c @@ -194,9 +194,10 @@ int sparx5_config_auto_calendar(struct sparx5 *sparx5) } /* Halt the calendar while changing it */ - spx5_rmw(QSYS_CAL_CTRL_CAL_MODE_SET(10), - QSYS_CAL_CTRL_CAL_MODE, - sparx5, QSYS_CAL_CTRL); + if (is_sparx5(sparx5)) + spx5_rmw(QSYS_CAL_CTRL_CAL_MODE_SET(10), + QSYS_CAL_CTRL_CAL_MODE, + sparx5, QSYS_CAL_CTRL); /* Assign port bandwidth to auto calendar */ for (idx = 0; idx < consts->n_auto_cals; idx++) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c index 4c6375872f82..832f4ae57c83 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c @@ -1189,7 +1189,7 @@ static int sparx5_get_ts_info(struct net_device *dev, struct sparx5 *sparx5 = port->sparx5; struct sparx5_phc *phc; - if (!sparx5->ptp) + if (!sparx5->ptp && is_sparx5(sparx5)) return ethtool_op_get_ts_info(dev, info); phc = &sparx5->phc[SPARX5_PHC_PORT]; diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index d883cd40dfb3..b887e2b740c7 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -208,6 +208,25 @@ static const struct sparx5_main_io_resource sparx5_main_iomap[] = { { TARGET_VOP, 0x11a00000, 2 }, /* 0x611a00000 */ }; +bool is_sparx5(struct sparx5 *sparx5) +{ + switch (sparx5->target_ct) { + case SPX5_TARGET_CT_7546: + case SPX5_TARGET_CT_7549: + case SPX5_TARGET_CT_7552: + case SPX5_TARGET_CT_7556: + case SPX5_TARGET_CT_7558: + case SPX5_TARGET_CT_7546TSN: + case SPX5_TARGET_CT_7549TSN: + case SPX5_TARGET_CT_7552TSN: + case SPX5_TARGET_CT_7556TSN: + case SPX5_TARGET_CT_7558TSN: + return true; + default: + return false; + } +} + static int sparx5_create_targets(struct sparx5 *sparx5) { const struct sparx5_main_io_resource *iomap = sparx5->data->iomap; @@ -462,44 +481,45 @@ static int sparx5_init_coreclock(struct sparx5 *sparx5) return -ENODEV; } - switch (freq) { - case SPX5_CORE_CLOCK_250MHZ: - clk_div = 10; - pol_upd_int = 312; - break; - case SPX5_CORE_CLOCK_500MHZ: - clk_div = 5; - pol_upd_int = 624; - break; - case SPX5_CORE_CLOCK_625MHZ: - clk_div = 4; - pol_upd_int = 780; - break; - default: - dev_err(sparx5->dev, "%d coreclock not supported on (%#04x)\n", - sparx5->coreclock, sparx5->target_ct); - return -EINVAL; + if (is_sparx5(sparx5)) { + switch (freq) { + case SPX5_CORE_CLOCK_250MHZ: + clk_div = 10; + pol_upd_int = 312; + break; + case SPX5_CORE_CLOCK_500MHZ: + clk_div = 5; + pol_upd_int = 624; + break; + case SPX5_CORE_CLOCK_625MHZ: + clk_div = 4; + pol_upd_int = 780; + break; + default: + dev_err(sparx5->dev, + "%d coreclock not supported on (%#04x)\n", + sparx5->coreclock, sparx5->target_ct); + return -EINVAL; + } + + /* Configure the LCPLL */ + spx5_rmw(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV_SET(clk_div) | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV_SET(0) | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR_SET(0) | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL_SET(0) | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA_SET(0) | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA_SET(1), + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA | + CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA, + sparx5, CLKGEN_LCPLL1_CORE_CLK_CFG); } /* Update state with chosen frequency */ sparx5->coreclock = freq; - - /* Configure the LCPLL */ - spx5_rmw(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV_SET(clk_div) | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV_SET(0) | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR_SET(0) | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL_SET(0) | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA_SET(0) | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA_SET(1), - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA | - CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA, - sparx5, - CLKGEN_LCPLL1_CORE_CLK_CFG); - clk_period = sparx5_clk_period(freq); spx5_rmw(HSCH_SYS_CLK_PER_100PS_SET(clk_period / 100), diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index f21ec878b9a8..fb179088588a 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -376,6 +376,9 @@ struct sparx5 { const struct sparx5_match_data *data; }; +/* sparx5_main.c */ +bool is_sparx5(struct sparx5 *sparx5); + /* sparx5_switchdev.c */ int sparx5_register_notifier_blocks(struct sparx5 *sparx5); void sparx5_unregister_notifier_blocks(struct sparx5 *sparx5); diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c b/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c index f5708f4f17c8..80d2d3e8f458 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c @@ -16,8 +16,10 @@ static int sparx5_vlant_set_mask(struct sparx5 *sparx5, u16 vid) /* Output mask to respective registers */ spx5_wr(mask[0], sparx5, ANA_L3_VLAN_MASK_CFG(vid)); - spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid)); - spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid)); + if (is_sparx5(sparx5)) { + spx5_wr(mask[1], sparx5, ANA_L3_VLAN_MASK_CFG1(vid)); + spx5_wr(mask[2], sparx5, ANA_L3_VLAN_MASK_CFG2(vid)); + } return 0; } @@ -141,15 +143,19 @@ void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable) void sparx5_pgid_clear(struct sparx5 *spx5, int pgid) { spx5_wr(0, spx5, ANA_AC_PGID_CFG(pgid)); - spx5_wr(0, spx5, ANA_AC_PGID_CFG1(pgid)); - spx5_wr(0, spx5, ANA_AC_PGID_CFG2(pgid)); + if (is_sparx5(spx5)) { + spx5_wr(0, spx5, ANA_AC_PGID_CFG1(pgid)); + spx5_wr(0, spx5, ANA_AC_PGID_CFG2(pgid)); + } } void sparx5_pgid_read_mask(struct sparx5 *spx5, int pgid, u32 portmask[3]) { portmask[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid)); - portmask[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid)); - portmask[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid)); + if (is_sparx5(spx5)) { + portmask[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid)); + portmask[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid)); + } } void sparx5_update_fwd(struct sparx5 *sparx5) @@ -164,8 +170,10 @@ void sparx5_update_fwd(struct sparx5 *sparx5) /* Update flood masks */ for (port = PGID_UC_FLOOD; port <= PGID_BCAST; port++) { spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port)); - spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port)); - spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port)); + if (is_sparx5(sparx5)) { + spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port)); + spx5_wr(mask[2], sparx5, ANA_AC_PGID_CFG2(port)); + } } /* Update SRC masks */ @@ -176,12 +184,16 @@ void sparx5_update_fwd(struct sparx5 *sparx5) clear_bit(port, workmask); bitmap_to_arr32(mask, workmask, SPX5_PORTS); spx5_wr(mask[0], sparx5, ANA_AC_SRC_CFG(port)); - spx5_wr(mask[1], sparx5, ANA_AC_SRC_CFG1(port)); - spx5_wr(mask[2], sparx5, ANA_AC_SRC_CFG2(port)); + if (is_sparx5(sparx5)) { + spx5_wr(mask[1], sparx5, ANA_AC_SRC_CFG1(port)); + spx5_wr(mask[2], sparx5, ANA_AC_SRC_CFG2(port)); + } } else { spx5_wr(0, sparx5, ANA_AC_SRC_CFG(port)); - spx5_wr(0, sparx5, ANA_AC_SRC_CFG1(port)); - spx5_wr(0, sparx5, ANA_AC_SRC_CFG2(port)); + if (is_sparx5(sparx5)) { + spx5_wr(0, sparx5, ANA_AC_SRC_CFG1(port)); + spx5_wr(0, sparx5, ANA_AC_SRC_CFG2(port)); + } } } @@ -192,8 +204,10 @@ void sparx5_update_fwd(struct sparx5 *sparx5) /* Apply learning mask */ spx5_wr(mask[0], sparx5, ANA_L2_AUTO_LRN_CFG); - spx5_wr(mask[1], sparx5, ANA_L2_AUTO_LRN_CFG1); - spx5_wr(mask[2], sparx5, ANA_L2_AUTO_LRN_CFG2); + if (is_sparx5(sparx5)) { + spx5_wr(mask[1], sparx5, ANA_L2_AUTO_LRN_CFG1); + spx5_wr(mask[2], sparx5, ANA_L2_AUTO_LRN_CFG2); + } } void sparx5_vlan_port_apply(struct sparx5 *sparx5, -- 2.51.0 From 8cc4102363c76ed734cf030e6389d423e884edf1 Mon Sep 17 00:00:00 2001 From: Daniel Machon Date: Fri, 4 Oct 2024 15:19:41 +0200 Subject: [PATCH 04/16] net: sparx5: redefine internal ports and PGID's as offsets Internal ports and PGID's are both defined relative to the number of front ports on Sparx5. This will not work on lan969x. Instead make them offsets to the number of front ports and add two helpers to retrieve them. Use the helpers throughout. Reviewed-by: Steen Hegelund Signed-off-by: Daniel Machon Signed-off-by: Paolo Abeni --- .../microchip/sparx5/sparx5_calendar.c | 14 +++++--- .../ethernet/microchip/sparx5/sparx5_fdma.c | 4 ++- .../microchip/sparx5/sparx5_mactable.c | 3 +- .../ethernet/microchip/sparx5/sparx5_main.c | 14 ++++---- .../ethernet/microchip/sparx5/sparx5_main.h | 34 +++++++++---------- .../ethernet/microchip/sparx5/sparx5_netdev.c | 6 ++-- .../ethernet/microchip/sparx5/sparx5_packet.c | 4 ++- .../ethernet/microchip/sparx5/sparx5_pgid.c | 13 +++++-- .../ethernet/microchip/sparx5/sparx5_port.c | 5 +++ .../microchip/sparx5/sparx5_switchdev.c | 31 ++++++++++++----- .../ethernet/microchip/sparx5/sparx5_vlan.c | 3 +- 11 files changed, 86 insertions(+), 45 deletions(-) diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c index 63f6c5484fdb..b2a8d04ab509 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_calendar.c @@ -118,16 +118,22 @@ static enum sparx5_cal_bw sparx5_get_port_cal_speed(struct sparx5 *sparx5, if (portno >= sparx5->data->consts->n_ports) { /* Internal ports */ - if (portno == SPX5_PORT_CPU_0 || portno == SPX5_PORT_CPU_1) { + if (portno == + sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_0) || + portno == + sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_1)) { /* Equals 1.25G */ return SPX5_CAL_SPEED_2G5; - } else if (portno == SPX5_PORT_VD0) { + } else if (portno == + sparx5_get_internal_port(sparx5, SPX5_PORT_VD0)) { /* IPMC only idle BW */ return SPX5_CAL_SPEED_NONE; - } else if (portno == SPX5_PORT_VD1) { + } else if (portno == + sparx5_get_internal_port(sparx5, SPX5_PORT_VD1)) { /* OAM only idle BW */ return SPX5_CAL_SPEED_NONE; - } else if (portno == SPX5_PORT_VD2) { + } else if (portno == + sparx5_get_internal_port(sparx5, SPX5_PORT_VD2)) { /* IPinIP gets only idle BW */ return SPX5_CAL_SPEED_NONE; } diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c b/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c index 4919719da0cb..88f7509f0980 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_fdma.c @@ -364,7 +364,9 @@ static void sparx5_fdma_injection_mode(struct sparx5 *sparx5) sparx5, QS_INJ_GRP_CFG(INJ_QUEUE)); /* CPU ports capture setup */ - for (portno = SPX5_PORT_CPU_0; portno <= SPX5_PORT_CPU_1; portno++) { + for (portno = sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_0); + portno <= sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_1); + portno++) { /* ASM CPU port: No preamble, IFH, enable padding */ spx5_wr(ASM_PORT_CFG_PAD_ENA_SET(1) | ASM_PORT_CFG_NO_PREAMBLE_ENA_SET(1) | diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c b/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c index 56f6b94c4ef3..f5584244612c 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_mactable.c @@ -129,7 +129,8 @@ int sparx5_mc_sync(struct net_device *dev, const unsigned char *addr) struct sparx5_port *port = netdev_priv(dev); struct sparx5 *sparx5 = port->sparx5; - return sparx5_mact_learn(sparx5, PGID_CPU, addr, port->pvid); + return sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), + addr, port->pvid); } static int sparx5_mact_get(struct sparx5 *sparx5, diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c index b887e2b740c7..d1e9bc030c80 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c @@ -649,13 +649,14 @@ static int sparx5_start(struct sparx5 *sparx5) sparx5_update_fwd(sparx5); /* CPU copy CPU pgids */ - spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), - sparx5, ANA_AC_PGID_MISC_CFG(PGID_CPU)); - spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), - sparx5, ANA_AC_PGID_MISC_CFG(PGID_BCAST)); + spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), sparx5, + ANA_AC_PGID_MISC_CFG(sparx5_get_pgid(sparx5, PGID_CPU))); + spx5_wr(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(1), sparx5, + ANA_AC_PGID_MISC_CFG(sparx5_get_pgid(sparx5, PGID_BCAST))); /* Recalc injected frame FCS */ - for (idx = SPX5_PORT_CPU_0; idx <= SPX5_PORT_CPU_1; idx++) + for (idx = sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_0); + idx <= sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_1); idx++) spx5_rmw(ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA_SET(1), ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA, sparx5, ANA_CL_FILTER_CTRL(idx)); @@ -670,7 +671,8 @@ static int sparx5_start(struct sparx5 *sparx5) sparx5_vlan_init(sparx5); /* Add host mode BC address (points only to CPU) */ - sparx5_mact_learn(sparx5, PGID_CPU, broadcast, NULL_VID); + sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), broadcast, + NULL_VID); /* Enable queue limitation watermarks */ sparx5_qlim_set(sparx5); diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h index fb179088588a..364ae92969bc 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.h +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.h @@ -54,23 +54,21 @@ enum sparx5_vlan_port_type { #define SPX5_PORTS 65 #define SPX5_PORTS_ALL 70 /* Total number of ports */ -#define SPX5_PORT_CPU (SPX5_PORTS) /* Next port is CPU port */ -#define SPX5_PORT_CPU_0 (SPX5_PORT_CPU + 0) /* CPU Port 65 */ -#define SPX5_PORT_CPU_1 (SPX5_PORT_CPU + 1) /* CPU Port 66 */ -#define SPX5_PORT_VD0 (SPX5_PORT_CPU + 2) /* VD0/Port 67 used for IPMC */ -#define SPX5_PORT_VD1 (SPX5_PORT_CPU + 3) /* VD1/Port 68 used for AFI/OAM */ -#define SPX5_PORT_VD2 (SPX5_PORT_CPU + 4) /* VD2/Port 69 used for IPinIP*/ - -#define PGID_BASE SPX5_PORTS /* Starts after port PGIDs */ -#define PGID_UC_FLOOD (PGID_BASE + 0) -#define PGID_MC_FLOOD (PGID_BASE + 1) -#define PGID_IPV4_MC_DATA (PGID_BASE + 2) -#define PGID_IPV4_MC_CTRL (PGID_BASE + 3) -#define PGID_IPV6_MC_DATA (PGID_BASE + 4) -#define PGID_IPV6_MC_CTRL (PGID_BASE + 5) -#define PGID_BCAST (PGID_BASE + 6) -#define PGID_CPU (PGID_BASE + 7) -#define PGID_MCAST_START (PGID_BASE + 8) +#define SPX5_PORT_CPU_0 0 /* CPU Port 0 */ +#define SPX5_PORT_CPU_1 1 /* CPU Port 1 */ +#define SPX5_PORT_VD0 2 /* VD0/Port used for IPMC */ +#define SPX5_PORT_VD1 3 /* VD1/Port used for AFI/OAM */ +#define SPX5_PORT_VD2 4 /* VD2/Port used for IPinIP*/ + +#define PGID_UC_FLOOD 0 +#define PGID_MC_FLOOD 1 +#define PGID_IPV4_MC_DATA 2 +#define PGID_IPV4_MC_CTRL 3 +#define PGID_IPV6_MC_DATA 4 +#define PGID_IPV6_MC_CTRL 5 +#define PGID_BCAST 6 +#define PGID_CPU 7 +#define PGID_MCAST_START 8 #define PGID_TABLE_SIZE 3290 @@ -500,6 +498,7 @@ enum sparx5_pgid_type { void sparx5_pgid_init(struct sparx5 *spx5); int sparx5_pgid_alloc_mcast(struct sparx5 *spx5, u16 *idx); int sparx5_pgid_free(struct sparx5 *spx5, u16 idx); +int sparx5_get_pgid(struct sparx5 *sparx5, int pgid); /* sparx5_pool.c */ struct sparx5_pool_entry { @@ -516,6 +515,7 @@ int sparx5_pool_get_with_idx(struct sparx5_pool_entry *pool, int size, u32 idx, /* sparx5_port.c */ int sparx5_port_mux_set(struct sparx5 *sparx5, struct sparx5_port *port, struct sparx5_port_config *conf); +int sparx5_get_internal_port(struct sparx5 *sparx5, int port); /* sparx5_sdlb.c */ #define SPX5_SDLB_PUP_TOKEN_DISABLE 0x1FFF diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c b/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c index c61b22a96e22..d4e9986ef16a 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_netdev.c @@ -68,7 +68,8 @@ void sparx5_set_port_ifh(struct sparx5 *sparx5, void *ifh_hdr, u16 portno) /* MISC.PIPELINE_ACT */ ifh_encode_bitfield(ifh_hdr, 1, 42, 3); /* FWD.SRC_PORT = CPU */ - ifh_encode_bitfield(ifh_hdr, SPX5_PORT_CPU, 46, 7); + ifh_encode_bitfield(ifh_hdr, sparx5_get_pgid(sparx5, SPX5_PORT_CPU_0), + 46, 7); /* FWD.SFLOW_ID (disable SFlow sampling) */ ifh_encode_bitfield(ifh_hdr, 124, 57, 7); /* FWD.UPDATE_FCS = Enable. Enforce update of FCS. */ @@ -190,7 +191,8 @@ static int sparx5_set_mac_address(struct net_device *dev, void *p) sparx5_mact_forget(sparx5, dev->dev_addr, port->pvid); /* Add new */ - sparx5_mact_learn(sparx5, PGID_CPU, addr->sa_data, port->pvid); + sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), + addr->sa_data, port->pvid); /* Record the address */ eth_hw_addr_set(dev, addr->sa_data); diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c index 700842ec7608..5bfa86a71ac8 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_packet.c @@ -317,7 +317,9 @@ int sparx5_manual_injection_mode(struct sparx5 *sparx5) sparx5, QS_INJ_GRP_CFG(INJ_QUEUE)); /* CPU ports capture setup */ - for (portno = SPX5_PORT_CPU_0; portno <= SPX5_PORT_CPU_1; portno++) { + for (portno = sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_0); + portno <= sparx5_get_internal_port(sparx5, SPX5_PORT_CPU_1); + portno++) { /* ASM CPU port: No preamble, IFH, enable padding */ spx5_wr(ASM_PORT_CFG_PAD_ENA_SET(1) | ASM_PORT_CFG_NO_PREAMBLE_ENA_SET(1) | diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c b/drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c index 78ef99b833ed..eae819fa9486 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_pgid.c @@ -11,7 +11,7 @@ void sparx5_pgid_init(struct sparx5 *spx5) /* Reserved for unicast, flood control, broadcast, and CPU. * These cannot be freed. */ - for (i = 0; i <= PGID_CPU; i++) + for (i = 0; i <= sparx5_get_pgid(spx5, PGID_CPU); i++) spx5->pgid_map[i] = SPX5_PGID_RESERVED; } @@ -22,7 +22,8 @@ int sparx5_pgid_alloc_mcast(struct sparx5 *spx5, u16 *idx) /* The multicast area starts at index 65, but the first 7 * are reserved for flood masks and CPU. Start alloc after that. */ - for (i = PGID_MCAST_START; i < spx5->data->consts->n_pgids; i++) { + for (i = sparx5_get_pgid(spx5, PGID_MCAST_START); + i < spx5->data->consts->n_pgids; i++) { if (spx5->pgid_map[i] == SPX5_PGID_FREE) { spx5->pgid_map[i] = SPX5_PGID_MULTICAST; *idx = i; @@ -35,7 +36,8 @@ int sparx5_pgid_alloc_mcast(struct sparx5 *spx5, u16 *idx) int sparx5_pgid_free(struct sparx5 *spx5, u16 idx) { - if (idx <= PGID_CPU || idx >= spx5->data->consts->n_pgids) + if (idx <= sparx5_get_pgid(spx5, PGID_CPU) || + idx >= spx5->data->consts->n_pgids) return -EINVAL; if (spx5->pgid_map[idx] == SPX5_PGID_FREE) @@ -44,3 +46,8 @@ int sparx5_pgid_free(struct sparx5 *spx5, u16 idx) spx5->pgid_map[idx] = SPX5_PGID_FREE; return 0; } + +int sparx5_get_pgid(struct sparx5 *sparx5, int pgid) +{ + return sparx5->data->consts->n_ports + pgid; +} diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c index 0dc2201fe653..0b38b4cb0929 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_port.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_port.c @@ -1352,3 +1352,8 @@ int sparx5_port_qos_default_set(const struct sparx5_port *port, return 0; } + +int sparx5_get_internal_port(struct sparx5 *sparx5, int port) +{ + return sparx5->data->consts->n_ports + port; +} diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c index d1e7b85bdffa..bc9ecb9392cd 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.c @@ -32,24 +32,34 @@ static int sparx5_port_attr_pre_bridge_flags(struct sparx5_port *port, static void sparx5_port_update_mcast_ip_flood(struct sparx5_port *port, bool flood_flag) { bool should_flood = flood_flag || port->is_mrouter; + struct sparx5 *sparx5 = port->sparx5; int pgid; - for (pgid = PGID_IPV4_MC_DATA; pgid <= PGID_IPV6_MC_CTRL; pgid++) + for (pgid = sparx5_get_pgid(sparx5, PGID_IPV4_MC_DATA); + pgid <= sparx5_get_pgid(sparx5, PGID_IPV6_MC_CTRL); pgid++) sparx5_pgid_update_mask(port, pgid, should_flood); } static void sparx5_port_attr_bridge_flags(struct sparx5_port *port, struct switchdev_brport_flags flags) { + struct sparx5 *sparx5 = port->sparx5; + if (flags.mask & BR_MCAST_FLOOD) { - sparx5_pgid_update_mask(port, PGID_MC_FLOOD, !!(flags.val & BR_MCAST_FLOOD)); + sparx5_pgid_update_mask(port, + sparx5_get_pgid(sparx5, PGID_MC_FLOOD), + !!(flags.val & BR_MCAST_FLOOD)); sparx5_port_update_mcast_ip_flood(port, !!(flags.val & BR_MCAST_FLOOD)); } if (flags.mask & BR_FLOOD) - sparx5_pgid_update_mask(port, PGID_UC_FLOOD, !!(flags.val & BR_FLOOD)); + sparx5_pgid_update_mask(port, + sparx5_get_pgid(sparx5, PGID_UC_FLOOD), + !!(flags.val & BR_FLOOD)); if (flags.mask & BR_BCAST_FLOOD) - sparx5_pgid_update_mask(port, PGID_BCAST, !!(flags.val & BR_BCAST_FLOOD)); + sparx5_pgid_update_mask(port, + sparx5_get_pgid(sparx5, PGID_BCAST), + !!(flags.val & BR_BCAST_FLOOD)); } static void sparx5_attr_stp_state_set(struct sparx5_port *port, @@ -219,7 +229,8 @@ static void sparx5_port_bridge_leave(struct sparx5_port *port, port->vid = NULL_VID; /* Forward frames to CPU */ - sparx5_mact_learn(sparx5, PGID_CPU, port->ndev->dev_addr, 0); + sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), + port->ndev->dev_addr, 0); /* Port enters in host more therefore restore mc list */ __dev_mc_sync(port->ndev, sparx5_mc_sync, sparx5_mc_unsync); @@ -254,7 +265,8 @@ static int sparx5_port_add_addr(struct net_device *dev, bool up) u16 vid = port->pvid; if (up) - sparx5_mact_learn(sparx5, PGID_CPU, port->ndev->dev_addr, vid); + sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_CPU), + port->ndev->dev_addr, vid); else sparx5_mact_forget(sparx5, port->ndev->dev_addr, vid); @@ -330,7 +342,8 @@ static void sparx5_switchdev_bridge_fdb_event_work(struct work_struct *work) switch (switchdev_work->event) { case SWITCHDEV_FDB_ADD_TO_DEVICE: if (host_addr) - sparx5_add_mact_entry(sparx5, dev, PGID_CPU, + sparx5_add_mact_entry(sparx5, dev, + sparx5_get_pgid(sparx5, PGID_CPU), fdb_info->addr, vid); else sparx5_add_mact_entry(sparx5, port->ndev, port->portno, @@ -418,8 +431,8 @@ static int sparx5_handle_port_vlan_add(struct net_device *dev, switchdev_blocking_nb); /* Flood broadcast to CPU */ - sparx5_mact_learn(sparx5, PGID_BCAST, dev->broadcast, - v->vid); + sparx5_mact_learn(sparx5, sparx5_get_pgid(sparx5, PGID_BCAST), + dev->broadcast, v->vid); return 0; } diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c b/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c index 80d2d3e8f458..d42097aa60a0 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_vlan.c @@ -168,7 +168,8 @@ void sparx5_update_fwd(struct sparx5 *sparx5) bitmap_to_arr32(mask, sparx5->bridge_fwd_mask, SPX5_PORTS); /* Update flood masks */ - for (port = PGID_UC_FLOOD; port <= PGID_BCAST; port++) { + for (port = sparx5_get_pgid(sparx5, PGID_UC_FLOOD); + port <= sparx5_get_pgid(sparx5, PGID_BCAST); port++) { spx5_wr(mask[0], sparx5, ANA_AC_PGID_CFG(port)); if (is_sparx5(sparx5)) { spx5_wr(mask[1], sparx5, ANA_AC_PGID_CFG1(port)); -- 2.51.0 From 1aa772be0444a2bd06957f6d31865e80e6ae4244 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Fri, 4 Oct 2024 17:24:17 +0200 Subject: [PATCH 05/16] dt-bindings: net: fec: add pps channel property Add fsl,pps-channel property to select where to connect the PPS signal. This depends on the internal SoC routing and on the board, for example on the i.MX8 SoC it can be connected to an external pin (using channel 1) or to internal eDMA as DMA request (channel 0). Signed-off-by: Francesco Dolcini Acked-by: Conor Dooley Signed-off-by: Paolo Abeni --- Documentation/devicetree/bindings/net/fsl,fec.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml index 5536c06139ca..24e863fdbdab 100644 --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml @@ -183,6 +183,13 @@ properties: description: Register bits of stop mode control, the format is <&gpr req_gpr req_bit>. + fsl,pps-channel: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + description: + Specifies to which timer instance the PPS signal is routed. + enum: [0, 1, 2, 3] + mdio: $ref: mdio.yaml# unevaluatedProperties: false -- 2.51.0 From bf8ca67e21671e7a56e31da45360480b28f185f1 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Fri, 4 Oct 2024 17:24:18 +0200 Subject: [PATCH 06/16] net: fec: refactor PPS channel configuration MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Preparation patch to allow for PPS channel configuration, no functional change intended. Signed-off-by: Francesco Dolcini Reviewed-by: Frank Li Reviewed-by: Csókás, Bence Signed-off-by: Paolo Abeni --- drivers/net/ethernet/freescale/fec_ptp.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index a4eb6edb850a..37e1c895f1b8 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -84,8 +84,7 @@ #define FEC_CC_MULT (1 << 31) #define FEC_COUNTER_PERIOD (1 << 31) #define PPS_OUPUT_RELOAD_PERIOD NSEC_PER_SEC -#define FEC_CHANNLE_0 0 -#define DEFAULT_PPS_CHANNEL FEC_CHANNLE_0 +#define DEFAULT_PPS_CHANNEL 0 #define FEC_PTP_MAX_NSEC_PERIOD 4000000000ULL #define FEC_PTP_MAX_NSEC_COUNTER 0x80000000ULL @@ -524,8 +523,9 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp, unsigned long flags; int ret = 0; + fep->pps_channel = DEFAULT_PPS_CHANNEL; + if (rq->type == PTP_CLK_REQ_PPS) { - fep->pps_channel = DEFAULT_PPS_CHANNEL; fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; ret = fec_ptp_enable_pps(fep, on); @@ -536,10 +536,9 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp, if (rq->perout.flags) return -EOPNOTSUPP; - if (rq->perout.index != DEFAULT_PPS_CHANNEL) + if (rq->perout.index != fep->pps_channel) return -EOPNOTSUPP; - fep->pps_channel = DEFAULT_PPS_CHANNEL; period.tv_sec = rq->perout.period.sec; period.tv_nsec = rq->perout.period.nsec; period_ns = timespec64_to_ns(&period); -- 2.51.0 From 566c2d83887f0570056833102adc5b88e681b0c7 Mon Sep 17 00:00:00 2001 From: Francesco Dolcini Date: Fri, 4 Oct 2024 17:24:19 +0200 Subject: [PATCH 07/16] net: fec: make PPS channel configurable MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Depending on the SoC where the FEC is integrated into the PPS channel might be routed to different timer instances. Make this configurable from the devicetree. When the related DT property is not present fallback to the previous default and use channel 0. Reviewed-by: Frank Li Tested-by: Rafael Beims Signed-off-by: Francesco Dolcini Reviewed-by: Csókás, Bence Signed-off-by: Paolo Abeni --- drivers/net/ethernet/freescale/fec_ptp.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index 37e1c895f1b8..7f6b57432071 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c @@ -523,8 +523,6 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp, unsigned long flags; int ret = 0; - fep->pps_channel = DEFAULT_PPS_CHANNEL; - if (rq->type == PTP_CLK_REQ_PPS) { fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; @@ -706,12 +704,16 @@ void fec_ptp_init(struct platform_device *pdev, int irq_idx) { struct net_device *ndev = platform_get_drvdata(pdev); struct fec_enet_private *fep = netdev_priv(ndev); + struct device_node *np = fep->pdev->dev.of_node; int irq; int ret; fep->ptp_caps.owner = THIS_MODULE; strscpy(fep->ptp_caps.name, "fec ptp", sizeof(fep->ptp_caps.name)); + fep->pps_channel = DEFAULT_PPS_CHANNEL; + of_property_read_u32(np, "fsl,pps-channel", &fep->pps_channel); + fep->ptp_caps.max_adj = 250000000; fep->ptp_caps.n_alarm = 0; fep->ptp_caps.n_ext_ts = 0; -- 2.51.0 From ec763c234d7f60c5bce0fa2611ba79f5be1af76b Mon Sep 17 00:00:00 2001 From: Kuniyuki Iwashima Date: Fri, 4 Oct 2024 15:10:28 -0700 Subject: [PATCH 08/16] Revert "rtnetlink: add guard for RTNL" This reverts commit 464eb03c4a7cfb32cb3324249193cf6bb5b35152. Once we have a per-netns RTNL, we won't use guard(rtnl). Also, there's no users for now. $ grep -rnI "guard(rtnl" || true $ Suggested-by: Eric Dumazet Link: https://lore.kernel.org/netdev/CANn89i+KoYzUH+VPLdGmLABYf5y4TW0hrM4UAeQQJ9AREty0iw@mail.gmail.com/ Signed-off-by: Kuniyuki Iwashima Reviewed-by: Eric Dumazet Signed-off-by: Paolo Abeni --- include/linux/rtnetlink.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index a7da7dfc06a2..cdfc897f1e3c 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -7,7 +7,6 @@ #include #include #include -#include #include extern int rtnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, u32 group, int echo); @@ -47,8 +46,6 @@ extern int rtnl_is_locked(void); extern int rtnl_lock_killable(void); extern bool refcount_dec_and_rtnl_lock(refcount_t *r); -DEFINE_LOCK_GUARD_0(rtnl, rtnl_lock(), rtnl_unlock()) - extern wait_queue_head_t netdev_unregistering_wq; extern atomic_t dev_unreg_count; extern struct rw_semaphore pernet_ops_rwsem; -- 2.51.0 From 76aed95319da25d6884dff01d5f0149e4b542f96 Mon Sep 17 00:00:00 2001 From: Kuniyuki Iwashima Date: Fri, 4 Oct 2024 15:10:29 -0700 Subject: [PATCH 09/16] rtnetlink: Add per-netns RTNL. The goal is to break RTNL down into per-netns mutex. This patch adds per-netns mutex and its helper functions, rtnl_net_lock() and rtnl_net_unlock(). rtnl_net_lock() acquires the global RTNL and per-netns RTNL mutex, and rtnl_net_unlock() releases them. We will replace 800+ rtnl_lock() with rtnl_net_lock() and finally removes rtnl_lock() in rtnl_net_lock(). When we need to nest per-netns RTNL mutex, we will use __rtnl_net_lock(), and its locking order is defined by rtnl_net_lock_cmp_fn() as follows: 1. init_net is first 2. netns address ascending order Note that the conversion will be done under CONFIG_DEBUG_NET_SMALL_RTNL with LOCKDEP so that we can carefully add the extra mutex without slowing down RTNL operations during conversion. Signed-off-by: Kuniyuki Iwashima Reviewed-by: Eric Dumazet Signed-off-by: Paolo Abeni --- include/linux/rtnetlink.h | 21 ++++++++++++++ include/net/net_namespace.h | 4 +++ net/Kconfig.debug | 15 ++++++++++ net/core/net_namespace.c | 6 ++++ net/core/rtnetlink.c | 58 +++++++++++++++++++++++++++++++++++++ 5 files changed, 104 insertions(+) diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index cdfc897f1e3c..edd840a49989 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -92,6 +92,27 @@ static inline bool lockdep_rtnl_is_held(void) #define rcu_replace_pointer_rtnl(rp, p) \ rcu_replace_pointer(rp, p, lockdep_rtnl_is_held()) +#ifdef CONFIG_DEBUG_NET_SMALL_RTNL +void __rtnl_net_lock(struct net *net); +void __rtnl_net_unlock(struct net *net); +void rtnl_net_lock(struct net *net); +void rtnl_net_unlock(struct net *net); +int rtnl_net_lock_cmp_fn(const struct lockdep_map *a, const struct lockdep_map *b); +#else +static inline void __rtnl_net_lock(struct net *net) {} +static inline void __rtnl_net_unlock(struct net *net) {} + +static inline void rtnl_net_lock(struct net *net) +{ + rtnl_lock(); +} + +static inline void rtnl_net_unlock(struct net *net) +{ + rtnl_unlock(); +} +#endif + static inline struct netdev_queue *dev_ingress_queue(struct net_device *dev) { return rtnl_dereference(dev->ingress_queue); diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h index e67b483cc8bb..873c0f9fdac6 100644 --- a/include/net/net_namespace.h +++ b/include/net/net_namespace.h @@ -188,6 +188,10 @@ struct net { #if IS_ENABLED(CONFIG_SMC) struct netns_smc smc; #endif +#ifdef CONFIG_DEBUG_NET_SMALL_RTNL + /* Move to a better place when the config guard is removed. */ + struct mutex rtnl_mutex; +#endif } __randomize_layout; #include diff --git a/net/Kconfig.debug b/net/Kconfig.debug index 5e3fffe707dd..277fab8c4d77 100644 --- a/net/Kconfig.debug +++ b/net/Kconfig.debug @@ -24,3 +24,18 @@ config DEBUG_NET help Enable extra sanity checks in networking. This is mostly used by fuzzers, but is safe to select. + +config DEBUG_NET_SMALL_RTNL + bool "Add extra per-netns mutex inside RTNL" + depends on DEBUG_KERNEL && NET && LOCK_DEBUGGING_SUPPORT + select PROVE_LOCKING + default n + help + rtnl_lock() is being replaced with rtnl_net_lock() that + acquires the global RTNL and a small per-netns RTNL mutex. + + During the conversion, rtnl_net_lock() just adds an extra + mutex in every RTNL scope and slows down the operations. + + Once the conversion completes, rtnl_lock() will be removed + and rtnetlink will gain per-netns scalability. diff --git a/net/core/net_namespace.c b/net/core/net_namespace.c index e39479f1c9a4..105e3cd26763 100644 --- a/net/core/net_namespace.c +++ b/net/core/net_namespace.c @@ -334,6 +334,12 @@ static __net_init void preinit_net(struct net *net, struct user_namespace *user_ idr_init(&net->netns_ids); spin_lock_init(&net->nsid_lock); mutex_init(&net->ipv4.ra_mutex); + +#ifdef CONFIG_DEBUG_NET_SMALL_RTNL + mutex_init(&net->rtnl_mutex); + lock_set_cmp_fn(&net->rtnl_mutex, rtnl_net_lock_cmp_fn, NULL); +#endif + preinit_net_sysctl(net); } diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 682d8d3127db..46567fa54e42 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -179,6 +179,64 @@ bool lockdep_rtnl_is_held(void) EXPORT_SYMBOL(lockdep_rtnl_is_held); #endif /* #ifdef CONFIG_PROVE_LOCKING */ +#ifdef CONFIG_DEBUG_NET_SMALL_RTNL +void __rtnl_net_lock(struct net *net) +{ + ASSERT_RTNL(); + + mutex_lock(&net->rtnl_mutex); +} +EXPORT_SYMBOL(__rtnl_net_lock); + +void __rtnl_net_unlock(struct net *net) +{ + ASSERT_RTNL(); + + mutex_unlock(&net->rtnl_mutex); +} +EXPORT_SYMBOL(__rtnl_net_unlock); + +void rtnl_net_lock(struct net *net) +{ + rtnl_lock(); + __rtnl_net_lock(net); +} +EXPORT_SYMBOL(rtnl_net_lock); + +void rtnl_net_unlock(struct net *net) +{ + __rtnl_net_unlock(net); + rtnl_unlock(); +} +EXPORT_SYMBOL(rtnl_net_unlock); + +static int rtnl_net_cmp_locks(const struct net *net_a, const struct net *net_b) +{ + if (net_eq(net_a, net_b)) + return 0; + + /* always init_net first */ + if (net_eq(net_a, &init_net)) + return -1; + + if (net_eq(net_b, &init_net)) + return 1; + + /* otherwise lock in ascending order */ + return net_a < net_b ? -1 : 1; +} + +int rtnl_net_lock_cmp_fn(const struct lockdep_map *a, const struct lockdep_map *b) +{ + const struct net *net_a, *net_b; + + net_a = container_of(a, struct net, rtnl_mutex.dep_map); + net_b = container_of(b, struct net, rtnl_mutex.dep_map); + + return rtnl_net_cmp_locks(net_a, net_b); +} +#endif + static struct rtnl_link __rcu *__rcu *rtnl_msg_handlers[RTNL_FAMILY_MAX + 1]; static inline int rtm_msgindex(int msgtype) -- 2.51.0 From 844e5e7e656d3a7a904fd5607f8491d6fd01db8e Mon Sep 17 00:00:00 2001 From: Kuniyuki Iwashima Date: Fri, 4 Oct 2024 15:10:30 -0700 Subject: [PATCH 10/16] rtnetlink: Add assertion helpers for per-netns RTNL. Once an RTNL scope is converted with rtnl_net_lock(), we will replace RTNL helper functions inside the scope with the following per-netns alternatives: ASSERT_RTNL() -> ASSERT_RTNL_NET(net) rcu_dereference_rtnl(p) -> rcu_dereference_rtnl_net(net, p) Note that the per-netns helpers are equivalent to the conventional helpers unless CONFIG_DEBUG_NET_SMALL_RTNL is enabled. Signed-off-by: Kuniyuki Iwashima Reviewed-by: Eric Dumazet Signed-off-by: Paolo Abeni --- include/linux/rtnetlink.h | 45 +++++++++++++++++++++++++++++++++++---- net/core/rtnetlink.c | 12 +++++++++++ 2 files changed, 53 insertions(+), 4 deletions(-) diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index edd840a49989..8468a4ce8510 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -51,6 +51,10 @@ extern atomic_t dev_unreg_count; extern struct rw_semaphore pernet_ops_rwsem; extern struct rw_semaphore net_rwsem; +#define ASSERT_RTNL() \ + WARN_ONCE(!rtnl_is_locked(), \ + "RTNL: assertion failed at %s (%d)\n", __FILE__, __LINE__) + #ifdef CONFIG_PROVE_LOCKING extern bool lockdep_rtnl_is_held(void); #else @@ -98,6 +102,22 @@ void __rtnl_net_unlock(struct net *net); void rtnl_net_lock(struct net *net); void rtnl_net_unlock(struct net *net); int rtnl_net_lock_cmp_fn(const struct lockdep_map *a, const struct lockdep_map *b); + +bool rtnl_net_is_locked(struct net *net); + +#define ASSERT_RTNL_NET(net) \ + WARN_ONCE(!rtnl_net_is_locked(net), \ + "RTNL_NET: assertion failed at %s (%d)\n", \ + __FILE__, __LINE__) + +bool lockdep_rtnl_net_is_held(struct net *net); + +#define rcu_dereference_rtnl_net(net, p) \ + rcu_dereference_check(p, lockdep_rtnl_net_is_held(net)) +#define rtnl_net_dereference(net, p) \ + rcu_dereference_protected(p, lockdep_rtnl_net_is_held(net)) +#define rcu_replace_pointer_rtnl_net(net, rp, p) \ + rcu_replace_pointer(rp, p, lockdep_rtnl_net_is_held(net)) #else static inline void __rtnl_net_lock(struct net *net) {} static inline void __rtnl_net_unlock(struct net *net) {} @@ -111,6 +131,27 @@ static inline void rtnl_net_unlock(struct net *net) { rtnl_unlock(); } + +static inline void ASSERT_RTNL_NET(struct net *net) +{ + ASSERT_RTNL(); +} + +static inline void *rcu_dereference_rtnl_net(struct net *net, void *p) +{ + return rcu_dereference_rtnl(p); +} + +static inline void *rtnl_net_dereference(struct net *net, void *p) +{ + return rtnl_dereference(p); +} + +static inline void *rcu_replace_pointer_rtnl_net(struct net *net, + void *rp, void *p) +{ + return rcu_replace_pointer_rtnl(rp, p); +} #endif static inline struct netdev_queue *dev_ingress_queue(struct net_device *dev) @@ -140,10 +181,6 @@ void rtnetlink_init(void); void __rtnl_unlock(void); void rtnl_kfree_skbs(struct sk_buff *head, struct sk_buff *tail); -#define ASSERT_RTNL() \ - WARN_ONCE(!rtnl_is_locked(), \ - "RTNL: assertion failed at %s (%d)\n", __FILE__, __LINE__) - extern int ndo_dflt_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb, struct net_device *dev, diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c index 46567fa54e42..6d68247aea70 100644 --- a/net/core/rtnetlink.c +++ b/net/core/rtnetlink.c @@ -235,6 +235,18 @@ int rtnl_net_lock_cmp_fn(const struct lockdep_map *a, const struct lockdep_map * return rtnl_net_cmp_locks(net_a, net_b); } + +bool rtnl_net_is_locked(struct net *net) +{ + return rtnl_is_locked() && mutex_is_locked(&net->rtnl_mutex); +} +EXPORT_SYMBOL(rtnl_net_is_locked); + +bool lockdep_rtnl_net_is_held(struct net *net) +{ + return lockdep_rtnl_is_held() && lockdep_is_held(&net->rtnl_mutex); +} +EXPORT_SYMBOL(lockdep_rtnl_net_is_held); #endif static struct rtnl_link __rcu *__rcu *rtnl_msg_handlers[RTNL_FAMILY_MAX + 1]; -- 2.51.0 From 03fa534856593bb4edf4935451fa55863e34a108 Mon Sep 17 00:00:00 2001 From: Kuniyuki Iwashima Date: Fri, 4 Oct 2024 15:10:31 -0700 Subject: [PATCH 11/16] rtnetlink: Add ASSERT_RTNL_NET() placeholder for netdev notifier. The global and per-netns netdev notifier depend on RTNL, and its dependency is not so clear due to nested calls. Let's add a placeholder to place ASSERT_RTNL_NET() for each event. Signed-off-by: Kuniyuki Iwashima Reviewed-by: Eric Dumazet Signed-off-by: Paolo Abeni --- net/core/Makefile | 1 + net/core/rtnl_net_debug.c | 131 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 132 insertions(+) create mode 100644 net/core/rtnl_net_debug.c diff --git a/net/core/Makefile b/net/core/Makefile index c3ebbaf9c81e..5a72a87ee0f1 100644 --- a/net/core/Makefile +++ b/net/core/Makefile @@ -45,3 +45,4 @@ obj-$(CONFIG_BPF_SYSCALL) += bpf_sk_storage.o obj-$(CONFIG_OF) += of_net.o obj-$(CONFIG_NET_TEST) += net_test.o obj-$(CONFIG_NET_DEVMEM) += devmem.o +obj-$(CONFIG_DEBUG_NET_SMALL_RTNL) += rtnl_net_debug.o diff --git a/net/core/rtnl_net_debug.c b/net/core/rtnl_net_debug.c new file mode 100644 index 000000000000..e90a32242e22 --- /dev/null +++ b/net/core/rtnl_net_debug.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* Copyright Amazon.com Inc. or its affiliates. */ + +#include +#include +#include +#include +#include +#include + +static int rtnl_net_debug_event(struct notifier_block *nb, + unsigned long event, void *ptr) +{ + struct net_device *dev = netdev_notifier_info_to_dev(ptr); + struct net *net = dev_net(dev); + enum netdev_cmd cmd = event; + + /* Keep enum and don't add default to trigger -Werror=switch */ + switch (cmd) { + case NETDEV_UP: + case NETDEV_DOWN: + case NETDEV_REBOOT: + case NETDEV_CHANGE: + case NETDEV_REGISTER: + case NETDEV_UNREGISTER: + case NETDEV_CHANGEMTU: + case NETDEV_CHANGEADDR: + case NETDEV_PRE_CHANGEADDR: + case NETDEV_GOING_DOWN: + case NETDEV_CHANGENAME: + case NETDEV_FEAT_CHANGE: + case NETDEV_BONDING_FAILOVER: + case NETDEV_PRE_UP: + case NETDEV_PRE_TYPE_CHANGE: + case NETDEV_POST_TYPE_CHANGE: + case NETDEV_POST_INIT: + case NETDEV_PRE_UNINIT: + case NETDEV_RELEASE: + case NETDEV_NOTIFY_PEERS: + case NETDEV_JOIN: + case NETDEV_CHANGEUPPER: + case NETDEV_RESEND_IGMP: + case NETDEV_PRECHANGEMTU: + case NETDEV_CHANGEINFODATA: + case NETDEV_BONDING_INFO: + case NETDEV_PRECHANGEUPPER: + case NETDEV_CHANGELOWERSTATE: + case NETDEV_UDP_TUNNEL_PUSH_INFO: + case NETDEV_UDP_TUNNEL_DROP_INFO: + case NETDEV_CHANGE_TX_QUEUE_LEN: + case NETDEV_CVLAN_FILTER_PUSH_INFO: + case NETDEV_CVLAN_FILTER_DROP_INFO: + case NETDEV_SVLAN_FILTER_PUSH_INFO: + case NETDEV_SVLAN_FILTER_DROP_INFO: + case NETDEV_OFFLOAD_XSTATS_ENABLE: + case NETDEV_OFFLOAD_XSTATS_DISABLE: + case NETDEV_OFFLOAD_XSTATS_REPORT_USED: + case NETDEV_OFFLOAD_XSTATS_REPORT_DELTA: + case NETDEV_XDP_FEAT_CHANGE: + ASSERT_RTNL(); + break; + + /* Once an event fully supports RTNL_NET, move it here + * and remove "if (0)" below. + * + * case NETDEV_XXX: + * ASSERT_RTNL_NET(net); + * break; + */ + } + + /* Just to avoid unused-variable error for dev and net. */ + if (0) + ASSERT_RTNL_NET(net); + + return NOTIFY_DONE; +} + +static int rtnl_net_debug_net_id; + +static int __net_init rtnl_net_debug_net_init(struct net *net) +{ + struct notifier_block *nb; + + nb = net_generic(net, rtnl_net_debug_net_id); + nb->notifier_call = rtnl_net_debug_event; + + return register_netdevice_notifier_net(net, nb); +} + +static void __net_exit rtnl_net_debug_net_exit(struct net *net) +{ + struct notifier_block *nb; + + nb = net_generic(net, rtnl_net_debug_net_id); + unregister_netdevice_notifier_net(net, nb); +} + +static struct pernet_operations rtnl_net_debug_net_ops __net_initdata = { + .init = rtnl_net_debug_net_init, + .exit = rtnl_net_debug_net_exit, + .id = &rtnl_net_debug_net_id, + .size = sizeof(struct notifier_block), +}; + +static struct notifier_block rtnl_net_debug_block = { + .notifier_call = rtnl_net_debug_event, +}; + +static int __init rtnl_net_debug_init(void) +{ + int ret; + + ret = register_pernet_device(&rtnl_net_debug_net_ops); + if (ret) + return ret; + + ret = register_netdevice_notifier(&rtnl_net_debug_block); + if (ret) + unregister_pernet_subsys(&rtnl_net_debug_net_ops); + + return ret; +} + +static void __exit rtnl_net_debug_exit(void) +{ + unregister_netdevice_notifier(&rtnl_net_debug_block); + unregister_pernet_device(&rtnl_net_debug_net_ops); +} + +subsys_initcall(rtnl_net_debug_init); -- 2.51.0 From 49717ef01ce1b6dbe4cd12bee0fc25e086c555df Mon Sep 17 00:00:00 2001 From: Joe Damato Date: Fri, 4 Oct 2024 10:54:07 +0000 Subject: [PATCH 12/16] idpf: Don't hard code napi_struct size The sizeof(struct napi_struct) can change. Don't hardcode the size to 400 bytes and instead use "sizeof(struct napi_struct)". Suggested-by: Alexander Lobakin Signed-off-by: Joe Damato Acked-by: Alexander Lobakin Link: https://patch.msgid.link/20241004105407.73585-1-jdamato@fastly.com Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/intel/idpf/idpf_txrx.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.h b/drivers/net/ethernet/intel/idpf/idpf_txrx.h index f0537826f840..9c1fe84108ed 100644 --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.h +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.h @@ -438,7 +438,8 @@ struct idpf_q_vector { __cacheline_group_end_aligned(cold); }; libeth_cacheline_set_assert(struct idpf_q_vector, 112, - 424 + 2 * sizeof(struct dim), + 24 + sizeof(struct napi_struct) + + 2 * sizeof(struct dim), 8 + sizeof(cpumask_var_t)); struct idpf_rx_queue_stats { -- 2.51.0 From 42b2331081178785d50d116c85ca40d728b48291 Mon Sep 17 00:00:00 2001 From: Jakub Kicinski Date: Mon, 7 Oct 2024 08:53:11 -0700 Subject: [PATCH 13/16] tools: ynl-gen: refactor check validation for TypeBinary We only support a single check at a time for TypeBinary. Refactor the code to cover 'exact-len' and make adding new checks easier. Link: https://lore.kernel.org/20241004063855.1a693dd1@kernel.org Link: https://patch.msgid.link/20241007155311.1193382-1-kuba@kernel.org Signed-off-by: Jakub Kicinski --- tools/net/ynl/ynl-gen-c.py | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/tools/net/ynl/ynl-gen-c.py b/tools/net/ynl/ynl-gen-c.py index 717530bc9c52..9e8254aad578 100755 --- a/tools/net/ynl/ynl-gen-c.py +++ b/tools/net/ynl/ynl-gen-c.py @@ -464,17 +464,22 @@ class TypeBinary(Type): return f'.type = YNL_PT_BINARY,' def _attr_policy(self, policy): - if 'exact-len' in self.checks: - mem = 'NLA_POLICY_EXACT_LEN(' + str(self.get_limit('exact-len')) + ')' + if len(self.checks) == 0: + pass + elif len(self.checks) == 1: + check_name = list(self.checks)[0] + if check_name not in {'exact-len', 'min-len'}: + raise Exception('Unsupported check for binary type: ' + check_name) else: - mem = '{ ' - if len(self.checks) == 1 and 'min-len' in self.checks: - mem += '.len = ' + str(self.get_limit('min-len')) - elif len(self.checks) == 0: - mem += '.type = NLA_BINARY' - else: - raise Exception('One or more of binary type checks not implemented, yet') - mem += ', }' + raise Exception('More than one check for binary type not implemented, yet') + + if len(self.checks) == 0: + mem = '{ .type = NLA_BINARY, }' + elif 'exact-len' in self.checks: + mem = 'NLA_POLICY_EXACT_LEN(' + str(self.get_limit('exact-len')) + ')' + elif 'min-len' in self.checks: + mem = '{ .len = ' + str(self.get_limit('min-len')) + ', }' + return mem def attr_put(self, ri, var): -- 2.51.0 From b699c81af0683ad5b7a7e2b3ef4ae3ff8ee41153 Mon Sep 17 00:00:00 2001 From: Wojciech Drewek Date: Wed, 7 Aug 2024 12:35:05 +0200 Subject: [PATCH 14/16] ice: Implement ethtool reset support Enable ethtool reset support. Ethtool reset flags are mapped to the E810 reset type: PF reset: $ ethtool --reset irq dma filter offload CORE reset: $ ethtool --reset irq-shared dma-shared filter-shared \ offload-shared ram-shared GLOBAL reset: $ ethtool --reset irq-shared dma-shared filter-shared \ offload-shared mac-shared phy-shared ram-shared Calling the same set of flags as in PF reset case on port representor triggers VF reset. Reviewed-by: Michal Swiatkowski Reviewed-by: Marcin Szycik Reviewed-by: Przemek Kitszel Acked-by: Jakub Kicinski Signed-off-by: Wojciech Drewek Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) Signed-off-by: Tony Nguyen --- .../device_drivers/ethernet/intel/ice.rst | 31 ++++++++ drivers/net/ethernet/intel/ice/ice_ethtool.c | 77 +++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/Documentation/networking/device_drivers/ethernet/intel/ice.rst b/Documentation/networking/device_drivers/ethernet/intel/ice.rst index 934752f675ba..3c46a48d99ba 100644 --- a/Documentation/networking/device_drivers/ethernet/intel/ice.rst +++ b/Documentation/networking/device_drivers/ethernet/intel/ice.rst @@ -101,6 +101,37 @@ example, if Rx packets are 10 and Netdev (software statistics) displays rx_bytes as "X", then ethtool (hardware statistics) will display rx_bytes as "X+40" (4 bytes CRC x 10 packets). +ethtool reset +------------- +The driver supports 3 types of resets: + +- PF reset - resets only components associated with the given PF, does not + impact other PFs + +- CORE reset - whole adapter is affected, reset all PFs + +- GLOBAL reset - same as CORE but mac and phy components are also reinitialized + +These are mapped to ethtool reset flags as follow: + +- PF reset: + + # ethtool --reset irq dma filter offload + +- CORE reset: + + # ethtool --reset irq-shared dma-shared filter-shared offload-shared \ + ram-shared + +- GLOBAL reset: + + # ethtool --reset irq-shared dma-shared filter-shared offload-shared \ + mac-shared phy-shared ram-shared + +In switchdev mode you can reset a VF using port representor: + + # ethtool --reset irq dma filter offload + Viewing Link Messages --------------------- diff --git a/drivers/net/ethernet/intel/ice/ice_ethtool.c b/drivers/net/ethernet/intel/ice/ice_ethtool.c index d5cc934d1359..2924ac61300d 100644 --- a/drivers/net/ethernet/intel/ice/ice_ethtool.c +++ b/drivers/net/ethernet/intel/ice/ice_ethtool.c @@ -4716,6 +4716,81 @@ static void ice_get_fec_stats(struct net_device *netdev, pi->lport, err); } +#define ICE_ETHTOOL_PFR (ETH_RESET_IRQ | ETH_RESET_DMA | \ + ETH_RESET_FILTER | ETH_RESET_OFFLOAD) + +#define ICE_ETHTOOL_CORER ((ICE_ETHTOOL_PFR | ETH_RESET_RAM) << \ + ETH_RESET_SHARED_SHIFT) + +#define ICE_ETHTOOL_GLOBR (ICE_ETHTOOL_CORER | \ + (ETH_RESET_MAC << ETH_RESET_SHARED_SHIFT) | \ + (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT)) + +#define ICE_ETHTOOL_VFR ICE_ETHTOOL_PFR + +/** + * ice_ethtool_reset - triggers a given type of reset + * @dev: network interface device structure + * @flags: set of reset flags + * + * Return: 0 on success, -EOPNOTSUPP when using unsupported set of flags. + */ +static int ice_ethtool_reset(struct net_device *dev, u32 *flags) +{ + struct ice_netdev_priv *np = netdev_priv(dev); + struct ice_pf *pf = np->vsi->back; + enum ice_reset_req reset; + + switch (*flags) { + case ICE_ETHTOOL_CORER: + reset = ICE_RESET_CORER; + break; + case ICE_ETHTOOL_GLOBR: + reset = ICE_RESET_GLOBR; + break; + case ICE_ETHTOOL_PFR: + reset = ICE_RESET_PFR; + break; + default: + netdev_info(dev, "Unsupported set of ethtool flags"); + return -EOPNOTSUPP; + } + + ice_schedule_reset(pf, reset); + + *flags = 0; + + return 0; +} + +/** + * ice_repr_ethtool_reset - triggers a VF reset + * @dev: network interface device structure + * @flags: set of reset flags + * + * Return: 0 on success, + * -EOPNOTSUPP when using unsupported set of flags + * -EBUSY when VF is not ready for reset. + */ +static int ice_repr_ethtool_reset(struct net_device *dev, u32 *flags) +{ + struct ice_repr *repr = ice_netdev_to_repr(dev); + struct ice_vf *vf; + + if (repr->type != ICE_REPR_TYPE_VF || + *flags != ICE_ETHTOOL_VFR) + return -EOPNOTSUPP; + + vf = repr->vf; + + if (ice_check_vf_ready_for_cfg(vf)) + return -EBUSY; + + *flags = 0; + + return ice_reset_vf(vf, ICE_VF_RESET_VFLR | ICE_VF_RESET_LOCK); +} + static const struct ethtool_ops ice_ethtool_ops = { .cap_rss_ctx_supported = true, .supported_coalesce_params = ETHTOOL_COALESCE_USECS | @@ -4752,6 +4827,7 @@ static const struct ethtool_ops ice_ethtool_ops = { .nway_reset = ice_nway_reset, .get_pauseparam = ice_get_pauseparam, .set_pauseparam = ice_set_pauseparam, + .reset = ice_ethtool_reset, .get_rxfh_key_size = ice_get_rxfh_key_size, .get_rxfh_indir_size = ice_get_rxfh_indir_size, .get_rxfh = ice_get_rxfh, @@ -4804,6 +4880,7 @@ static const struct ethtool_ops ice_ethtool_repr_ops = { .get_strings = ice_repr_get_strings, .get_ethtool_stats = ice_repr_get_ethtool_stats, .get_sset_count = ice_repr_get_sset_count, + .reset = ice_repr_ethtool_reset, }; /** -- 2.51.0 From 59f4d59b25aec39a015c0949f4ec235c7a839c44 Mon Sep 17 00:00:00 2001 From: Paul Greenwalt Date: Tue, 20 Aug 2024 17:26:16 -0400 Subject: [PATCH 15/16] ice: add E830 HW VF mailbox message limit support E830 adds hardware support to prevent the VF from overflowing the PF mailbox with VIRTCHNL messages. E830 will use the hardware feature (ICE_F_MBX_LIMIT) instead of the software solution ice_is_malicious_vf(). To prevent a VF from overflowing the PF, the PF sets the number of messages per VF that can be in the PF's mailbox queue (ICE_MBX_OVERFLOW_WATERMARK). When the PF processes a message from a VF, the PF decrements the per VF message count using the E830_MBX_VF_DEC_TRIG register. Signed-off-by: Paul Greenwalt Reviewed-by: Alexander Lobakin Tested-by: Rafal Romanowski Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/ice/ice.h | 1 + .../net/ethernet/intel/ice/ice_hw_autogen.h | 3 ++ drivers/net/ethernet/intel/ice/ice_lib.c | 3 ++ drivers/net/ethernet/intel/ice/ice_main.c | 24 ++++++++++---- drivers/net/ethernet/intel/ice/ice_sriov.c | 3 +- drivers/net/ethernet/intel/ice/ice_vf_lib.c | 26 +++++++++++++-- drivers/net/ethernet/intel/ice/ice_vf_mbx.c | 32 +++++++++++++++++++ drivers/net/ethernet/intel/ice/ice_vf_mbx.h | 9 ++++++ drivers/net/ethernet/intel/ice/ice_virtchnl.c | 8 +++-- 9 files changed, 96 insertions(+), 13 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h index 558cda577191..2960709f6b62 100644 --- a/drivers/net/ethernet/intel/ice/ice.h +++ b/drivers/net/ethernet/intel/ice/ice.h @@ -207,6 +207,7 @@ enum ice_feature { ICE_F_GNSS, ICE_F_ROCE_LAG, ICE_F_SRIOV_LAG, + ICE_F_MBX_LIMIT, ICE_F_MAX }; diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h index 91cbae1eec89..8d31bfe28cc8 100644 --- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h +++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h @@ -539,5 +539,8 @@ #define E830_PRTMAC_CL01_QNT_THR_CL0_M GENMASK(15, 0) #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4)) #define VFINT_DYN_CTLN_CLEARPBA_M BIT(1) +#define E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH 0x00234000 +#define E830_MBX_VF_DEC_TRIG(_VF) (0x00233800 + (_VF) * 4) +#define E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(_VF) (0x00233000 + (_VF) * 4) #endif /* _ICE_HW_AUTOGEN_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c index 06e712cdc3d9..d4e74f96a8ad 100644 --- a/drivers/net/ethernet/intel/ice/ice_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_lib.c @@ -3880,6 +3880,9 @@ void ice_init_feature_support(struct ice_pf *pf) default: break; } + + if (pf->hw.mac_type == ICE_MAC_E830) + ice_set_feature_support(pf, ICE_F_MBX_LIMIT); } /** diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index eeb48cc48e08..9f6e8a5508a2 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c @@ -1563,12 +1563,20 @@ static int __ice_clean_ctrlq(struct ice_pf *pf, enum ice_ctl_q q_type) ice_vf_lan_overflow_event(pf, &event); break; case ice_mbx_opc_send_msg_to_pf: - data.num_msg_proc = i; - data.num_pending_arq = pending; - data.max_num_msgs_mbx = hw->mailboxq.num_rq_entries; - data.async_watermark_val = ICE_MBX_OVERFLOW_WATERMARK; + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) { + ice_vc_process_vf_msg(pf, &event, NULL); + ice_mbx_vf_dec_trig_e830(hw, &event); + } else { + u16 val = hw->mailboxq.num_rq_entries; + + data.max_num_msgs_mbx = val; + val = ICE_MBX_OVERFLOW_WATERMARK; + data.async_watermark_val = val; + data.num_msg_proc = i; + data.num_pending_arq = pending; - ice_vc_process_vf_msg(pf, &event, &data); + ice_vc_process_vf_msg(pf, &event, &data); + } break; case ice_aqc_opc_fw_logs_event: ice_get_fwlog_data(pf, &event); @@ -4099,7 +4107,11 @@ static int ice_init_pf(struct ice_pf *pf) mutex_init(&pf->vfs.table_lock); hash_init(pf->vfs.table); - ice_mbx_init_snapshot(&pf->hw); + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) + wr32(&pf->hw, E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH, + ICE_MBX_OVERFLOW_WATERMARK); + else + ice_mbx_init_snapshot(&pf->hw); xa_init(&pf->dyn_ports); xa_init(&pf->sf_nums); diff --git a/drivers/net/ethernet/intel/ice/ice_sriov.c b/drivers/net/ethernet/intel/ice/ice_sriov.c index e34fe2516ccc..e7b5fe553d1f 100644 --- a/drivers/net/ethernet/intel/ice/ice_sriov.c +++ b/drivers/net/ethernet/intel/ice/ice_sriov.c @@ -194,7 +194,8 @@ void ice_free_vfs(struct ice_pf *pf) } /* clear malicious info since the VF is getting released */ - list_del(&vf->mbx_info.list_entry); + if (!ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) + list_del(&vf->mbx_info.list_entry); mutex_unlock(&vf->cfg_lock); } diff --git a/drivers/net/ethernet/intel/ice/ice_vf_lib.c b/drivers/net/ethernet/intel/ice/ice_vf_lib.c index a69e91f88d81..d618292dfe27 100644 --- a/drivers/net/ethernet/intel/ice/ice_vf_lib.c +++ b/drivers/net/ethernet/intel/ice/ice_vf_lib.c @@ -709,6 +709,23 @@ ice_vf_clear_vsi_promisc(struct ice_vf *vf, struct ice_vsi *vsi, u8 promisc_m) return 0; } +/** + * ice_reset_vf_mbx_cnt - reset VF mailbox message count + * @vf: pointer to the VF structure + * + * This function clears the VF mailbox message count, and should be called on + * VF reset. + */ +static void ice_reset_vf_mbx_cnt(struct ice_vf *vf) +{ + struct ice_pf *pf = vf->pf; + + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) + ice_mbx_vf_clear_cnt_e830(&pf->hw, vf->vf_id); + else + ice_mbx_clear_malvf(&vf->mbx_info); +} + /** * ice_reset_all_vfs - reset all allocated VFs in one go * @pf: pointer to the PF structure @@ -735,7 +752,7 @@ void ice_reset_all_vfs(struct ice_pf *pf) /* clear all malicious info if the VFs are getting reset */ ice_for_each_vf(pf, bkt, vf) - ice_mbx_clear_malvf(&vf->mbx_info); + ice_reset_vf_mbx_cnt(vf); /* If VFs have been disabled, there is no need to reset */ if (test_and_set_bit(ICE_VF_DIS, pf->state)) { @@ -951,7 +968,7 @@ int ice_reset_vf(struct ice_vf *vf, u32 flags) ice_eswitch_update_repr(&vf->repr_id, vsi); /* if the VF has been reset allow it to come up again */ - ice_mbx_clear_malvf(&vf->mbx_info); + ice_reset_vf_mbx_cnt(vf); out_unlock: if (lag && lag->bonded && lag->primary && @@ -1004,7 +1021,10 @@ void ice_initialize_vf_entry(struct ice_vf *vf) ice_vf_fdir_init(vf); /* Initialize mailbox info for this VF */ - ice_mbx_init_vf_info(&pf->hw, &vf->mbx_info); + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) + ice_mbx_vf_clear_cnt_e830(&pf->hw, vf->vf_id); + else + ice_mbx_init_vf_info(&pf->hw, &vf->mbx_info); mutex_init(&vf->cfg_lock); } diff --git a/drivers/net/ethernet/intel/ice/ice_vf_mbx.c b/drivers/net/ethernet/intel/ice/ice_vf_mbx.c index 40cb4ba0789c..75c8113e58ee 100644 --- a/drivers/net/ethernet/intel/ice/ice_vf_mbx.c +++ b/drivers/net/ethernet/intel/ice/ice_vf_mbx.c @@ -210,6 +210,38 @@ ice_mbx_detect_malvf(struct ice_hw *hw, struct ice_mbx_vf_info *vf_info, return 0; } +/** + * ice_mbx_vf_dec_trig_e830 - Decrements the VF mailbox queue counter + * @hw: pointer to the HW struct + * @event: pointer to the control queue receive event + * + * This function triggers to decrement the counter + * MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT when the driver replenishes + * the buffers at the PF mailbox queue. + */ +void ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, + const struct ice_rq_event_info *event) +{ + u16 vfid = le16_to_cpu(event->desc.retval); + + wr32(hw, E830_MBX_VF_DEC_TRIG(vfid), 1); +} + +/** + * ice_mbx_vf_clear_cnt_e830 - Clear the VF mailbox queue count + * @hw: pointer to the HW struct + * @vf_id: VF ID in the PF space + * + * This function clears the counter MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT, and should + * be called when a VF is created and on VF reset. + */ +void ice_mbx_vf_clear_cnt_e830(const struct ice_hw *hw, u16 vf_id) +{ + u32 reg = rd32(hw, E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(vf_id)); + + wr32(hw, E830_MBX_VF_DEC_TRIG(vf_id), reg); +} + /** * ice_mbx_vf_state_handler - Handle states of the overflow algorithm * @hw: pointer to the HW struct diff --git a/drivers/net/ethernet/intel/ice/ice_vf_mbx.h b/drivers/net/ethernet/intel/ice/ice_vf_mbx.h index 44bc030d17e0..684de89e5c5e 100644 --- a/drivers/net/ethernet/intel/ice/ice_vf_mbx.h +++ b/drivers/net/ethernet/intel/ice/ice_vf_mbx.h @@ -19,6 +19,9 @@ ice_aq_send_msg_to_vf(struct ice_hw *hw, u16 vfid, u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen, struct ice_sq_cd *cd); u32 ice_conv_link_speed_to_virtchnl(bool adv_link_support, u16 link_speed); +void ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, + const struct ice_rq_event_info *event); +void ice_mbx_vf_clear_cnt_e830(const struct ice_hw *hw, u16 vf_id); int ice_mbx_vf_state_handler(struct ice_hw *hw, struct ice_mbx_data *mbx_data, struct ice_mbx_vf_info *vf_info, bool *report_malvf); @@ -47,5 +50,11 @@ static inline void ice_mbx_init_snapshot(struct ice_hw *hw) { } +static inline void +ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, + const struct ice_rq_event_info *event) +{ +} + #endif /* CONFIG_PCI_IOV */ #endif /* _ICE_VF_MBX_H_ */ diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl.c b/drivers/net/ethernet/intel/ice/ice_virtchnl.c index 59f62306b9cb..3c86d0c2fe1f 100644 --- a/drivers/net/ethernet/intel/ice/ice_virtchnl.c +++ b/drivers/net/ethernet/intel/ice/ice_virtchnl.c @@ -4009,8 +4009,10 @@ ice_is_malicious_vf(struct ice_vf *vf, struct ice_mbx_data *mbxdata) * @event: pointer to the AQ event * @mbxdata: information used to detect VF attempting mailbox overflow * - * called from the common asq/arq handler to - * process request from VF + * Called from the common asq/arq handler to process request from VF. When this + * flow is used for devices with hardware VF to PF message queue overflow + * support (ICE_F_MBX_LIMIT) mbxdata is set to NULL and ice_is_malicious_vf + * check is skipped. */ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event, struct ice_mbx_data *mbxdata) @@ -4036,7 +4038,7 @@ void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event, mutex_lock(&vf->cfg_lock); /* Check if the VF is trying to overflow the mailbox */ - if (ice_is_malicious_vf(vf, mbxdata)) + if (mbxdata && ice_is_malicious_vf(vf, mbxdata)) goto finish; /* Check if VF is disabled. */ -- 2.51.0 From a884c304e18a40e1c7a6525a9274e64c2c061c3f Mon Sep 17 00:00:00 2001 From: Jacob Keller Date: Mon, 9 Sep 2024 16:07:44 -0700 Subject: [PATCH 16/16] ice: consistently use q_idx in ice_vc_cfg_qs_msg() The ice_vc_cfg_qs_msg() function is used to configure VF queues in response to a VIRTCHNL_OP_CONFIG_VSI_QUEUES command. The virtchnl command contains an array of queue pair data for configuring Tx and Rx queues. This data includes a queue ID. When configuring the queues, the driver generally uses this queue ID to determine which Tx and Rx ring to program. However, a handful of places use the index into the queue pair data from the VF. While most VF implementations appear to send this data in order, it is not mandated by the virtchnl and it is not verified that the queue pair data comes in order. Fix the driver to consistently use the q_idx field instead of the 'i' iterator value when accessing the rings. For the Rx case, introduce a local ring variable to keep lines short. Fixes: 7ad15440acf8 ("ice: Refactor VIRTCHNL_OP_CONFIG_VSI_QUEUES handling") Signed-off-by: Jacob Keller Tested-by: Rafal Romanowski Signed-off-by: Tony Nguyen --- drivers/net/ethernet/intel/ice/ice_virtchnl.c | 21 +++++++++---------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl.c b/drivers/net/ethernet/intel/ice/ice_virtchnl.c index 3c86d0c2fe1f..c8c1d48ff793 100644 --- a/drivers/net/ethernet/intel/ice/ice_virtchnl.c +++ b/drivers/net/ethernet/intel/ice/ice_virtchnl.c @@ -1715,8 +1715,8 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) /* copy Tx queue info from VF into VSI */ if (qpi->txq.ring_len > 0) { - vsi->tx_rings[i]->dma = qpi->txq.dma_ring_addr; - vsi->tx_rings[i]->count = qpi->txq.ring_len; + vsi->tx_rings[q_idx]->dma = qpi->txq.dma_ring_addr; + vsi->tx_rings[q_idx]->count = qpi->txq.ring_len; /* Disable any existing queue first */ if (ice_vf_vsi_dis_single_txq(vf, vsi, q_idx)) @@ -1725,7 +1725,7 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) /* Configure a queue with the requested settings */ if (ice_vsi_cfg_single_txq(vsi, vsi->tx_rings, q_idx)) { dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure TX queue %d\n", - vf->vf_id, i); + vf->vf_id, q_idx); goto error_param; } } @@ -1733,24 +1733,23 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) /* copy Rx queue info from VF into VSI */ if (qpi->rxq.ring_len > 0) { u16 max_frame_size = ice_vc_get_max_frame_size(vf); + struct ice_rx_ring *ring = vsi->rx_rings[q_idx]; u32 rxdid; - vsi->rx_rings[i]->dma = qpi->rxq.dma_ring_addr; - vsi->rx_rings[i]->count = qpi->rxq.ring_len; + ring->dma = qpi->rxq.dma_ring_addr; + ring->count = qpi->rxq.ring_len; if (qpi->rxq.crc_disable) - vsi->rx_rings[q_idx]->flags |= - ICE_RX_FLAGS_CRC_STRIP_DIS; + ring->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; else - vsi->rx_rings[q_idx]->flags &= - ~ICE_RX_FLAGS_CRC_STRIP_DIS; + ring->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; if (qpi->rxq.databuffer_size != 0 && (qpi->rxq.databuffer_size > ((16 * 1024) - 128) || qpi->rxq.databuffer_size < 1024)) goto error_param; vsi->rx_buf_len = qpi->rxq.databuffer_size; - vsi->rx_rings[i]->rx_buf_len = vsi->rx_buf_len; + ring->rx_buf_len = vsi->rx_buf_len; if (qpi->rxq.max_pkt_size > max_frame_size || qpi->rxq.max_pkt_size < 64) goto error_param; @@ -1765,7 +1764,7 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) if (ice_vsi_cfg_single_rxq(vsi, q_idx)) { dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure RX queue %d\n", - vf->vf_id, i); + vf->vf_id, q_idx); goto error_param; } -- 2.51.0