From 0d046b7ad7d3c7f2dfc53fc5ad48e2fe2c3f2186 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 8 Apr 2025 11:32:20 +0200 Subject: [PATCH 01/16] arm64: dts: qcom: sm8550: Use the header with DSI phy clock IDs Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-23-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index f78d5292c5dd..a2732e04896e 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2022, Linaro Limited */ +#include #include #include #include @@ -3554,8 +3555,8 @@ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>; + assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -3649,8 +3650,8 @@ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>; + assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -3708,10 +3709,10 @@ <&bi_tcxo_ao_div2>, <&gcc GCC_DISP_AHB_CLK>, <&sleep_clk>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>, + <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ -- 2.51.0 From 314ffec606514cdf6d4bbedaaeeba0c826b6afc2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 8 Apr 2025 11:32:21 +0200 Subject: [PATCH 02/16] arm64: dts: qcom: sm8650: Use the header with DSI phy clock IDs Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-24-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 818db6ba3b3b..437daccca1bb 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2023, Linaro Limited */ +#include #include #include #include @@ -5213,8 +5214,8 @@ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>; + assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -5310,8 +5311,8 @@ assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>; + assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -5458,10 +5459,10 @@ <&bi_tcxo_ao_div2>, <&gcc GCC_DISP_AHB_CLK>, <&sleep_clk>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>, - <&mdss_dsi1_phy 0>, - <&mdss_dsi1_phy 1>, + <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, + <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>, <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <0>, /* dp1 */ -- 2.51.0 From 0d5da04d23c3b398595727a274887cb8ff1c06a3 Mon Sep 17 00:00:00 2001 From: "Russell King (Oracle)" Date: Sat, 12 Apr 2025 15:22:40 +0100 Subject: [PATCH 03/16] arm64: dts: qcom: remove max-speed = 1G for RGMII for ethernet The RGMII interface is designed for speeds up to 1G. Phylink already imposes the design limits for MII interfaces, and additional specification is unnecessary. Therefore, we can remove this property without any effect. Signed-off-by: Russell King (Oracle) Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/E1u3bkm-000Epw-QU@rmk-PC.armlinux.org.uk Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 1 - arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 2 -- 2 files changed, 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts index 4dfd66076629..388d5ecee949 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -326,7 +326,6 @@ phy-handle = <&rgmii_phy>; phy-mode = "rgmii"; - max-speed = <1000>; mdio { compatible = "snps,dwmac-mdio"; diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts index 11663cf81e45..44177e9b64b5 100644 --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts @@ -155,7 +155,6 @@ snps,mtl-rx-config = <ðernet0_mtl_rx_setup>; snps,mtl-tx-config = <ðernet0_mtl_tx_setup>; - max-speed = <1000>; phy-handle = <&rgmii_phy>; phy-mode = "rgmii-txid"; @@ -256,7 +255,6 @@ snps,mtl-rx-config = <ðernet1_mtl_rx_setup>; snps,mtl-tx-config = <ðernet1_mtl_tx_setup>; - max-speed = <1000>; phy-mode = "rgmii-txid"; pinctrl-names = "default"; -- 2.51.0 From 337921764e31907ea46df02c1d8dd1ae8f2802f5 Mon Sep 17 00:00:00 2001 From: Aleksandrs Vinarskis Date: Sat, 12 Apr 2025 14:49:18 +0200 Subject: [PATCH 04/16] arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: enable MICs LDO Particular device comes without headset combo jack, hence does not feature wcd codec IC. In such cases, DMICs are powered from vreg_l1b. Describe all 4 microphones in the audio routing. vdd-micb is defined for lpass-macro already. Signed-off-by: Aleksandrs Vinarskis Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250412124956.20562-1-alex.vinarskis@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts index 35d97db9e1f6..445d97d67d32 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts @@ -152,7 +152,11 @@ audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT", "TweeterLeft IN", "WSA WSA_SPK2 OUT", "WooferRight IN", "WSA2 WSA_SPK2 OUT", - "TweeterRight IN", "WSA2 WSA_SPK2 OUT"; + "TweeterRight IN", "WSA2 WSA_SPK2 OUT", + "VA DMIC0", "vdd-micb", + "VA DMIC1", "vdd-micb", + "VA DMIC2", "vdd-micb", + "VA DMIC3", "vdd-micb"; wsa-dai-link { link-name = "WSA Playback"; -- 2.51.0 From e8acfc1bbcda6978d952d0c18b0b5cebd6dcc3cf Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Fri, 11 Apr 2025 10:33:29 +0200 Subject: [PATCH 05/16] arm64: dts: qcom: Remove unnecessary MM_[UD]L audio routes Since commit 6fd8d2d275f7 ("ASoC: qcom: qdsp6: Move frontend AIFs to q6asm-dai") from over 4 years ago the audio routes beween MM_DL* + MultiMedia* Playback and MultiMedia* Capture + MM_UL* are not necessary anymore and can be removed from the dts files. It also helps to stop anyone copying these into new dts files. Signed-off-by: Luca Weiss Reviewed-by: Stephan Gerhold Reviewed-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20250411-cleanup-mm-routes-v1-1-ba98f653aa69@fairphone.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 5 +---- arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts | 5 +---- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 2 -- arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 6 +----- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 6 +----- arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 5 +---- arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | 5 +---- 7 files changed, 6 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts index e8148b3d6c50..1089964e6c0d 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts @@ -1012,10 +1012,7 @@ &sound { compatible = "qcom,apq8096-sndcard"; model = "DB820c"; - audio-routing = "RX_BIAS", "MCLK", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MultiMedia3 Capture", "MM_UL3"; + audio-routing = "RX_BIAS", "MCLK"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts index dbad8f57f2fa..d7fa56808747 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts @@ -156,10 +156,7 @@ &sound { compatible = "qcom,apq8096-sndcard"; model = "gemini"; - audio-routing = "RX_BIAS", "MCLK", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MultiMedia3 Capture", "MM_UL3"; + audio-routing = "RX_BIAS", "MCLK"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index d485249bcda4..a37860175d27 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -110,8 +110,6 @@ pinctrl-0 = <&lpi_i2s2_active>; pinctrl-names = "default"; model = "Qualcomm-RB2-WSA8815-Speakers-DMIC0"; - audio-routing = "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts index 4cc14ab1b9ea..dcb998b8b054 100644 --- a/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts +++ b/arch/arm64/boot/dts/qcom/qrb5165-rb5.dts @@ -1053,11 +1053,7 @@ "SpkrLeft IN", "WSA_SPK1 OUT", "SpkrRight IN", "WSA_SPK2 OUT", "VA DMIC0", "vdd-micb", - "VA DMIC1", "vdd-micb", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MultiMedia3 Capture", "MM_UL3", - "MM_DL4", "MultiMedia4 Playback"; + "VA DMIC1", "vdd-micb"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 2b2ef4dbad2f..adfd91627005 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -777,11 +777,7 @@ "DMIC2", "MIC BIAS3", "DMIC3", "MIC BIAS3", "SpkrLeft IN", "SPK1 OUT", - "SpkrRight IN", "SPK2 OUT", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL2", "MultiMedia2 Playback", - "MM_DL4", "MultiMedia4 Playback", - "MultiMedia3 Capture", "MM_UL3"; + "SpkrRight IN", "SPK2 OUT"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts index e8012205954e..7677acd08e2d 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts @@ -632,10 +632,7 @@ "RX_BIAS", "MCLK", "AMIC2", "MIC BIAS2", "SpkrLeft IN", "SPK1 OUT", - "SpkrRight IN", "SPK2 OUT", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL3", "MultiMedia3 Playback", - "MultiMedia2 Capture", "MM_UL2"; + "SpkrRight IN", "SPK2 OUT"; mm1-dai-link { link-name = "MultiMedia1"; diff --git a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts index 26217836c270..d6d4e7184c56 100644 --- a/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts +++ b/arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts @@ -445,10 +445,7 @@ "RX_BIAS", "MCLK", "AMIC2", "MIC BIAS2", "SpkrLeft IN", "SPK1 OUT", - "SpkrRight IN", "SPK2 OUT", - "MM_DL1", "MultiMedia1 Playback", - "MM_DL3", "MultiMedia3 Playback", - "MultiMedia2 Capture", "MM_UL2"; + "SpkrRight IN", "SPK2 OUT"; mm1-dai-link { link-name = "MultiMedia1"; -- 2.51.0 From 738dde31b5dca9c2be9a4639adcd34fb9fb5d019 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:25 -0500 Subject: [PATCH 06/16] arm64: dts: qcom: qdu1000: Fix qcom,freq-domain The correct property name is 'qcom,freq-domain', not 'qcom,freq-domains'. Signed-off-by: Rob Herring (Arm) Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-4-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index f973aa8f7477..7c8d78fd7ebf 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -47,7 +47,7 @@ enable-method = "psci"; power-domains = <&cpu_pd0>; power-domain-names = "psci"; - qcom,freq-domains = <&cpufreq_hw 0>; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&l2_0>; l2_0: l2-cache { compatible = "cache"; @@ -70,7 +70,7 @@ enable-method = "psci"; power-domains = <&cpu_pd1>; power-domain-names = "psci"; - qcom,freq-domains = <&cpufreq_hw 0>; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&l2_100>; l2_100: l2-cache { compatible = "cache"; @@ -88,7 +88,7 @@ enable-method = "psci"; power-domains = <&cpu_pd2>; power-domain-names = "psci"; - qcom,freq-domains = <&cpufreq_hw 0>; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&l2_200>; l2_200: l2-cache { compatible = "cache"; @@ -106,7 +106,7 @@ enable-method = "psci"; power-domains = <&cpu_pd3>; power-domain-names = "psci"; - qcom,freq-domains = <&cpufreq_hw 0>; + qcom,freq-domain = <&cpufreq_hw 0>; next-level-cache = <&l2_300>; l2_300: l2-cache { compatible = "cache"; -- 2.51.0 From 9100b9063767c8ee6906ed4dc18d1a8b1e7e7dd2 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:26 -0500 Subject: [PATCH 07/16] arm64: dts: qcom: msm8939: Fix CPU node "enable-method" property dependencies The "spin-table" enable-method requires "cpu-release-addr" property, so add a dummy entry. It is assumed the bootloader will fill in the correct values. Signed-off-by: Rob Herring (Arm) Acked-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-5-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8939.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi index 5e8c3ac39de8..ca478db63be4 100644 --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi @@ -47,6 +47,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x100>; next-level-cache = <&l2_1>; qcom,acc = <&acc0>; @@ -65,6 +66,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x101>; next-level-cache = <&l2_1>; qcom,acc = <&acc1>; @@ -78,6 +80,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x102>; next-level-cache = <&l2_1>; qcom,acc = <&acc2>; @@ -91,6 +94,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x103>; next-level-cache = <&l2_1>; qcom,acc = <&acc3>; @@ -104,6 +108,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x0>; qcom,acc = <&acc4>; qcom,saw = <&saw4>; @@ -122,6 +127,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x1>; next-level-cache = <&l2_0>; qcom,acc = <&acc5>; @@ -135,6 +141,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x2>; next-level-cache = <&l2_0>; qcom,acc = <&acc6>; @@ -148,6 +155,7 @@ compatible = "arm,cortex-a53"; device_type = "cpu"; enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; reg = <0x3>; next-level-cache = <&l2_0>; qcom,acc = <&acc7>; -- 2.51.0 From b8e10d2f5afb89957a1b45052ae3b8b061209690 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 10:47:27 -0500 Subject: [PATCH 08/16] arm64: dts: qcom: msm8992-lg-h815: Fix CPU node "enable-method" property dependencies The "spin-table" enable-method requires "cpu-release-addr" property, so add a dummy entry. It is assumed the bootloader will fill in the correct values. Signed-off-by: Rob Herring (Arm) Acked-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-6-63d7dc9ddd0a@kernel.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts b/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts index 4520d5d51a29..6a231afad85d 100644 --- a/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts +++ b/arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts @@ -93,26 +93,32 @@ &cpu0 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu1 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu2 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu3 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu4 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &cpu5 { enable-method = "spin-table"; + cpu-release-addr = /bits/ 64 <0>; }; &pm8994_resin { -- 2.51.0 From 2eca6af66709de0d1ba14cdf8b6d200a1337a3a2 Mon Sep 17 00:00:00 2001 From: Alexey Minnekhanov Date: Tue, 15 Apr 2025 16:01:01 +0300 Subject: [PATCH 09/16] arm64: dts: qcom: sdm660-xiaomi-lavender: Add missing SD card detect GPIO During initial porting these cd-gpios were missed. Having card detect is beneficial because driver does not need to do polling every second and it can just use IRQ. SD card detection in U-Boot is also fixed by this. Fixes: cf85e9aee210 ("arm64: dts: qcom: sdm660-xiaomi-lavender: Add eMMC and SD") Signed-off-by: Alexey Minnekhanov Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20250415130101.1429281-1-alexeymin@postmarketos.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts index 7167f75bced3..0b4d71c14a77 100644 --- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts +++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts @@ -404,6 +404,8 @@ &sdhc_2 { status = "okay"; + cd-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + vmmc-supply = <&vreg_l5b_2p95>; vqmmc-supply = <&vreg_l2b_2p95>; }; -- 2.51.0 From 33e020b942cb4bcf2f3870b573470973e6464bd5 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:25:59 +0300 Subject: [PATCH 10/16] arm64: dts: qcom: sc7280: Use the header with DSI phy clock IDs Use the header with DSI phy clock IDs to make code more readable. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-1-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index ec96c917b56b..d780b5a18cf6 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -6,6 +6,7 @@ */ #include #include +#include #include #include #include @@ -4617,8 +4618,8 @@ reg = <0 0x0af00000 0 0x20000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_DISP_GPLL0_CLK_SRC>, - <&mdss_dsi_phy 0>, - <&mdss_dsi_phy 1>, + <&mdss_dsi_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi_phy DSI_PIXEL_PLL_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>, <&mdss_edp_phy 0>, @@ -4775,8 +4776,10 @@ "iface", "bus"; - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi_phy 0>, <&mdss_dsi_phy 1>; + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&dsi_opp_table>; power-domains = <&rpmhpd SC7280_CX>; -- 2.51.0 From 8725fb400542a6c88c1cc918d96064eedc8c94c4 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:00 +0300 Subject: [PATCH 11/16] arm64: dts: qcom: sa8775p: mark MDP interconnects as ALWAYS on Change the tag for MDP interconnects to QCOM_ICC_TAG_ALWAYS, so that if CPUSS collapses, the display may stay on. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-2-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index a904960359d7..4da50c5ec612 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3959,10 +3959,10 @@ reg-names = "mdss"; /* same path used twice */ - interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ACTIVE_ONLY - &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, - <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ACTIVE_ONLY - &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>, + interconnects = <&mmss_noc MASTER_MDP0 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&mmss_noc MASTER_MDP1 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; interconnect-names = "mdp0-mem", -- 2.51.0 From 31e18ebef09a596ea87277c24411e1a86eb56470 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:01 +0300 Subject: [PATCH 12/16] arm64: dts: qcom: msm8998: use correct size for VBIF regions Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-3-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8998.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 7eca38440cd7..cb7055446741 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2830,8 +2830,8 @@ compatible = "qcom,msm8998-dpu"; reg = <0x0c901000 0x8f000>, <0x0c9a8e00 0xf0>, - <0x0c9b0000 0x2008>, - <0x0c9b8000 0x1040>; + <0x0c9b0000 0x3000>, + <0x0c9b8000 0x3000>; reg-names = "mdp", "regdma", "vbif", -- 2.51.0 From bacf203baa1ef896ac2bb4f9bf43b19f15a6ae26 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:02 +0300 Subject: [PATCH 13/16] arm64: dts: qcom: qcm2290: use correct size for VBIF regions Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-4-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi index e4741342e14c..6a7ce2c6b88e 100644 --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi @@ -1641,7 +1641,7 @@ mdp: display-controller@5e01000 { compatible = "qcom,qcm2290-dpu"; reg = <0x0 0x05e01000 0x0 0x8f000>, - <0x0 0x05eb0000 0x0 0x2008>; + <0x0 0x05eb0000 0x0 0x3000>; reg-names = "mdp", "vbif"; -- 2.51.0 From 180f990ed061cefdac620d02f34b03387210a2b7 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:03 +0300 Subject: [PATCH 14/16] arm64: dts: qcom: sa8775p: use correct size for VBIF regions Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-5-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 4da50c5ec612..2e5f2ad8b92c 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -3992,7 +3992,7 @@ mdss0_mdp: display-controller@ae01000 { compatible = "qcom,sa8775p-dpu"; reg = <0x0 0x0ae01000 0x0 0x8f000>, - <0x0 0x0aeb0000 0x0 0x2008>; + <0x0 0x0aeb0000 0x0 0x3000>; reg-names = "mdp", "vbif"; clocks = <&gcc GCC_DISP_HF_AXI_CLK>, -- 2.51.0 From 74e18dc4aef0e8e2989815856e48c737820ebca8 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:04 +0300 Subject: [PATCH 15/16] arm64: dts: qcom: sc7180: use correct size for VBIF regions Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-6-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index d157863dbc4a..bb1880a9458b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3196,7 +3196,7 @@ mdp: display-controller@ae01000 { compatible = "qcom,sc7180-dpu"; reg = <0 0x0ae01000 0 0x8f000>, - <0 0x0aeb0000 0 0x2008>; + <0 0x0aeb0000 0 0x3000>; reg-names = "mdp", "vbif"; clocks = <&gcc GCC_DISP_HF_AXI_CLK>, -- 2.51.0 From 545b26b926ae20640a7d464e1b830ce4ce021fd5 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 15 Apr 2025 13:26:05 +0300 Subject: [PATCH 16/16] arm64: dts: qcom: sc7280: use correct size for VBIF regions Use allocated region size for VBIF regions as defined by the docs (0x3000) instead of just using the last register address. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250415-drm-msm-dts-fixes-v1-7-90cd91bdd138@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index d780b5a18cf6..8e86d75cc6b4 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4673,7 +4673,7 @@ mdss_mdp: display-controller@ae01000 { compatible = "qcom,sc7280-dpu"; reg = <0 0x0ae01000 0 0x8f030>, - <0 0x0aeb0000 0 0x2008>; + <0 0x0aeb0000 0 0x3000>; reg-names = "mdp", "vbif"; clocks = <&gcc GCC_DISP_HF_AXI_CLK>, -- 2.51.0