From 65e079fd1a6a293ecfdca77f69773a9f2d8f0108 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 10 Apr 2025 18:25:05 -0400 Subject: [PATCH 01/16] dt-bindings: counter: Convert ftm-quaddec.txt to yaml format Convert ftm-quaddec.txt to yaml format. Additional changes: - Remove "status" at example. - Remove label at example. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250410222509.3242241-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../bindings/counter/fsl,ftm-quaddec.yaml | 36 +++++++++++++++++++ .../bindings/counter/ftm-quaddec.txt | 18 ---------- MAINTAINERS | 2 +- 3 files changed, 37 insertions(+), 19 deletions(-) create mode 100644 Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml delete mode 100644 Documentation/devicetree/bindings/counter/ftm-quaddec.txt diff --git a/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml b/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml new file mode 100644 index 000000000000..384ca63b64d5 --- /dev/null +++ b/Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/counter/fsl,ftm-quaddec.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FlexTimer Quadrature decoder counter + +description: + Exposes a simple counter for the quadrature decoder mode. + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,ftm-quaddec + + reg: + maxItems: 1 + + big-endian: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + counter@29d0000 { + compatible = "fsl,ftm-quaddec"; + reg = <0x29d0000 0x10000>; + big-endian; + }; diff --git a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt b/Documentation/devicetree/bindings/counter/ftm-quaddec.txt deleted file mode 100644 index 4d18cd722074..000000000000 --- a/Documentation/devicetree/bindings/counter/ftm-quaddec.txt +++ /dev/null @@ -1,18 +0,0 @@ -FlexTimer Quadrature decoder counter - -This driver exposes a simple counter for the quadrature decoder mode. - -Required properties: -- compatible: Must be "fsl,ftm-quaddec". -- reg: Must be set to the memory region of the flextimer. - -Optional property: -- big-endian: Access the device registers in big-endian mode. - -Example: - counter0: counter@29d0000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x29d0000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 96b827049501..18f881c9edf3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9203,7 +9203,7 @@ FLEXTIMER FTM-QUADDEC DRIVER M: Patrick Havelange L: linux-iio@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/counter/ftm-quaddec.txt +F: Documentation/devicetree/bindings/counter/fsl,ftm-quaddec.yaml F: drivers/counter/ftm-quaddec.c FLOPPY DRIVER -- 2.51.0 From 3fb7bebcb6e5aefd45f6c7fba3ebb9adc11f706a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 15:13:22 -0500 Subject: [PATCH 02/16] dt-bindings: Remove obsolete cpu-topology.txt The cpu topology binding is now covered by the dtschema cpu-map.yaml schema with all the relevant descriptions moved to it. Link: https://lore.kernel.org/r/20250410201325.962203-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/cpu/cpu-topology.txt | 553 ------------------ 1 file changed, 553 deletions(-) delete mode 100644 Documentation/devicetree/bindings/cpu/cpu-topology.txt diff --git a/Documentation/devicetree/bindings/cpu/cpu-topology.txt b/Documentation/devicetree/bindings/cpu/cpu-topology.txt deleted file mode 100644 index 9bd530a35d14..000000000000 --- a/Documentation/devicetree/bindings/cpu/cpu-topology.txt +++ /dev/null @@ -1,553 +0,0 @@ -=========================================== -CPU topology binding description -=========================================== - -=========================================== -1 - Introduction -=========================================== - -In a SMP system, the hierarchy of CPUs is defined through three entities that -are used to describe the layout of physical CPUs in the system: - -- socket -- cluster -- core -- thread - -The bottom hierarchy level sits at core or thread level depending on whether -symmetric multi-threading (SMT) is supported or not. - -For instance in a system where CPUs support SMT, "cpu" nodes represent all -threads existing in the system and map to the hierarchy level "thread" above. -In systems where SMT is not supported "cpu" nodes represent all cores present -in the system and map to the hierarchy level "core" above. - -CPU topology bindings allow one to associate cpu nodes with hierarchical groups -corresponding to the system hierarchy; syntactically they are defined as device -tree nodes. - -Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be -used for any other architecture as well. - -The cpu nodes, as per bindings defined in [4], represent the devices that -correspond to physical CPUs and are to be mapped to the hierarchy levels. - -A topology description containing phandles to cpu nodes that are not compliant -with bindings standardized in [4] is therefore considered invalid. - -=========================================== -2 - cpu-map node -=========================================== - -The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct -child of the cpus node and provides a container where the actual topology -nodes are listed. - -- cpu-map node - - Usage: Optional - On SMP systems provide CPUs topology to the OS. - Uniprocessor systems do not require a topology - description and therefore should not define a - cpu-map node. - - Description: The cpu-map node is just a container node where its - subnodes describe the CPU topology. - - Node name must be "cpu-map". - - The cpu-map node's parent node must be the cpus node. - - The cpu-map node's child nodes can be: - - - one or more cluster nodes or - - one or more socket nodes in a multi-socket system - - Any other configuration is considered invalid. - -The cpu-map node can only contain 4 types of child nodes: - -- socket node -- cluster node -- core node -- thread node - -whose bindings are described in paragraph 3. - -The nodes describing the CPU topology (socket/cluster/core/thread) can -only be defined within the cpu-map node and every core/thread in the -system must be defined within the topology. Any other configuration is -invalid and therefore must be ignored. - -=========================================== -2.1 - cpu-map child nodes naming convention -=========================================== - -cpu-map child nodes must follow a naming convention where the node name -must be "socketN", "clusterN", "coreN", "threadN" depending on the node type -(ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes -which are siblings within a single common parent node must be given a unique and -sequential N value, starting from 0). -cpu-map child nodes which do not share a common parent node can have the same -name (ie same number N as other cpu-map child nodes at different device tree -levels) since name uniqueness will be guaranteed by the device tree hierarchy. - -=========================================== -3 - socket/cluster/core/thread node bindings -=========================================== - -Bindings for socket/cluster/cpu/thread nodes are defined as follows: - -- socket node - - Description: must be declared within a cpu-map node, one node - per physical socket in the system. A system can - contain single or multiple physical socket. - The association of sockets and NUMA nodes is beyond - the scope of this bindings, please refer [2] for - NUMA bindings. - - This node is optional for a single socket system. - - The socket node name must be "socketN" as described in 2.1 above. - A socket node can not be a leaf node. - - A socket node's child nodes must be one or more cluster nodes. - - Any other configuration is considered invalid. - -- cluster node - - Description: must be declared within a cpu-map node, one node - per cluster. A system can contain several layers of - clustering within a single physical socket and cluster - nodes can be contained in parent cluster nodes. - - The cluster node name must be "clusterN" as described in 2.1 above. - A cluster node can not be a leaf node. - - A cluster node's child nodes must be: - - - one or more cluster nodes; or - - one or more core nodes - - Any other configuration is considered invalid. - -- core node - - Description: must be declared in a cluster node, one node per core in - the cluster. If the system does not support SMT, core - nodes are leaf nodes, otherwise they become containers of - thread nodes. - - The core node name must be "coreN" as described in 2.1 above. - - A core node must be a leaf node if SMT is not supported. - - Properties for core nodes that are leaf nodes: - - - cpu - Usage: required - Value type: - Definition: a phandle to the cpu node that corresponds to the - core node. - - If a core node is not a leaf node (CPUs supporting SMT) a core node's - child nodes can be: - - - one or more thread nodes - - Any other configuration is considered invalid. - -- thread node - - Description: must be declared in a core node, one node per thread - in the core if the system supports SMT. Thread nodes are - always leaf nodes in the device tree. - - The thread node name must be "threadN" as described in 2.1 above. - - A thread node must be a leaf node. - - A thread node must contain the following property: - - - cpu - Usage: required - Value type: - Definition: a phandle to the cpu node that corresponds to - the thread node. - -=========================================== -4 - Example dts -=========================================== - -Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single -physical socket): - -cpus { - #size-cells = <0>; - #address-cells = <2>; - - cpu-map { - socket0 { - cluster0 { - cluster0 { - core0 { - thread0 { - cpu = <&CPU0>; - }; - thread1 { - cpu = <&CPU1>; - }; - }; - - core1 { - thread0 { - cpu = <&CPU2>; - }; - thread1 { - cpu = <&CPU3>; - }; - }; - }; - - cluster1 { - core0 { - thread0 { - cpu = <&CPU4>; - }; - thread1 { - cpu = <&CPU5>; - }; - }; - - core1 { - thread0 { - cpu = <&CPU6>; - }; - thread1 { - cpu = <&CPU7>; - }; - }; - }; - }; - - cluster1 { - cluster0 { - core0 { - thread0 { - cpu = <&CPU8>; - }; - thread1 { - cpu = <&CPU9>; - }; - }; - core1 { - thread0 { - cpu = <&CPU10>; - }; - thread1 { - cpu = <&CPU11>; - }; - }; - }; - - cluster1 { - core0 { - thread0 { - cpu = <&CPU12>; - }; - thread1 { - cpu = <&CPU13>; - }; - }; - core1 { - thread0 { - cpu = <&CPU14>; - }; - thread1 { - cpu = <&CPU15>; - }; - }; - }; - }; - }; - }; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU2: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU3: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU4: cpu@10000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU5: cpu@10001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU6: cpu@10100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU7: cpu@10101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x0 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU8: cpu@100000000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x0>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU9: cpu@100000001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x1>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU10: cpu@100000100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU11: cpu@100000101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU12: cpu@100010000 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10000>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU13: cpu@100010001 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10001>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU14: cpu@100010100 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10100>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; - - CPU15: cpu@100010101 { - device_type = "cpu"; - compatible = "arm,cortex-a57"; - reg = <0x1 0x10101>; - enable-method = "spin-table"; - cpu-release-addr = <0 0x20000000>; - }; -}; - -Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT): - -cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu-map { - cluster0 { - core0 { - cpu = <&CPU0>; - }; - core1 { - cpu = <&CPU1>; - }; - core2 { - cpu = <&CPU2>; - }; - core3 { - cpu = <&CPU3>; - }; - }; - - cluster1 { - core0 { - cpu = <&CPU4>; - }; - core1 { - cpu = <&CPU5>; - }; - core2 { - cpu = <&CPU6>; - }; - core3 { - cpu = <&CPU7>; - }; - }; - }; - - CPU0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x0>; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x1>; - }; - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x2>; - }; - - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a15"; - reg = <0x3>; - }; - - CPU4: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x100>; - }; - - CPU5: cpu@101 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x101>; - }; - - CPU6: cpu@102 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x102>; - }; - - CPU7: cpu@103 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x103>; - }; -}; - -Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system) - -{ - #address-cells = <2>; - #size-cells = <2>; - compatible = "sifive,fu540g", "sifive,fu500"; - model = "sifive,hifive-unleashed-a00"; - - ... - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu-map { - socket0 { - cluster0 { - core0 { - cpu = <&CPU1>; - }; - core1 { - cpu = <&CPU2>; - }; - core2 { - cpu0 = <&CPU2>; - }; - core3 { - cpu0 = <&CPU3>; - }; - }; - }; - }; - - CPU1: cpu@1 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x1>; - } - - CPU2: cpu@2 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x2>; - } - CPU3: cpu@3 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x3>; - } - CPU4: cpu@4 { - device_type = "cpu"; - compatible = "sifive,rocket0", "riscv"; - reg = <0x4>; - } - } -}; -=============================================================================== -[1] ARM Linux kernel documentation - Documentation/devicetree/bindings/arm/cpus.yaml -[2] Devicetree NUMA binding description - Documentation/devicetree/bindings/numa.txt -[3] RISC-V Linux kernel documentation - Documentation/devicetree/bindings/riscv/cpus.yaml -[4] https://www.devicetree.org/specifications/ -- 2.51.0 From 540994337d47ffcaeb4aa013833c9036d6bef28a Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 10 Apr 2025 15:13:23 -0500 Subject: [PATCH 03/16] dt-bindings: Remove obsolete numa.txt The NUMA binding is now covered by the dtschema numa-distance-map-v1.yaml and CPU and memory node schemas with all the relevant descriptions moved to them. Link: https://lore.kernel.org/r/20250410201325.962203-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/numa.txt | 319 --------------------- 1 file changed, 319 deletions(-) delete mode 100644 Documentation/devicetree/bindings/numa.txt diff --git a/Documentation/devicetree/bindings/numa.txt b/Documentation/devicetree/bindings/numa.txt deleted file mode 100644 index 42f282c2f3cc..000000000000 --- a/Documentation/devicetree/bindings/numa.txt +++ /dev/null @@ -1,319 +0,0 @@ -============================================================================== -NUMA binding description. -============================================================================== - -============================================================================== -1 - Introduction -============================================================================== - -Systems employing a Non Uniform Memory Access (NUMA) architecture contain -collections of hardware resources including processors, memory, and I/O buses, -that comprise what is commonly known as a NUMA node. -Processor accesses to memory within the local NUMA node is generally faster -than processor accesses to memory outside of the local NUMA node. -DT defines interfaces that allow the platform to convey NUMA node -topology information to OS. - -============================================================================== -2 - numa-node-id -============================================================================== - -For the purpose of identification, each NUMA node is associated with a unique -token known as a node id. For the purpose of this binding -a node id is a 32-bit integer. - -A device node is associated with a NUMA node by the presence of a -numa-node-id property which contains the node id of the device. - -Example: - /* numa node 0 */ - numa-node-id = <0>; - - /* numa node 1 */ - numa-node-id = <1>; - -============================================================================== -3 - distance-map -============================================================================== - -The optional device tree node distance-map describes the relative -distance (memory latency) between all numa nodes. - -- compatible : Should at least contain "numa-distance-map-v1". - -- distance-matrix - This property defines a matrix to describe the relative distances - between all numa nodes. - It is represented as a list of node pairs and their relative distance. - - Note: - 1. Each entry represents distance from first node to second node. - The distances are equal in either direction. - 2. The distance from a node to self (local distance) is represented - with value 10 and all internode distance should be represented with - a value greater than 10. - 3. distance-matrix should have entries in lexicographical ascending - order of nodes. - 4. There must be only one device node distance-map which must - reside in the root node. - 5. If the distance-map node is not present, a default - distance-matrix is used. - -Example: - 4 nodes connected in mesh/ring topology as below, - - 0_______20______1 - | | - | | - 20 20 - | | - | | - |_______________| - 3 20 2 - - if relative distance for each hop is 20, - then internode distance would be, - 0 -> 1 = 20 - 1 -> 2 = 20 - 2 -> 3 = 20 - 3 -> 0 = 20 - 0 -> 2 = 40 - 1 -> 3 = 40 - - and dt presentation for this distance matrix is, - - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <0 2 40>, - <0 3 20>, - <1 0 20>, - <1 1 10>, - <1 2 20>, - <1 3 40>, - <2 0 40>, - <2 1 20>, - <2 2 10>, - <2 3 20>, - <3 0 20>, - <3 1 40>, - <3 2 20>, - <3 3 10>; - }; - -============================================================================== -4 - Empty memory nodes -============================================================================== - -Empty memory nodes, which no memory resides in, are allowed. There are no -device nodes for these empty memory nodes. However, the NUMA node IDs and -distance maps are still valid and memory may be added into them through -hotplug afterwards. - -Example: - - memory@0 { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x80000000>; - numa-node-id = <0>; - }; - - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80000000 0x0 0x80000000>; - numa-node-id = <1>; - }; - - /* Empty memory node 2 and 3 */ - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <0 2 40>, - <0 3 20>, - <1 0 20>, - <1 1 10>, - <1 2 20>, - <1 3 40>, - <2 0 40>, - <2 1 20>, - <2 2 10>, - <2 3 20>, - <3 0 20>, - <3 1 40>, - <3 2 20>, - <3 3 10>; - }; - -============================================================================== -5 - Example dts -============================================================================== - -Dual socket system consists of 2 boards connected through ccn bus and -each board having one socket/soc of 8 cpus, memory and pci bus. - - memory@c00000 { - device_type = "memory"; - reg = <0x0 0xc00000 0x0 0x80000000>; - /* node 0 */ - numa-node-id = <0>; - }; - - memory@10000000000 { - device_type = "memory"; - reg = <0x100 0x0 0x0 0x80000000>; - /* node 1 */ - numa-node-id = <1>; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x0>; - enable-method = "psci"; - /* node 0 */ - numa-node-id = <0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x1>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@2 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x2>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@3 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x3>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@4 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x4>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@5 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x5>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@6 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x6>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@7 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x7>; - enable-method = "psci"; - numa-node-id = <0>; - }; - cpu@8 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x8>; - enable-method = "psci"; - /* node 1 */ - numa-node-id = <1>; - }; - cpu@9 { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0x9>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@a { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xa>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@b { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xb>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@c { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xc>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@d { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xd>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@e { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xe>; - enable-method = "psci"; - numa-node-id = <1>; - }; - cpu@f { - device_type = "cpu"; - compatible = "arm,armv8"; - reg = <0x0 0xf>; - enable-method = "psci"; - numa-node-id = <1>; - }; - }; - - pcie0: pcie0@848000000000 { - compatible = "arm,armv8"; - device_type = "pci"; - bus-range = <0 255>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x8480 0x00000000 0 0x10000000>; /* Configuration space */ - ranges = <0x03000000 0x8010 0x00000000 0x8010 0x00000000 0x70 0x00000000>; - /* node 0 */ - numa-node-id = <0>; - }; - - pcie1: pcie1@948000000000 { - compatible = "arm,armv8"; - device_type = "pci"; - bus-range = <0 255>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x9480 0x00000000 0 0x10000000>; /* Configuration space */ - ranges = <0x03000000 0x9010 0x00000000 0x9010 0x00000000 0x70 0x00000000>; - /* node 1 */ - numa-node-id = <1>; - }; - - distance-map { - compatible = "numa-distance-map-v1"; - distance-matrix = <0 0 10>, - <0 1 20>, - <1 1 10>; - }; -- 2.51.0 From ac029aa22876bc273ed86432f8c52693e831dc61 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Fri, 11 Apr 2025 21:47:57 +0200 Subject: [PATCH 04/16] dt-bindings: remove RZ/N1S bindings Except for these four quite random bindings, no further upstream activity has been observed in the last 8 years. So, remove these fragments to reduce maintenance burden. Signed-off-by: Wolfram Sang Acked-by: Marc Kleine-Budde Acked-by: Mark Brown Link: https://lore.kernel.org/r/20250411194849.11067-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/net/can/nxp,sja1000.yaml | 4 +--- .../bindings/pinctrl/renesas,rzn1-pinctrl.yaml | 4 +--- .../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 12 +++--------- .../devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 4 +--- 4 files changed, 6 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml index 144a3785132c..ec0c2168e4b9 100644 --- a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml +++ b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml @@ -16,9 +16,7 @@ properties: - nxp,sja1000 - technologic,sja1000 - items: - - enum: - - renesas,r9a06g032-sja1000 # RZ/N1D - - renesas,r9a06g033-sja1000 # RZ/N1S + - const: renesas,r9a06g032-sja1000 # RZ/N1D - const: renesas,rzn1-sja1000 # RZ/N1 reg: diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml index 816688580e33..aa882b5bfe97 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml @@ -13,9 +13,7 @@ maintainers: properties: compatible: items: - - enum: - - renesas,r9a06g032-pinctrl # RZ/N1D - - renesas,r9a06g033-pinctrl # RZ/N1S + - const: renesas,r9a06g032-pinctrl # RZ/N1D - const: renesas,rzn1-pinctrl # Generic RZ/N1 reg: diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml index 1aa3480d8d81..1ee0aed5057d 100644 --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml @@ -17,9 +17,7 @@ allOf: properties: compatible: items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - const: snps,dw-apb-uart then: @@ -45,15 +43,11 @@ properties: compatible: oneOf: - items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - const: snps,dw-apb-uart - items: - - enum: - - renesas,r9a06g032-uart - - renesas,r9a06g033-uart + - const: renesas,r9a06g032-uart - const: renesas,rzn1-uart - items: - enum: diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index bccd00a1ddd0..ff77ad6d4d8c 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -84,9 +84,7 @@ properties: const: canaan,k210-spi - description: Renesas RZ/N1 SPI Controller items: - - enum: - - renesas,r9a06g032-spi # RZ/N1D - - renesas,r9a06g033-spi # RZ/N1S + - const: renesas,r9a06g032-spi # RZ/N1D - const: renesas,rzn1-spi # RZ/N1 - description: T-HEAD TH1520 SoC SPI Controller items: -- 2.51.0 From 50ede3b000f3a06edbf668a01f65c6e801076dd6 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 15 Apr 2025 11:48:58 -0400 Subject: [PATCH 05/16] dt-bindings: interrupt-controller: Add missed fsl tzic controller Add missed fsl tzic interrupt controller binding doc. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250415154859.3381515-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/fsl,tzic.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml new file mode 100644 index 000000000000..5f2c8761a31d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/fsl,tzic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale tzic Interrupt controller + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - items: + - enum: + - fsl,imx51-tzic + - fsl,imx53-tzic + - const: fsl,tzic + - items: + - const: fsl,imx50-tzic + - const: fsl,imx53-tzic + - const: fsl,tzic + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + tz-interrupt-controller@fffc000 { + compatible = "fsl,imx53-tzic", "fsl,tzic"; + reg = <0x0fffc000 0x4000>; + interrupt-controller; + #interrupt-cells = <1>; + }; -- 2.51.0 From b252d1b00e283de06b35a13115d7e4bb9c5381ff Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 15 Apr 2025 17:29:42 -0400 Subject: [PATCH 06/16] dt-bindings: display: imx: convert fsl-imx-drm.txt to yaml format Convert fsl-imx-drm.txt to yaml format and create 5 yaml files for differences purpose. Additional changes: - add missed include file in examples. - add clocks, clock-names for ipu. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250415212943.3400852-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../imx/fsl,imx-display-subsystem.yaml | 36 ++++ .../display/imx/fsl,imx-parallel-display.yaml | 74 ++++++++ .../bindings/display/imx/fsl,imx6q-ipu.yaml | 97 +++++++++++ .../bindings/display/imx/fsl,imx6qp-pre.yaml | 55 ++++++ .../bindings/display/imx/fsl,imx6qp-prg.yaml | 54 ++++++ .../bindings/display/imx/fsl-imx-drm.txt | 160 ------------------ 6 files changed, 316 insertions(+), 160 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml delete mode 100644 Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml new file mode 100644 index 000000000000..92a0a797d099 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-display-subsystem.yaml @@ -0,0 +1,36 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx-display-subsystem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX DRM master device + +maintainers: + - Frank Li + +description: + The freescale i.MX DRM master device is a virtual device needed to list all + IPU or other display interface nodes that comprise the graphics subsystem. + +properties: + compatible: + const: fsl,imx-display-subsystem + + ports: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should contain a list of phandles pointing to camera + sensor interface ports of IPU devices. + +required: + - compatible + +additionalProperties: false + +examples: + - | + display-subsystem { + compatible = "fsl,imx-display-subsystem"; + ports = <&ipu_di0>; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml new file mode 100644 index 000000000000..bbcfe7e2958b --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx-parallel-display.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx-parallel-display.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Parallel display support + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx-parallel-display + + interface-pix-fmt: + $ref: /schemas/types.yaml#/definitions/string + enum: + - rgb24 + - rgb565 + - bgr666 + - lvds666 + + ddc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle describing the i2c bus handling the display data channel + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: input port connected to the IPU display interface + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: output port connected to a panel + +required: + - compatible + +additionalProperties: false + +examples: + - | + display { + compatible = "fsl,imx-parallel-display"; + #address-cells = <1>; + #size-cells = <0>; + interface-pix-fmt = "rgb24"; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ipu_di0_disp0>; + }; + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml new file mode 100644 index 000000000000..ec78645d4de0 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ipu.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ipu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX IPUv3 + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx51-ipu + - fsl,imx53-ipu + - fsl,imx6q-ipu + - items: + - const: fsl,imx6qp-ipu + - const: fsl,imx6q-ipu + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: bus + - const: di0 + - const: di1 + + resets: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + fsl,prg: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to prg node associated with this IPU instance + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI0 + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: CSI1 + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: DI0 + + port@3: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: DI1 + +required: + - compatible + - reg + - interrupts + - resets + +additionalProperties: false + +examples: + - | + display-controller@18000000 { + compatible = "fsl,imx53-ipu"; + reg = <0x18000000 0x080000000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <11 10>; + resets = <&src 2>; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&display_in>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml new file mode 100644 index 000000000000..73bc73ff6e69 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-pre.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-pre.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX PRE (Prefetch Resolve Engine) + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx6qp-pre + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: axi + fsl,iram: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle pointing to the mmio-sram device node, that should be + used for the PRE SRAM double buffer. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + pre@21c8000 { + compatible = "fsl,imx6qp-pre"; + reg = <0x021c8000 0x1000>; + interrupts = ; + clocks = <&clks IMX6QDL_CLK_PRE0>; + clock-names = "axi"; + fsl,iram = <&ocram2>; + }; diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml new file mode 100644 index 000000000000..582da8c489f4 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6qp-prg.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-prg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX PRG (Prefetch Resolve Gasket) + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,imx6qp-prg + + reg: + maxItems: 1 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: axi + + fsl,pres: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 + description: + phandles to the PRE units attached to this PRG, with the fixed + PRE as the first entry and the muxable PREs following. + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + prg@21cc000 { + compatible = "fsl,imx6qp-prg"; + reg = <0x021cc000 0x1000>; + clocks = <&clks IMX6QDL_CLK_PRG0_APB>, <&clks IMX6QDL_CLK_PRG0_AXI>; + clock-names = "ipg", "axi"; + fsl,pres = <&pre1>, <&pre2>, <&pre3>; + }; + diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt deleted file mode 100644 index 269b1ae2fca9..000000000000 --- a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt +++ /dev/null @@ -1,160 +0,0 @@ -Freescale i.MX DRM master device -================================ - -The freescale i.MX DRM master device is a virtual device needed to list all -IPU or other display interface nodes that comprise the graphics subsystem. - -Required properties: -- compatible: Should be "fsl,imx-display-subsystem" -- ports: Should contain a list of phandles pointing to display interface ports - of IPU devices - -example: - -display-subsystem { - compatible = "fsl,imx-display-subsystem"; - ports = <&ipu_di0>; -}; - - -Freescale i.MX IPUv3 -==================== - -Required properties: -- compatible: Should be "fsl,-ipu" where is one of - - imx51 - - imx53 - - imx6q - - imx6qp -- reg: should be register base and length as documented in the - datasheet -- interrupts: Should contain sync interrupt and error interrupt, - in this order. -- resets: phandle pointing to the system reset controller and - reset line index, see reset/fsl,imx-src.txt for details -Additional required properties for fsl,imx6qp-ipu: -- fsl,prg: phandle to prg node associated with this IPU instance -Optional properties: -- port@[0-3]: Port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - Ports 0 and 1 should correspond to CSI0 and CSI1, - ports 2 and 3 should correspond to DI0 and DI1, respectively. - -example: - -ipu: ipu@18000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ipu"; - reg = <0x18000000 0x080000000>; - interrupts = <11 10>; - resets = <&src 2>; - - ipu_di0: port@2 { - reg = <2>; - - ipu_di0_disp0: endpoint { - remote-endpoint = <&display_in>; - }; - }; -}; - -Freescale i.MX PRE (Prefetch Resolve Engine) -============================================ - -Required properties: -- compatible: should be "fsl,imx6qp-pre" -- reg: should be register base and length as documented in the - datasheet -- clocks : phandle to the PRE axi clock input, as described - in Documentation/devicetree/bindings/clock/clock-bindings.txt and - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. -- clock-names: should be "axi" -- interrupts: should contain the PRE interrupt -- fsl,iram: phandle pointing to the mmio-sram device node, that should be - used for the PRE SRAM double buffer. - -example: - -pre@21c8000 { - compatible = "fsl,imx6qp-pre"; - reg = <0x021c8000 0x1000>; - interrupts = ; - clocks = <&clks IMX6QDL_CLK_PRE0>; - clock-names = "axi"; - fsl,iram = <&ocram2>; -}; - -Freescale i.MX PRG (Prefetch Resolve Gasket) -============================================ - -Required properties: -- compatible: should be "fsl,imx6qp-prg" -- reg: should be register base and length as documented in the - datasheet -- clocks : phandles to the PRG ipg and axi clock inputs, as described - in Documentation/devicetree/bindings/clock/clock-bindings.txt and - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. -- clock-names: should be "ipg" and "axi" -- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed - PRE as the first entry and the muxable PREs following. - -example: - -prg@21cc000 { - compatible = "fsl,imx6qp-prg"; - reg = <0x021cc000 0x1000>; - clocks = <&clks IMX6QDL_CLK_PRG0_APB>, - <&clks IMX6QDL_CLK_PRG0_AXI>; - clock-names = "ipg", "axi"; - fsl,pres = <&pre1>, <&pre2>, <&pre3>; -}; - -Parallel display support -======================== - -Required properties: -- compatible: Should be "fsl,imx-parallel-display" -Optional properties: -- interface-pix-fmt: How this display is connected to the - display interface. Currently supported types: "rgb24", "rgb565", "bgr666" - and "lvds666". -- ddc: phandle describing the i2c bus handling the display data - channel -- port@[0-1]: Port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - Port 0 is the input port connected to the IPU display interface, - port 1 is the output port connected to a panel. - -example: - -disp0 { - compatible = "fsl,imx-parallel-display"; - interface-pix-fmt = "rgb24"; - - port@0 { - reg = <0>; - - display_in: endpoint { - remote-endpoint = <&ipu_di0_disp0>; - }; - }; - - port@1 { - reg = <1>; - - display_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; -}; - -panel { - ... - - port { - panel_in: endpoint { - remote-endpoint = <&display_out>; - }; - }; -}; -- 2.51.0 From 494d3c55d83698b9d44b150bc3e5e3936b439965 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Wed, 18 Dec 2024 22:08:26 +0100 Subject: [PATCH 07/16] dt-bindings: backlight: add TI LP8864/LP8866 LED-backlight drivers Add bindings for Texas Instruments' LP8864/LP8866 LED-backlight drivers. Note that multiple channels in these models are used for load-balancing and brightness is controlled gobally, so from a user perspective it's only one LED. Reviewed-by: Rob Herring (Arm) Signed-off-by: Alexander Sverdlin Link: https://lore.kernel.org/r/20241218210829.73191-2-alexander.sverdlin@siemens.com Signed-off-by: Rob Herring (Arm) --- .../bindings/leds/backlight/ti,lp8864.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml diff --git a/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml b/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml new file mode 100644 index 000000000000..d44232d462bd --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/ti,lp8864.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/ti,lp8864.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments - LP8864/LP8866 4/6-Channel LED Driver family + +maintainers: + - Andrew Davis + - Alexander Sverdlin + +description: | + LP8866-Q1, LP8866S-Q1, LP8864-Q1, LP8864S-Q1 are display LED-backlight drivers + with 4/6 channels. LED brightness can be controlled globally through the I2C + interface or PWM input. + + For more product information please see the links below: + https://www.ti.com/product/LP8864-Q1 + https://www.ti.com/product/LP8864S-Q1 + https://www.ti.com/product/LP8866-Q1 + https://www.ti.com/product/LP8866S-Q1 + +properties: + compatible: + const: ti,lp8864 + + reg: + maxItems: 1 + description: I2C slave address + + enable-gpios: + maxItems: 1 + description: GPIO pin to enable (active high) / disable the device + + vled-supply: + description: LED supply + + led: + type: object + $ref: common.yaml# + properties: + function: true + color: true + label: true + linux,default-trigger: true + + additionalProperties: false + +required: + - compatible + - reg + - led + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@3a { + compatible = "ti,lp8864"; + reg = <0x3a>; + enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + vled-supply = <&vbatt>; + + led { + function = LED_FUNCTION_BACKLIGHT; + color = ; + linux,default-trigger = "backlight"; + }; + }; + }; + +... -- 2.51.0 From 2ed7553b909f8401f21df92925001a10b0971eeb Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Mon, 7 Apr 2025 11:53:40 -0500 Subject: [PATCH 08/16] dt-bindings: virtio: pci-iommu: Add ref to pci-device.yaml The virtio pci-iommu is a PCI device, so it should have a reference to the pci-device.yaml schema. The pci-device.yaml schema defines the 'reg' format as a schema, so the text description for 'reg' can be dropped. Reviewed-by: Jean-Philippe Brucker Link: https://lore.kernel.org/r/20250407165341.2934499-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/virtio/pci-iommu.yaml | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml index 972a785a42de..8bd6ad72ac7a 100644 --- a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml +++ b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml @@ -20,6 +20,9 @@ description: | virtio-iommu node doesn't have an "iommus" property, and is omitted from the iommu-map property of the root complex. +allOf: + - $ref: /schemas/pci/pci-device.yaml# + properties: # If compatible is present, it should contain the vendor and device ID # according to the PCI Bus Binding specification. Since PCI provides @@ -33,12 +36,7 @@ properties: - const: pci1af4,1057 reg: - description: | - PCI address of the IOMMU. As defined in the PCI Bus Binding - reference, the reg property is a five-cell address encoded as (phys.hi - phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's - BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be - zero. See Documentation/devicetree/bindings/pci/pci.txt + maxItems: 1 '#iommu-cells': const: 1 -- 2.51.0 From ba127016c07b17d10cb33803fb0a0aaf24a8b53c Mon Sep 17 00:00:00 2001 From: =?utf8?q?J=2E=20Neusch=C3=A4fer?= Date: Thu, 17 Apr 2025 16:21:14 +0200 Subject: [PATCH 09/16] dt-bindings: powerpc: Convert fsl/pmc.txt to YAML MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This patch rewrites pmc.txt into YAML format. Descriptive texts are expanded or shortened in a few places to better fit today's conventions. The list of compatible strings (and combinations of them) is based on existing device trees in arch/powerpc as well as compatible strings already mentioned in the plain-text version of the binding. One thing I didn't handle are soc-clk@... nodes as seen in arch/powerpc/boot/dts/fsl/pq3-power.dtsi. They are also ignored by Linux drivers. Signed-off-by: J. Neuschäfer Link: https://lore.kernel.org/r/20250417-fslpmc-yaml-v3-1-b3eccd389176@posteo.net Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/powerpc/fsl/pmc.txt | 63 -------- .../devicetree/bindings/powerpc/fsl/pmc.yaml | 152 ++++++++++++++++++ 2 files changed, 152 insertions(+), 63 deletions(-) delete mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pmc.txt create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt deleted file mode 100644 index 07256b7ffcaa..000000000000 --- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Power Management Controller - -Properties: -- compatible: "fsl,-pmc". - - "fsl,mpc8349-pmc" should be listed for any chip whose PMC is - compatible. "fsl,mpc8313-pmc" should also be listed for any chip - whose PMC is compatible, and implies deep-sleep capability. - - "fsl,mpc8548-pmc" should be listed for any chip whose PMC is - compatible. "fsl,mpc8536-pmc" should also be listed for any chip - whose PMC is compatible, and implies deep-sleep capability. - - "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is - compatible; all statements below that apply to "fsl,mpc8548-pmc" also - apply to "fsl,mpc8641d-pmc". - - Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these - bit assignments are indicated via the sleep specifier in each device's - sleep property. - -- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource - is the PMC block, and the second resource is the Clock Configuration - block. - - For devices compatible with "fsl,mpc8548-pmc", the first resource - is a 32-byte block beginning with DEVDISR. - -- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first - resource is the PMC block interrupt. - -- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices, - this is a phandle to an "fsl,gtm" node on which timer 4 can be used as - a wakeup source from deep sleep. - -Sleep specifiers: - - fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit - that is set in the cell, the corresponding bit in SCCR will be saved - and cleared on suspend, and restored on resume. This sleep controller - supports disabling and resuming devices at any time. - - fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of - which will be ORed into PMCDR upon suspend, and cleared from PMCDR - upon resume. The first two cells are as described for fsl,mpc8578-pmc. - This sleep controller only supports disabling devices during system - sleep, or permanently. - - fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the - first of which will be ORed into DEVDISR (and the second into - DEVDISR2, if present -- this cell should be zero or absent if the - hardware does not have DEVDISR2) upon a request for permanent device - disabling. This sleep controller does not support configuring devices - to disable during system sleep (unless supported by another compatible - match), or dynamically. - -Example: - - power@b00 { - compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - }; diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml b/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml new file mode 100644 index 000000000000..276ece7f01db --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/powerpc/fsl/pmc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Power Management Controller + +maintainers: + - J. Neuschäfer + +description: | + The Power Management Controller in several MPC8xxx SoCs helps save power by + controlling chip-wide low-power states as well as peripheral clock gating. + + Sleep of peripheral devices is configured by the `sleep` property, for + example `sleep = <&pmc 0x00000030>`. Any cells after the &pmc phandle are + called a sleep specifier. + + For "fsl,mpc8349-pmc", sleep specifiers consist of one cell. For each bit that + is set in the cell, the corresponding bit in SCCR will be saved and cleared + on suspend, and restored on resume. This sleep controller supports disabling + and resuming devices at any time. + + For "fsl,mpc8536-pmc", sleep specifiers consist of three cells, the third of + which will be ORed into PMCDR upon suspend, and cleared from PMCDR upon + resume. The first two cells are as described for fsl,mpc8548-pmc. This + sleep controller only supports disabling devices during system sleep, or + permanently. + + For "fsl,mpc8548-pmc" or "fsl,mpc8641d-pmc", Sleep specifiers consist of one + or two cells, the first of which will be ORed into DEVDISR (and the second + into DEVDISR2, if present -- this cell should be zero or absent if the + hardware does not have DEVDISR2) upon a request for permanent device + disabling. This sleep controller does not support configuring devices to + disable during system sleep (unless supported by another compatible match), + or dynamically. + +properties: + compatible: + oneOf: + - items: + - const: fsl,mpc8315-pmc + - const: fsl,mpc8313-pmc + - const: fsl,mpc8349-pmc + + - items: + - enum: + - fsl,mpc8313-pmc + - fsl,mpc8323-pmc + - fsl,mpc8360-pmc + - fsl,mpc8377-pmc + - fsl,mpc8378-pmc + - fsl,mpc8379-pmc + - const: fsl,mpc8349-pmc + + - items: + - const: fsl,p1022-pmc + - const: fsl,mpc8536-pmc + - const: fsl,mpc8548-pmc + + - items: + - enum: + - fsl,mpc8536-pmc + - fsl,mpc8568-pmc + - fsl,mpc8569-pmc + - const: fsl,mpc8548-pmc + + - enum: + - fsl,mpc8548-pmc + - fsl,mpc8641d-pmc + + description: | + "fsl,mpc8349-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8313-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8548-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8536-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is + compatible; all statements below that apply to "fsl,mpc8548-pmc" also + apply to "fsl,mpc8641d-pmc". + + Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these + bit assignments are indicated via the sleep specifier in each device's + sleep property. + + reg: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + + fsl,mpc8313-wakeup-timer: + $ref: /schemas/types.yaml#/definitions/phandle + description: + For "fsl,mpc8313-pmc"-compatible devices, this is a phandle to an + "fsl,gtm" node on which timer 4 can be used as a wakeup source from deep + sleep. + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,mpc8349-pmc + then: + properties: + reg: + items: + - description: PMC block + - description: Clock Configuration block + + - if: + properties: + compatible: + contains: + enum: + - fsl,mpc8548-pmc + - fsl,mpc8641d-pmc + then: + properties: + reg: + items: + - description: 32-byte block beginning with DEVDISR + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + pmc: power@b00 { + compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100>, <0xa00 0x100>; + interrupts = <80 IRQ_TYPE_LEVEL_LOW>; + }; + + - | + power@e0070 { + compatible = "fsl,mpc8548-pmc"; + reg = <0xe0070 0x20>; + }; + +... -- 2.51.0 From e808ed95c178090f58e02a2496daeac39e5bb2f1 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 10:57:41 -0400 Subject: [PATCH 10/16] dt-bindings: display: imx: convert ldb.txt to yaml format Convert ldb.txt to yaml format. Additional changes - fix clock-names order to match existed dts file. - remove lvds-panel and iomuxc-gpr node in examples. - fsl,imx6q-ldb fail back to fsl,imx53-ldb. - add fsl,panel property to match existed dts. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250417145742.3568572-1-Frank.Li@nxp.com [robh: Use #/properties/port schema for port] Signed-off-by: Rob Herring (Arm) --- .../bindings/display/imx/fsl,imx6q-ldb.yaml | 193 ++++++++++++++++++ .../devicetree/bindings/display/imx/ldb.txt | 146 ------------- 2 files changed, 193 insertions(+), 146 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml delete mode 100644 Documentation/devicetree/bindings/display/imx/ldb.txt diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml new file mode 100644 index 000000000000..1646f41d8f72 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx6q-ldb.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale LVDS Display Bridge (ldb) + +description: + The LVDS Display Bridge device tree node contains up to two lvds-channel + nodes describing each of the two LVDS encoder channels of the bridge. + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx53-ldb + - items: + - enum: + - fsl,imx6q-ldb + - const: fsl,imx53-ldb + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: + The phandle points to the iomuxc-gpr region containing the LVDS + control register. + + clocks: + minItems: 6 + maxItems: 8 + + clock-names: + oneOf: + - items: + - const: di0_pll + - const: di1_pll + - const: di0_sel + - const: di1_sel + - const: di0 + - const: di1 + - items: + - const: di0_pll + - const: di1_pll + - const: di0_sel + - const: di1_sel + - const: di2_sel + - const: di3_sel + - const: di0 + - const: di1 + + fsl,dual-channel: + $ref: /schemas/types.yaml#/definitions/flag + description: + if it exists, only LVDS channel 0 should + be configured - one input will be distributed on both outputs in dual + channel mode + +patternProperties: + '^lvds-channel@[0-1]$': + type: object + description: + Each LVDS Channel has to contain either an of graph link to a panel device node + or a display-timings node that describes the video timings for the connected + LVDS display as well as the fsl,data-mapping and fsl,data-width properties. + + properties: + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + display-timings: + $ref: /schemas/display/panel/display-timings.yaml# + + fsl,data-mapping: + enum: + - spwg + - jeida + + fsl,data-width: + $ref: /schemas/types.yaml#/definitions/uint32 + description: should be <18> or <24> + enum: + - 18 + - 24 + + fsl,panel: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to lcd panel + + patternProperties: + '^port@[0-4]$': + $ref: /schemas/graph.yaml#/properties/port + description: + On i.MX5, the internal two-input-multiplexer is used. Due to hardware + limitations, only one input port (port@[0,1]) can be used for each channel + (lvds-channel@[0,1], respectively). + On i.MX6, there should be four input ports (port@[0-3]) that correspond + to the four LVDS multiplexer inputs. + A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected + to a panel input port. Optionally, the output port can be left out if + display-timings are used instead. + + additionalProperties: false + +required: + - compatible + - gpr + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + ldb@53fa8008 { + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + #address-cells = <1>; + #size-cells = <0>; + gpr = <&gpr>; + clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, + <&clks IMX5_CLK_LDB_DI1_SEL>, + <&clks IMX5_CLK_IPU_DI0_SEL>, + <&clks IMX5_CLK_IPU_DI1_SEL>, + <&clks IMX5_CLK_LDB_DI0_GATE>, + <&clks IMX5_CLK_LDB_DI1_GATE>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + + /* Using an of-graph endpoint link to connect the panel */ + lvds-channel@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + endpoint { + remote-endpoint = <&ipu_di0_lvds0>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + + /* Using display-timings and fsl,data-mapping/width instead */ + lvds-channel@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + + display-timings {/* ... */ + }; + + port@1 { + reg = <1>; + + endpoint { + remote-endpoint = <&ipu_di1_lvds1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/imx/ldb.txt b/Documentation/devicetree/bindings/display/imx/ldb.txt deleted file mode 100644 index 03653a291b54..000000000000 --- a/Documentation/devicetree/bindings/display/imx/ldb.txt +++ /dev/null @@ -1,146 +0,0 @@ -Device-Tree bindings for LVDS Display Bridge (ldb) - -LVDS Display Bridge -=================== - -The LVDS Display Bridge device tree node contains up to two lvds-channel -nodes describing each of the two LVDS encoder channels of the bridge. - -Required properties: - - #address-cells : should be <1> - - #size-cells : should be <0> - - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb". - Both LDB versions are similar, but i.MX6 has an additional - multiplexer in the front to select any of the four IPU display - interfaces as input for each LVDS channel. - - gpr : should be <&gpr> on i.MX53 and i.MX6q. - The phandle points to the iomuxc-gpr region containing the LVDS - control register. -- clocks, clock-names : phandles to the LDB divider and selector clocks and to - the display interface selector clocks, as described in - Documentation/devicetree/bindings/clock/clock-bindings.txt - The following clocks are expected on i.MX53: - "di0_pll" - LDB LVDS channel 0 mux - "di1_pll" - LDB LVDS channel 1 mux - "di0" - LDB LVDS channel 0 gate - "di1" - LDB LVDS channel 1 gate - "di0_sel" - IPU1 DI0 mux - "di1_sel" - IPU1 DI1 mux - On i.MX6q the following additional clocks are needed: - "di2_sel" - IPU2 DI0 mux - "di3_sel" - IPU2 DI1 mux - The needed clock numbers for each are documented in - Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in - Documentation/devicetree/bindings/clock/imx6q-clock.yaml. - -Optional properties: - - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q - - pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53, - not used on i.MX6q - - fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should - be configured - one input will be distributed on both outputs in dual - channel mode - -LVDS Channel -============ - -Each LVDS Channel has to contain either an of graph link to a panel device node -or a display-timings node that describes the video timings for the connected -LVDS display as well as the fsl,data-mapping and fsl,data-width properties. - -Required properties: - - reg : should be <0> or <1> - - port: Input and output port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/graph.txt. - On i.MX5, the internal two-input-multiplexer is used. Due to hardware - limitations, only one input port (port@[0,1]) can be used for each channel - (lvds-channel@[0,1], respectively). - On i.MX6, there should be four input ports (port@[0-3]) that correspond - to the four LVDS multiplexer inputs. - A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected - to a panel input port. Optionally, the output port can be left out if - display-timings are used instead. - -Optional properties (required if display-timings are used): - - display-timings : A node that describes the display timings as defined in - Documentation/devicetree/bindings/display/panel/display-timing.txt. - - fsl,data-mapping : should be "spwg" or "jeida" - This describes how the color bits are laid out in the - serialized LVDS signal. - - fsl,data-width : should be <18> or <24> - -example: - -gpr: iomuxc-gpr@53fa8000 { - /* ... */ -}; - -ldb: ldb@53fa8008 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx53-ldb"; - gpr = <&gpr>; - clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, - <&clks IMX5_CLK_LDB_DI1_SEL>, - <&clks IMX5_CLK_IPU_DI0_SEL>, - <&clks IMX5_CLK_IPU_DI1_SEL>, - <&clks IMX5_CLK_LDB_DI0_GATE>, - <&clks IMX5_CLK_LDB_DI1_GATE>; - clock-names = "di0_pll", "di1_pll", - "di0_sel", "di1_sel", - "di0", "di1"; - - /* Using an of-graph endpoint link to connect the panel */ - lvds-channel@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - port@0 { - reg = <0>; - - lvds0_in: endpoint { - remote-endpoint = <&ipu_di0_lvds0>; - }; - }; - - port@2 { - reg = <2>; - - lvds0_out: endpoint { - remote-endpoint = <&panel_in>; - }; - }; - }; - - /* Using display-timings and fsl,data-mapping/width instead */ - lvds-channel@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - fsl,data-mapping = "spwg"; - fsl,data-width = <24>; - - display-timings { - /* ... */ - }; - - port@1 { - reg = <1>; - - lvds1_in: endpoint { - remote-endpoint = <&ipu_di1_lvds1>; - }; - }; - }; -}; - -panel: lvds-panel { - /* ... */ - - port { - panel_in: endpoint { - remote-endpoint = <&lvds0_out>; - }; - }; -}; -- 2.51.0 From 6848dc8d0b66153048d57d47d71d40095a5a3f19 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:06:04 -0400 Subject: [PATCH 11/16] dt-bindings: fsl: convert m4if.txt and tigerp.txt to yaml format Convert m4if.txt and tigerp.txt to yaml format. These just use reg to indicate memory region. Additional changes: - Add compatible string fsl,imx51-aipstz. - Add fsl,imx53-tigerp and fail back to fsl,imx51-tigerp - Add compatible string fsl,imx7d-pcie-phy, which is not real phy and just indicate a memory region. Signed-off-by: Frank Li Link: https://lore.kernel.org/r/20250417150608.3569512-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../arm/freescale/fsl,imx51-m4if.yaml | 41 +++++++++++++++++++ .../bindings/arm/freescale/m4if.txt | 12 ------ .../bindings/arm/freescale/tigerp.txt | 12 ------ 3 files changed, 41 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml delete mode 100644 Documentation/devicetree/bindings/arm/freescale/m4if.txt delete mode 100644 Documentation/devicetree/bindings/arm/freescale/tigerp.txt diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml new file mode 100644 index 000000000000..1f515bea3959 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx51-m4if.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx51-m4if.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Multi Master Multi Memory Interface (M4IF) and Tigerp module + +description: collect the imx devices, which only have compatible and reg property + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx51-m4if + - fsl,imx51-tigerp + - fsl,imx51-aipstz + - fsl,imx53-aipstz + - fsl,imx7d-pcie-phy + - items: + - const: fsl,imx53-tigerp + - const: fsl,imx51-tigerp + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + m4if@83fd8000 { + compatible = "fsl,imx51-m4if"; + reg = <0x83fd8000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/freescale/m4if.txt b/Documentation/devicetree/bindings/arm/freescale/m4if.txt deleted file mode 100644 index 93bd7b867a53..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/m4if.txt +++ /dev/null @@ -1,12 +0,0 @@ -* Freescale Multi Master Multi Memory Interface (M4IF) module - -Required properties: -- compatible : Should be "fsl,imx51-m4if" -- reg : Address and length of the register set for the device - -Example: - -m4if: m4if@83fd8000 { - compatible = "fsl,imx51-m4if"; - reg = <0x83fd8000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt b/Documentation/devicetree/bindings/arm/freescale/tigerp.txt deleted file mode 100644 index 19e2aad63d6e..000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/tigerp.txt +++ /dev/null @@ -1,12 +0,0 @@ -* Freescale Tigerp platform module - -Required properties: -- compatible : Should be "fsl,imx51-tigerp" -- reg : Address and length of the register set for the device - -Example: - -tigerp: tigerp@83fa0000 { - compatible = "fsl,imx51-tigerp"; - reg = <0x83fa0000 0x28>; -}; -- 2.51.0 From 48f506021611a63414c63668706466dfb5264113 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 17 Apr 2025 11:11:33 -0400 Subject: [PATCH 12/16] dt-bindings: display: imx: convert fsl,tcon.txt to yaml format Convert fsl,tcon.txt to yaml format. Signed-off-by: Frank Li Reviewed-by: Stefan Agner Link: https://lore.kernel.org/r/20250417151134.3569837-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/display/fsl,tcon.txt | 17 -------- .../bindings/display/fsl,vf610-tcon.yaml | 43 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 44 insertions(+), 18 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/fsl,tcon.txt create mode 100644 Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml diff --git a/Documentation/devicetree/bindings/display/fsl,tcon.txt b/Documentation/devicetree/bindings/display/fsl,tcon.txt deleted file mode 100644 index 475008747801..000000000000 --- a/Documentation/devicetree/bindings/display/fsl,tcon.txt +++ /dev/null @@ -1,17 +0,0 @@ -Device Tree bindings for Freescale TCON Driver - -Required properties: -- compatible: Should be one of - * "fsl,vf610-tcon". - -- reg: Address and length of the register set for tcon. -- clocks: From common clock binding: handle to tcon ipg clock. -- clock-names: From common clock binding: Shall be "ipg". - -Examples: -timing-controller@4003d000 { - compatible = "fsl,vf610-tcon"; - reg = <0x4003d000 0x1000>; - clocks = <&clks VF610_CLK_TCON0>; - clock-names = "ipg"; -}; diff --git a/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml b/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml new file mode 100644 index 000000000000..06bd680524a5 --- /dev/null +++ b/Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/fsl,vf610-tcon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale TCON + +maintainers: + - Frank Li + +properties: + compatible: + const: fsl,vf610-tcon + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ipg + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + + timing-controller@4003d000 { + compatible = "fsl,vf610-tcon"; + reg = <0x4003d000 0x1000>; + clocks = <&clks VF610_CLK_TCON0>; + clock-names = "ipg"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 18f881c9edf3..f3e88dac73d6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7895,7 +7895,7 @@ L: dri-devel@lists.freedesktop.org S: Supported T: git https://gitlab.freedesktop.org/drm/misc/kernel.git F: Documentation/devicetree/bindings/display/fsl,dcu.txt -F: Documentation/devicetree/bindings/display/fsl,tcon.txt +F: Documentation/devicetree/bindings/display/fsl,vf610-tcon.yaml F: drivers/gpu/drm/fsl-dcu/ DRM DRIVERS FOR FREESCALE IMX 5/6 -- 2.51.0 From da076878764e80bd5982fd7364303c6d93dadd7c Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 18 Apr 2025 14:56:16 +0200 Subject: [PATCH 13/16] dt-bindings: arm/cpus: allow up to 3 interconnects entries Allow up to 3 entries as used on the Qualcomm SM8650 CPU nodes. This fixes the following errors: cpu@0: interconnects: [[7, 3, 3, 7, 15, 3], [8, 0, 3, 8, 1, 3], [9, 0, 9, 1]] is too long Fixes: 791a3fcd2345 ("dt-bindings: arm/cpus: Add missing properties") Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20250418-topic-sm8x50-upstream-cpu-icc-max3-v1-1-87d9c2713d72@linaro.org Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 07f0227cf804..c23c90745ad8 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -301,7 +301,7 @@ properties: interconnects: minItems: 1 - maxItems: 2 + maxItems: 3 nvmem-cells: maxItems: 1 -- 2.51.0 From 2b18eda58c86fd3edd64e51b8b9b0e0a718462b9 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Fri, 18 Apr 2025 17:57:25 +0400 Subject: [PATCH 14/16] dt-bindings: interrupt-controller: via,vt8500-intc: Convert to YAML Rewrite the textual description for the VIA/WonderMedia interrupt controller as YAML schema. The original textual version did not contain information about the usage of 'interrupts' to describe the connection of a chained controller to its parent, add it here. A chained controller can trigger up to 8 different interrupts (IRQ0~7) on its parent. Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250418-via_intc_binding-v2-1-b649ce737f71@gmail.com Signed-off-by: Rob Herring (Arm) --- .../interrupt-controller/via,vt8500-intc.txt | 16 ---- .../interrupt-controller/via,vt8500-intc.yaml | 76 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 77 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt deleted file mode 100644 index 0a4ce1051b02..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.txt +++ /dev/null @@ -1,16 +0,0 @@ -VIA/Wondermedia VT8500 Interrupt Controller ------------------------------------------------------ - -Required properties: -- compatible : "via,vt8500-intc" -- reg : Should contain 1 register ranges(address and length) -- #interrupt-cells : should be <1> - -Example: - - intc: interrupt-controller@d8140000 { - compatible = "via,vt8500-intc"; - interrupt-controller; - reg = <0xd8140000 0x10000>; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml new file mode 100644 index 000000000000..bc14c74bf7d5 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/via,vt8500-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA and WonderMedia SoCs Interrupt Controller + +description: + This is the interrupt controller used in single-core ARM SoCs made by + VIA and WonderMedia (up to and including WM8950). Each block handles + up to 64 interrupt sources (level or edge triggered) and can generate + up to 8 interrupts to its parent when used in a chained configuration. + +maintainers: + - Alexey Charkov + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: via,vt8500-intc + + reg: + maxItems: 1 + + interrupts: + items: + - description: + Interrupt number raised by the IRQ0 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ1 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ2 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ3 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ4 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ5 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ6 output of this controller + Only used if this controller is chained + - description: + Interrupt number raised by the IRQ7 output of this controller + Only used if this controller is chained + + interrupt-controller: true + + '#interrupt-cells': + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + interrupt-controller@d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; + #interrupt-cells = <1>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index f3e88dac73d6..5977a3e17cc6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3428,6 +3428,7 @@ M: Krzysztof Kozlowski L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Odd Fixes F: Documentation/devicetree/bindings/i2c/i2c-wmt.txt +F: Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml F: arch/arm/boot/dts/vt8500/ F: arch/arm/mach-vt8500/ F: drivers/clocksource/timer-vt8500.c -- 2.51.0 From 10fc30eaf381cc8a6351129d7a48c4bf979f6002 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 5 Feb 2025 11:46:37 +0100 Subject: [PATCH 15/16] docs: dt: Update overlay file extension Building DTB overlays from .dts files is no longer supported. Update the documentation to reflect this. Fixes: 81d362732bac05f6 ("kbuild: Disallow DTB overlays to built from .dts named source files") Signed-off-by: Geert Uytterhoeven Acked-by: Andrew Davis Reviewed-by: Yanteng Si Link: https://lore.kernel.org/r/ebce4d9591dd0259a636196dda31d40901dc04b0.1738752288.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) --- Documentation/devicetree/overlay-notes.rst | 12 ++++++------ .../translations/zh_CN/devicetree/overlay-notes.rst | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst index e139f22b363e..35e79242af9a 100644 --- a/Documentation/devicetree/overlay-notes.rst +++ b/Documentation/devicetree/overlay-notes.rst @@ -38,10 +38,10 @@ Lets take an example where we have a foo board with the following base tree:: }; ---- foo.dts --------------------------------------------------------------- -The overlay bar.dts, +The overlay bar.dtso, :: - ---- bar.dts - overlay target location by label ---------------------------- + ---- bar.dtso - overlay target location by label --------------------------- /dts-v1/; /plugin/; &ocp { @@ -51,7 +51,7 @@ The overlay bar.dts, ... /* various properties and child nodes */ }; }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- when loaded (and resolved as described in [1]) should result in foo+bar.dts:: @@ -88,9 +88,9 @@ in the base DT. In this case, the target path can be provided. The target location by label syntax is preferred because the overlay can be applied to any base DT containing the label, no matter where the label occurs in the DT. -The above bar.dts example modified to use target path syntax is:: +The above bar.dtso example modified to use target path syntax is:: - ---- bar.dts - overlay target location by explicit path -------------------- + ---- bar.dtso - overlay target location by explicit path ------------------- /dts-v1/; /plugin/; &{/ocp} { @@ -100,7 +100,7 @@ The above bar.dts example modified to use target path syntax is:: ... /* various properties and child nodes */ } }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- Overlay in-kernel API diff --git a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst index 43e3c0bc5a9f..ba5edd05dc1e 100644 --- a/Documentation/translations/zh_CN/devicetree/overlay-notes.rst +++ b/Documentation/translations/zh_CN/devicetree/overlay-notes.rst @@ -43,10 +43,10 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 }; ---- foo.dts --------------------------------------------------------------- -覆盖bar.dts, +覆盖bar.dtso, :: - ---- bar.dts - 按标签覆盖目标位置 ---------------------------- + ---- bar.dtso - 按标签覆盖目标位置 --------------------------- /dts-v1/; /插件/; &ocp { @@ -56,7 +56,7 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 ... /* 各种属性和子节点 */ }; }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- 当加载（并按照[1]中描述的方式解决）时，应该产生foo+bar.dts:: @@ -90,9 +90,9 @@ Documentation/devicetree/dynamic-resolution-notes.rst[1]的配套文档。 DT中的适当位置。在这种情况下，可以提供目标路径。通过标签的目标位置的语法是比 较好的，因为不管标签在DT中出现在哪里，覆盖都可以被应用到任何包含标签的基础DT上。 -上面的bar.dts例子被修改为使用目标路径语法，即为:: +上面的bar.dtso例子被修改为使用目标路径语法，即为:: - ---- bar.dts - 通过明确的路径覆盖目标位置 -------------------- + ---- bar.dtso - 通过明确的路径覆盖目标位置 ------------------- /dts-v1/; /插件/; &{/ocp} { @@ -102,7 +102,7 @@ DT中的适当位置。在这种情况下，可以提供目标路径。通过标 ... /* 各种外围设备和子节点 */ } }; - ---- bar.dts --------------------------------------------------------------- + ---- bar.dtso -------------------------------------------------------------- 内核中关于覆盖的API -- 2.51.0 From 3346f751dfc9af942255f708160e69f81a9445ec Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 1 May 2025 17:09:35 +0200 Subject: [PATCH 16/16] dt-bindings: arm: psci: change labels to lower-case in example DTS coding style expects labels to be lowercase, so adjust the example code. No functional impact. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250501150934.77317-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) --- .../devicetree/bindings/arm/psci.yaml | 30 +++++++++---------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml index cbb012e217ab..7360a2849b5b 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -191,27 +191,27 @@ examples: #size-cells = <0>; #address-cells = <1>; - CPU0: cpu@0 { + cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; enable-method = "psci"; - power-domains = <&CPU_PD0>; + power-domains = <&cpu_pd0>; power-domain-names = "psci"; }; - CPU1: cpu@1 { + cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x100>; enable-method = "psci"; - power-domains = <&CPU_PD1>; + power-domains = <&cpu_pd1>; power-domain-names = "psci"; }; idle-states { - CPU_PWRDN: cpu-power-down { + cpu_pwrdn: cpu-power-down { compatible = "arm,idle-state"; arm,psci-suspend-param = <0x0000001>; entry-latency-us = <10>; @@ -222,7 +222,7 @@ examples: domain-idle-states { - CLUSTER_RET: cluster-retention { + cluster_ret: cluster-retention { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x1000011>; entry-latency-us = <500>; @@ -230,7 +230,7 @@ examples: min-residency-us = <2000>; }; - CLUSTER_PWRDN: cluster-power-down { + cluster_pwrdn: cluster-power-down { compatible = "domain-idle-state"; arm,psci-suspend-param = <0x1000031>; entry-latency-us = <2000>; @@ -244,21 +244,21 @@ examples: compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: power-domain-cpu0 { + cpu_pd0: power-domain-cpu0 { #power-domain-cells = <0>; - domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + domain-idle-states = <&cpu_pwrdn>; + power-domains = <&cluster_pd>; }; - CPU_PD1: power-domain-cpu1 { + cpu_pd1: power-domain-cpu1 { #power-domain-cells = <0>; - domain-idle-states = <&CPU_PWRDN>; - power-domains = <&CLUSTER_PD>; + domain-idle-states = <&cpu_pwrdn>; + power-domains = <&cluster_pd>; }; - CLUSTER_PD: power-domain-cluster { + cluster_pd: power-domain-cluster { #power-domain-cells = <0>; - domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>; }; }; ... -- 2.51.0