From ff9089739784a9766487672b98c8c2caa9aa659b Mon Sep 17 00:00:00 2001 From: Longbin Li Date: Mon, 9 Jun 2025 07:28:35 +0800 Subject: [PATCH] riscv: dts: sophgo: add pwm controller for SG2044 Add pwm device node for SG2044. Signed-off-by: Longbin Li Reviewed-by: Chen Wang Link: https://lore.kernel.org/r/20250608232836.784737-12-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang --- arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts | 4 ++++ arch/riscv/boot/dts/sophgo/sg2044.dtsi | 10 ++++++++++ 2 files changed, 14 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts index 01340f21848f4..b50c3a872d8b7 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts +++ b/arch/riscv/boot/dts/sophgo/sg2044-sophgo-srd3-10.dts @@ -63,6 +63,10 @@ }; }; +&pwm { + status = "okay"; +}; + &sd { bus-width = <4>; no-sdio; diff --git a/arch/riscv/boot/dts/sophgo/sg2044.dtsi b/arch/riscv/boot/dts/sophgo/sg2044.dtsi index b65e491deb8ff..f88cabe757907 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2044.dtsi @@ -347,6 +347,16 @@ }; }; + pwm: pwm@704000c000 { + compatible = "sophgo,sg2044-pwm"; + reg = <0x70 0x4000c000 0x0 0x1000>; + #pwm-cells = <3>; + clocks = <&clk CLK_GATE_APB_PWM>; + clock-names = "apb"; + resets = <&rst RST_PWM>; + status = "disabled"; + }; + syscon: syscon@7050000000 { compatible = "sophgo,sg2044-top-syscon", "syscon"; reg = <0x70 0x50000000 0x0 0x1000>; -- 2.51.0