From f7a98e256ee30f50de1e7b43cc383828834e8c9e Mon Sep 17 00:00:00 2001 From: John Madieu Date: Sat, 29 Mar 2025 13:12:56 +0100 Subject: [PATCH] arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol Add a device node for I2C2 pincontrol. Also enable the I2C2 device node with 1MHz clock frequency as it is connected to the RAA215300 PMIC on the RZ/G3E SoM. Signed-off-by: John Madieu Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250329121258.172099-2-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index 72b42a81bcf3..ca56a9edda2e 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -18,6 +18,7 @@ compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047"; aliases { + i2c2 = &i2c2; mmc0 = &sdhi0; mmc2 = &sdhi2; }; @@ -51,7 +52,19 @@ clock-frequency = <48000000>; }; +&i2c2 { + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; + clock-frequency = <1000000>; + status = "okay"; +}; + &pinctrl { + i2c2_pins: i2c { + pinmux = , /* SCL2 */ + ; /* SDA2 */ + }; + sdhi0_emmc_pins: sd0-emmc { sd0-ctrl { pins = "SD0CLK", "SD0CMD"; -- 2.50.1