From ef3fcfe0639824bc908c7bd18125a97f5f83357c Mon Sep 17 00:00:00 2001 From: Michal Wajdeczko Date: Wed, 19 Jun 2024 23:45:55 +0200 Subject: [PATCH] drm/xe/vf: Don't use register based TLB invalidation if VF MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit VF drivers can only use GuC-based TLB invalidation, as they don't have access to the related registers. However, VFs shouldn't need any explicit TLB invalidation before enabling CTB communication, as there will be an implicit GGTT TLB invalidation issued by the GuC itself as part of MMIO-based action handling. Signed-off-by: Michal Wajdeczko Reviewed-by: Piotr Piórkowski Link: https://patchwork.freedesktop.org/patch/msgid/20240619214557.905-8-michal.wajdeczko@intel.com --- drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c index 23d397a246a8..e1f1ccb01143 100644 --- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c +++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c @@ -13,6 +13,7 @@ #include "xe_guc.h" #include "xe_guc_ct.h" #include "xe_mmio.h" +#include "xe_sriov.h" #include "xe_trace.h" #include "regs/xe_guc_regs.h" @@ -249,6 +250,9 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt) xe_gt_tlb_invalidation_wait(gt, seqno); } else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) { + if (IS_SRIOV_VF(xe)) + return 0; + xe_gt_WARN_ON(gt, xe_force_wake_get(gt_to_fw(gt), XE_FW_GT)); if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) { xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC1, -- 2.50.1