From e3dfcf482d0787a5882f10a33daa4c1ec62b87d2 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Tue, 22 Apr 2025 18:02:18 +0530 Subject: [PATCH] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable ACSPCIE0 output for PCIe1 The PCIe reference clock required by the PCIe Endpoints connected to the PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4-EVM and J742S2-EVM is driven by the ACSPCIE0 module. Add the device-tree support for enabling the same. Signed-off-by: Siddharth Vadapalli Reviewed-by: Udit Kumar Link: https://lore.kernel.org/r/20250422123218.3788223-3-s-vadapalli@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi index 2664f74a9c7a..fa656b7b13a1 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi @@ -5,6 +5,9 @@ * EVM Board Schematics(j784s4): https://www.ti.com/lit/zip/sprr458 * EVM Board Schematics(j742s2): https://www.ti.com/lit/zip/SPAC001 */ + +#include + / { chosen { stdout-path = "serial2:115200n8"; @@ -1407,10 +1410,13 @@ &pcie1_rc { status = "okay"; + clocks = <&k3_clks 333 0>, <&serdes0 CDNS_TORRENT_REFCLK_DRIVER>; + clock-names = "fck", "pcie_refclk"; num-lanes = <2>; reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; phys = <&serdes0_pcie1_link>; phy-names = "pcie-phy"; + ti,syscon-acspcie-proxy-ctrl = <&acspcie0_proxy_ctrl 0x1>; }; &serdes1 { -- 2.50.1