From e10414cf2e55fd9db7a72862ede04e22fe0c0caf Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Sun, 13 Apr 2025 10:19:24 -0400 Subject: [PATCH] drm/amdgpu/gfx12: properly reference EOP interrupts for userqs Regardless of whether we disable kernel queues, we need to take an extra reference to the pipe interrupts for user queues to make sure they stay enabled in case we disable them for kernel queues. Reviewed-by: Sunil Khatri Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c index f347921fa909..4c8958f91eda 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c @@ -3680,10 +3680,10 @@ static int gfx_v12_0_hw_init(struct amdgpu_ip_block *ip_block) static int gfx_v12_0_set_userq_eop_interrupts(struct amdgpu_device *adev, bool enable) { - if (adev->gfx.disable_kq) { - unsigned int irq_type; - int m, p, r; + unsigned int irq_type; + int m, p, r; + if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) { for (m = 0; m < adev->gfx.me.num_me; m++) { for (p = 0; p < adev->gfx.me.num_pipe_per_me; p++) { irq_type = AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP + p; @@ -3697,7 +3697,9 @@ static int gfx_v12_0_set_userq_eop_interrupts(struct amdgpu_device *adev, return r; } } + } + if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) { for (m = 0; m < adev->gfx.mec.num_mec; ++m) { for (p = 0; p < adev->gfx.mec.num_pipe_per_mec; p++) { irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP @@ -3714,6 +3716,7 @@ static int gfx_v12_0_set_userq_eop_interrupts(struct amdgpu_device *adev, } } } + return 0; } -- 2.50.1