From e009473c5f5d62d4e0f093a3126cf98e319d8cd0 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:18 +0200 Subject: [PATCH] arm64: dts: qcom: sdm670: Affirm IDR0.CCTW on apps_smmu On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio Tested-by: Steev Klimaszewski # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-5-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm670.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi index 187c6698835d..a08a64bc033f 100644 --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi @@ -1737,6 +1737,7 @@ , , ; + dma-coherent; }; gladiator_noc: interconnect@17900000 { -- 2.50.1