From db8266017e0a703809c83453112c8d5ceb4f03af Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 16 May 2025 10:59:39 +0100 Subject: [PATCH] dt-bindings: PCI: microchip,pcie-host: Fix DMA coherency property MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit PolarFire SoC may be configured in a way that requires non-coherent DMA handling. On RISC-V, buses are coherent by default & the dma-noncoherent property is required to denote buses or devices that are non-coherent. For some reason, instead of adding dma-noncoherent to the binding the pointless, NOP, property dma-coherent was. Swap dma-coherent for dma-noncoherent. Fixes: 04aa999eb96fd ("dt-bindings: PCI: microchip,pcie-host: Allow dma-noncoherent") Signed-off-by: Conor Dooley Signed-off-by: Krzysztof Wilczyński Link: https://lore.kernel.org/r/20250516-datebook-senator-ff7a1c30cbd5@spud --- Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml index 1aadfdee868f..47b0bad690d5 100644 --- a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml @@ -50,7 +50,7 @@ properties: items: pattern: '^fic[0-3]$' - dma-coherent: true + dma-noncoherent: true ranges: minItems: 1 -- 2.50.1