From d279c73576a7ce87f2f7ba510311c3c53ded11ea Mon Sep 17 00:00:00 2001 From: Fei Shao Date: Mon, 14 Oct 2024 19:09:31 +0800 Subject: [PATCH] arm64: dts: mediatek: mt8188: Add eDP and DP TX nodes Add edp-tx and dp-tx nodes for the Embedded DisplayPort (eDP) and DisplayPort ports to connect to DP-INTF ports and panels, and add the efuse cell for the DP calibration data. Individual board device tree should enable the nodes and connect input and output ports as needed. Signed-off-by: Fei Shao Link: https://lore.kernel.org/r/20241014111053.2294519-10-fshao@chromium.org Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index 0935f2ccb2b01..2710e18ce6969 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -2021,6 +2021,10 @@ #address-cells = <1>; #size-cells = <1>; + dp_calib_data: dp-calib@1a0 { + reg = <0x1a0 0xc>; + }; + lvts_efuse_data1: lvts1-calib@1ac { reg = <0x1ac 0x40>; }; @@ -2882,5 +2886,27 @@ power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c12XXXX 0x4000 0x1000>; }; + + edp_tx: edp-tx@1c500000 { + compatible = "mediatek,mt8188-edp-tx"; + reg = <0 0x1c500000 0 0x8000>; + interrupts = ; + nvmem-cells = <&dp_calib_data>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8188_POWER_DOMAIN_EDP_TX>; + max-linkrate-mhz = <8100>; + status = "disabled"; + }; + + dp_tx: dp-tx@1c600000 { + compatible = "mediatek,mt8188-dp-tx"; + reg = <0 0x1c600000 0 0x8000>; + interrupts = ; + nvmem-cells = <&dp_calib_data>; + nvmem-cell-names = "dp_calibration_data"; + power-domains = <&spm MT8188_POWER_DOMAIN_DP_TX>; + max-linkrate-mhz = <5400>; + status = "disabled"; + }; }; }; -- 2.50.1