From c65ee1b1ffc68e274d6c1cebdf9df09407d180fd Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jouni=20H=C3=B6gander?= Date: Fri, 22 Aug 2025 13:58:46 +0300 Subject: [PATCH] drm/i915/psr: Do not unnecessarily remove underrun on idle PSR WA MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We are currently removing underrun on idle PSR WA even if it's not applied. Fix this by checking pkg_c_latency_used on PSR exit as well. Fixes: 9b1795e9b0ae ("drm/i915/psr: Underrun on idle PSR wa only when pkgc latency > delayed vblank") Signed-off-by: Jouni Högander Reviewed-by: Uma Shankar Link: https://lore.kernel.org/r/20250822105846.1023631-1-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/intel_psr.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index eec4f7dc2d66..681e20d92376 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2095,8 +2095,9 @@ static void intel_psr_exit(struct intel_dp *intel_dp) drm_WARN_ON(display->drm, !(val & EDP_PSR2_ENABLE)); } else { - if (DISPLAY_VER(display) == 20 || - IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0)) + if ((DISPLAY_VER(display) == 20 || + IS_DISPLAY_VERx100_STEP(display, 3000, STEP_A0, STEP_B0)) && + intel_dp->psr.pkg_c_latency_used) intel_dmc_start_pkgc_exit_at_start_of_undelayed_vblank(display, intel_dp->psr.pipe, false); -- 2.51.0