From c143db7dba1d3a4edce36c89c50e54dd856d7c41 Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Thu, 24 Jul 2025 21:29:00 +0300 Subject: [PATCH] drm/i915/dp: Fix disabling training pattern at end of UHBR link training MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The Fixed: commit below overlooked the fact that intel_dp_link_train_all_phys() is only used for non-UHBR link rates, but intel_dp_stop_link_train() is used for both non-UHBR and UHBR link rates. Hence, after removing the disabling of the training pattern from intel_dp_stop_link_train(), the commit missed adding this back to the end of UHBR link training in intel_dp_128b132b_link_train(). This left the sink in link training mode at the end of an UHBR rate link training. Fix things by disabling the training pattern at the end of UHBR link training as well. Cc: Ville Syrjälä Fixes: 11fab5a2a1ad ("drm/i915/dp: Clear DPCD training pattern before transmitting the idle pattern") Reviewed-by: Arun R Murthy Signed-off-by: Imre Deak Link: https://lore.kernel.org/r/20250724182900.160891-1-imre.deak@intel.com --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c index 344b74109a83..9d14b4e59545 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c @@ -1609,6 +1609,8 @@ out: intel_dp_program_link_training_pattern(intel_dp, crtc_state, DP_PHY_DPRX, DP_TRAINING_PATTERN_2); + intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX); + return passed; } -- 2.51.0