From bfb20a655848a9088e3e9ae24b1dcce1bbf016c2 Mon Sep 17 00:00:00 2001 From: Ariel D'Alessandro Date: Mon, 24 Mar 2025 15:58:01 -0300 Subject: [PATCH] drm/panfrost: Force AARCH64_4K page table format on MediaTek MT8192 MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that Panfrost supports AARCH64_4K page table format, let's enable it on this SoC. Running glmark2-es2-drm [0] benchmark, reported the same performance score on both modes Mali LPAE (LEGACY) vs. AARCH64_4K, before and after this commit. Tested on a Mediatek (MT8395) Genio 1200 EVK board. [0] https://github.com/glmark2/glmark2 Signed-off-by: Ariel D'Alessandro Reviewed-by: Boris Brezillon Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Steven Price Link: https://lore.kernel.org/r/20250324185801.168664-7-ariel.dalessandro@collabora.com --- drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index f80ec8ef5953..b87f83e94eda 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -836,6 +836,7 @@ static const struct panfrost_compatible mediatek_mt8192_data = { .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names = mediatek_mt8192_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), + .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; static const struct of_device_id dt_match[] = { -- 2.50.1