From bdc76c19db1b969d3d7d5da9cccfb39c6bbe6a5c Mon Sep 17 00:00:00 2001 From: =?utf8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= Date: Fri, 2 May 2025 12:43:21 -0400 Subject: [PATCH] dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The register space described by DT node of compatible mediatek,mt8365-infracfg-nao exposes a variety of unrelated registers, including registers for controlling bus protection on the MT8365 SoC, which is used by the power domain controller through a syscon. Add this compatible to the syscon binding. Signed-off-by: Nícolas F. R. A. Prado Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20250502-mt8365-infracfg-nao-compatible-v1-1-e40394573f98@collabora.com Signed-off-by: Lee Jones --- Documentation/devicetree/bindings/mfd/syscon.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 0f784f469835..27672adeb1fe 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -194,6 +194,7 @@ properties: - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg - mediatek,mt8173-pctl-a-syscfg + - mediatek,mt8365-infracfg-nao - mediatek,mt8365-syscfg - microchip,lan966x-cpu-syscon - microchip,mpfs-sysreg-scb -- 2.50.1