From b6bf37e40cbec2ceb880b625d0635784dd64afec Mon Sep 17 00:00:00 2001 From: Xu Yang Date: Thu, 10 Apr 2025 14:49:05 +0800 Subject: [PATCH] arm64: dts: imx95: add USB2.0 nodes Add USB2.0 controller and phy nodes. Tested-by: Alexander Stein # TQMa95xxSA Reviewed-by: Frank Li Signed-off-by: Xu Yang Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx95.dtsi | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 9bb26b466a06..8dd859d8d319 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -470,6 +470,13 @@ }; }; + usbphynop: usbphynop { + compatible = "usb-nop-xceiv"; + clocks = <&scmi_clk IMX95_CLK_HSIO>; + clock-names = "main_clk"; + #phy-cells = <0>; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -1621,6 +1628,29 @@ status = "disabled"; }; + usb2: usb@4c200000 { + compatible = "fsl,imx95-usb", "fsl,imx7d-usb", "fsl,imx27-usb"; + reg = <0x0 0x4c200000 0x0 0x200>; + interrupts = , + ; + clocks = <&scmi_clk IMX95_CLK_HSIO>, + <&scmi_clk IMX95_CLK_32K>; + clock-names = "usb_ctrl_root", "usb_wakeup"; + iommus = <&smmu 0xf>; + phys = <&usbphynop>; + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + fsl,usbmisc = <&usbmisc 0>; + status = "disabled"; + }; + + usbmisc: usbmisc@4c200200 { + compatible = "fsl,imx95-usbmisc", "fsl,imx7d-usbmisc", + "fsl,imx6q-usbmisc"; + reg = <0x0 0x4c200200 0x0 0x200>, + <0x0 0x4c010014 0x0 0x04>; + #index-cells = <1>; + }; + pcie0: pcie@4c300000 { compatible = "fsl,imx95-pcie"; reg = <0 0x4c300000 0 0x10000>, -- 2.50.1