From acca163f3f5171b05438114e089e01bedcfeb6c6 Mon Sep 17 00:00:00 2001 From: Yixun Lan Date: Wed, 30 Apr 2025 13:32:06 +0800 Subject: [PATCH] arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board On Radxa A5E board, the EMAC0 connect to external Maxio MAE0621A PHY, which features a 25MHz crystal, and using PH8 pin as PHY reset. Tested on A5E board with schematic V1.20. Tested-by: Corentin LABBE Signed-off-by: Yixun Lan Link: https://patch.msgid.link/20250430-01-sun55i-emac0-v3-4-6fc000bbccbd@gentoo.org Signed-off-by: Chen-Yu Tsai --- .../dts/allwinner/sun55i-a527-cubie-a5e.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts index 2d2f3af91d05..0f58d92a6adc 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts @@ -12,6 +12,7 @@ compatible = "radxa,cubie-a5e", "allwinner,sun55i-a527"; aliases { + ethernet0 = &emac0; serial0 = &uart0; }; @@ -54,6 +55,24 @@ status = "okay"; }; +&emac0 { + phy-mode = "rgmii-id"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_cldo3>; + + allwinner,tx-delay-ps = <300>; + allwinner,rx-delay-ps = <400>; + + status = "okay"; +}; + +&mdio0 { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + &mmc0 { vmmc-supply = <®_cldo3>; cd-gpios = <&pio 5 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PF6 */ -- 2.50.1