From abbf127283aceeda6c16d2243d6683e3dc3509d6 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 8 May 2025 09:43:13 +0200 Subject: [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD The CPLD has no dedicated driver, so apply the pinmux settings with the pinmux driver instead. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250508074311.20343-5-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts index 328cb35547d79..2de047393652c 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts @@ -170,6 +170,9 @@ }; &pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&pins_cpld>; + pins_can0: pins_can0 { pinmux = , /* CAN0_TXD */ ; /* CAN0_RXD */ @@ -182,6 +185,13 @@ drive-strength = <6>; }; + pins_cpld: pins-cpld { + pinmux = , + , + , + ; + }; + pins_eth3: pins_eth3 { pinmux = , , -- 2.50.1