From a94a244a5b1a2040611aaaa17fd23dd908bc01ac Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 5 Aug 2024 14:17:05 +0100 Subject: [PATCH] arm64: dts: renesas: r9a07g043u: Add FCPVD node Add FCPVD node to RZ/G2UL SoC DTSI. Signed-off-by: Biju Das Reviewed-by: Laurent Pinchart Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20240805131709.101679-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi index 20fb5e41c598..4cfcef60680c 100644 --- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi @@ -129,6 +129,17 @@ }; }; + fcpvd: fcp@10880000 { + compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv"; + reg = <0 0x10880000 0 0x10000>; + clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>, + <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>, + <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>; + clock-names = "aclk", "pclk", "vclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G043_LCDC_RESET_N>; + }; + irqc: interrupt-controller@110a0000 { compatible = "renesas,r9a07g043u-irqc", "renesas,rzg2l-irqc"; -- 2.50.1