From a22d3039a1d25312ecde0d02bcad4dd235f03e5e Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 21 Feb 2025 17:51:59 +0200 Subject: [PATCH] dt-bindings: PCI: qcom-ep: Describe optional dma-coherent property MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Qualcomm SA8775P supports cache coherency on the PCIe Endpoint controller. Thus, allow "dma-coherent" property to be used for this device. This fixes a part of the following error (the second part is fixed in the next commit): pcie-ep@1c10000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected) Fixes: 4b220c6fa9f3 ("arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent") Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-1-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 1226ee5d08d1..0c2ca4cfa3b1 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -91,6 +91,8 @@ properties: - const: pcie-mem - const: cpu-pcie + dma-coherent: true + resets: maxItems: 1 -- 2.50.1