From a1ea30b69e02eb02043b0d6d7c42abcfafe99bd0 Mon Sep 17 00:00:00 2001 From: Daniele Ceraolo Spurio Date: Fri, 19 Apr 2024 11:34:12 -0700 Subject: [PATCH] drm/xe/gsc: define GSCCS for LNL LNL has 1 GSCCS, same as MTL. Note that the GSCCS will be disabled until we have a GSC FW defined, but having it in the list of engine is a requirement to add such definition. v2: rebase Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Shekhar Chauhan Reviewed-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/20240419183412.1605782-2-daniele.ceraolospurio@intel.com --- drivers/gpu/drm/xe/xe_pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index fb20c9828563..d0d4d8f9749c 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -211,7 +211,8 @@ static const struct xe_media_desc media_xe2 = { .name = "Xe2_LPM / Xe2_HPM", .hw_engine_mask = GENMASK(XE_HW_ENGINE_VCS7, XE_HW_ENGINE_VCS0) | - GENMASK(XE_HW_ENGINE_VECS3, XE_HW_ENGINE_VECS0), /* TODO: GSC0 */ + GENMASK(XE_HW_ENGINE_VECS3, XE_HW_ENGINE_VECS0) | + BIT(XE_HW_ENGINE_GSCCS0) }; static const struct xe_device_desc tgl_desc = { -- 2.50.1