From 9eb81b31ab62cfaa243c6fe948b9f7cfdfdad666 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 26 Nov 2024 11:22:51 +0100 Subject: [PATCH] arm64: dts: qcom: sm8650: Add 'global' interrupt to the PCIe RC nodes Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt to the host CPUs. This interrupt can be used by the device driver to identify events such as PCIe link specific events, safety events, etc... Hence, add it to the PCIe RC node along with the existing MSI interrupts. Signed-off-by: Neil Armstrong Reviewed-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20241126-topic-sm8x50-pcie-global-irq-v1-3-4049cfccd073@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 2a9a413374a6..86684cb9a932 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2267,7 +2267,8 @@ , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -2275,7 +2276,8 @@ "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; clocks = <&gcc GCC_PCIE_0_AUX_CLK>, <&gcc GCC_PCIE_0_CFG_AHB_CLK>, @@ -2399,7 +2401,8 @@ , , , - ; + , + ; interrupt-names = "msi0", "msi1", "msi2", @@ -2407,7 +2410,8 @@ "msi4", "msi5", "msi6", - "msi7"; + "msi7", + "global"; clocks = <&gcc GCC_PCIE_1_AUX_CLK>, <&gcc GCC_PCIE_1_CFG_AHB_CLK>, -- 2.50.1