From 94d904aec19c276057d4cd9dfcc15846bee852e7 Mon Sep 17 00:00:00 2001 From: Austin Zheng Date: Thu, 26 Sep 2024 16:18:10 -0400 Subject: [PATCH] drm/amd/display: Allow Latency Increase For Last Strategy [Why] Playing 1080p video on 4k60 timing uses UCLK DPM5 and mode support determines that p-state switching is not supported. [How] Allow DML to increase latency as the last strategy so strategies such as VBlank p-state switching may become possible Reviewed-by: Alvin Lee Signed-off-by: Austin Zheng Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- .../amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c index 1cf9015e854a..5a09dd298e6f 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c @@ -1798,6 +1798,7 @@ bool pmo_dcn4_fams2_init_for_pstate_support(struct dml2_pmo_init_for_pstate_supp } if (s->pmo_dcn4.num_pstate_candidates > 0) { + s->pmo_dcn4.pstate_strategy_candidates[s->pmo_dcn4.num_pstate_candidates - 1].allow_state_increase = true; s->pmo_dcn4.cur_pstate_candidate = -1; return true; } else { -- 2.50.1