From 913240e47b414653d7801f6d04cffa9146a13396 Mon Sep 17 00:00:00 2001 From: Shravan Kumar Ramani Date: Thu, 9 Jan 2025 09:39:23 -0500 Subject: [PATCH] Documentation/ABI: Add new sysfs field to sysfs-platform-mellanox-pmc MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Document newly added "count_clock" sysfs entry for the Mellanox BlueField PMC driver. Signed-off-by: Shravan Kumar Ramani Reviewed-by: David Thompson Link: https://lore.kernel.org/r/367301238efff01fc200c67bca461c0424baf95d.1736413033.git.shravankr@nvidia.com [ij: corrected KernelVersion & Date] Reviewed-by: Ilpo Järvinen Signed-off-by: Ilpo Järvinen --- Documentation/ABI/testing/sysfs-platform-mellanox-pmc | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-platform-mellanox-pmc b/Documentation/ABI/testing/sysfs-platform-mellanox-pmc index 9f987c6410da..29b3f9c58e00 100644 --- a/Documentation/ABI/testing/sysfs-platform-mellanox-pmc +++ b/Documentation/ABI/testing/sysfs-platform-mellanox-pmc @@ -52,3 +52,13 @@ Description: Writing 0 to the sysfs will clear the counter, writing any other value is not allowed. +What: /sys/bus/platform/devices//hwmon/hwmonX//count_clock +Date: Mar 2025 +KernelVersion: 6.14 +Contact: "Shravan Kumar Ramani " +Description: + Use a counter for counting cycles. This is used to repurpose/dedicate + any of the counters in the block to counting cycles. Each counter is + represented by a bit (bit 0 for counter0, bit1 for counter1 and so on) + and setting the corresponding bit will reserve that specific counter + for counting cycles and override the event setting. -- 2.50.1