From 8abb693f80760b5078bfb8c247dda6d620aa5c2e Mon Sep 17 00:00:00 2001
From: Christoph Hellwig <hch@lst.de>
Date: Tue, 7 Jun 2022 09:49:04 +0200
Subject: [PATCH] rewrite the volatile write cache section

Remove a reference to the SATL spec, and take the VWC bit into account.

Signed-off-by: Christoph Hellwig <hch@lst.de>
---
 scsi_nvme_middle.xml | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/scsi_nvme_middle.xml b/scsi_nvme_middle.xml
index 8cd393f..cd9b5bc 100644
--- a/scsi_nvme_middle.xml
+++ b/scsi_nvme_middle.xml
@@ -111,10 +111,12 @@
 
   <section anchor='ssc:caches' title='Volatile write caches'>
     <t>
-      The Volatile Write Cache Enable (WCE) bit (i.e., bit 00) in
+      For NVMe devices a volatile write cache is enabled if bit 0 of the
+      Volatile Write Cache (VWC) field in the Identify Controller Data
+      Structure (see Figure 109 in <xref target="NVME" />) is set and
+      the Volatile Write Cache Enable (WCE) bit (i.e., bit 00) in
       the Volatile Write Cache Feature (Feature Identifier 06h)
-      is the Write Cache Enable field in the NVMe Get Features command
-      (see Section 6.3.3.2 of <xref target="NVME-STLR" />).
+      (see Section 5.21.1.6 of <xref target="NVME" />) is set.
       If a write cache is enabled on a NVMe device used as a storage
       device for the pNFS SCSI layout, the MDS MUST use the NVMe FLUSH
       command to flush the volatile write cache.
-- 
2.50.1