From 885e5cbaa0ee3738fcd99167439459ede2cc102c Mon Sep 17 00:00:00 2001 From: Johannes Berg Date: Fri, 25 Apr 2025 11:59:08 +0200 Subject: [PATCH] Revert "wifi: iwlwifi: clean up config macro" This reverts commit b6abf63ed7719f6dc1f7e36375b970126e29e709. This is causing major merge conflicts with the changes in wireless, where we reverted some changes. Revert this for now to avoid having to solve that problem. We can redo it on top of wireless-next with wireless merged back later. Signed-off-by: Johannes Berg --- drivers/net/wireless/intel/iwlwifi/Makefile | 2 - drivers/net/wireless/intel/iwlwifi/pcie/drv.c | 1175 +++++++++-------- 2 files changed, 637 insertions(+), 540 deletions(-) diff --git a/drivers/net/wireless/intel/iwlwifi/Makefile b/drivers/net/wireless/intel/iwlwifi/Makefile index 88c05f651209..9546ceeaf5e3 100644 --- a/drivers/net/wireless/intel/iwlwifi/Makefile +++ b/drivers/net/wireless/intel/iwlwifi/Makefile @@ -26,8 +26,6 @@ iwlwifi-$(CONFIG_ACPI) += fw/acpi.o iwlwifi-$(CONFIG_EFI) += fw/uefi.o iwlwifi-$(CONFIG_IWLWIFI_DEBUGFS) += fw/debugfs.o -CFLAGS_pcie/drv.o += -Wno-override-init - iwlwifi-objs += $(iwlwifi-m) iwlwifi-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c index 0330e55e8480..93446c374008 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c @@ -551,604 +551,703 @@ VISIBLE_IF_IWLWIFI_KUNIT const struct pci_device_id iwl_hw_card_ids[] = { MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); EXPORT_SYMBOL_IF_IWLWIFI_KUNIT(iwl_hw_card_ids); -#define _IWL_DEV_INFO(_cfg, _name, ...) { \ - .cfg = &_cfg, \ - .name = _name, \ - .device = IWL_CFG_ANY, \ - .subdevice = IWL_CFG_ANY, \ - .mac_type = IWL_CFG_ANY, \ - .mac_step = IWL_CFG_ANY, \ - .rf_type = IWL_CFG_ANY, \ - .rf_step = IWL_CFG_ANY, \ - .bw_limit = IWL_CFG_BW_ANY, \ - .jacket = IWL_CFG_ANY, \ - .cores = IWL_CFG_ANY, \ - .rf_id = IWL_CFG_ANY, \ - .cdb = IWL_CFG_ANY, \ - __VA_ARGS__ \ -} -#define IWL_DEV_INFO(_cfg, _name, ...) \ - _IWL_DEV_INFO(_cfg, _name, __VA_ARGS__) - -#define DEVICE(n) .device = (n) -#define SUBDEV(n) .subdevice = (n) -#define MAC_TYPE(n) .mac_type = IWL_CFG_MAC_TYPE_##n -#define MAC_STEP(n) .mac_step = SILICON_##n##_STEP -#define RF_TYPE(n) .rf_type = IWL_CFG_RF_TYPE_##n -#define RF_STEP(n) .rf_step = SILICON_##n##_STEP -#define CORES(n) .cores = IWL_CFG_CORES_##n -#define RF_ID(n) .rf_id = IWL_CFG_RF_ID_##n -#define NO_CDB .cdb = IWL_CFG_NO_CDB -#define CDB .cdb = IWL_CFG_CDB -#define BW_NO_LIMIT .bw_limit = IWL_CFG_BW_NO_LIM -#define BW_LIMIT(n) .bw_limit = (n) +#define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _mac_step, _rf_type, \ + _rf_id, _rf_step, _bw_limit, _cores, _cdb, _cfg, _name) \ + { .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \ + .name = _name, .mac_type = _mac_type, .rf_type = _rf_type, .rf_step = _rf_step, \ + .bw_limit = _bw_limit, .cores = _cores, .rf_id = _rf_id, \ + .mac_step = _mac_step, .cdb = _cdb, .jacket = IWL_CFG_ANY } + +#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \ + _IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \ + IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \ + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY, \ + _cfg, _name) VISIBLE_IF_IWLWIFI_KUNIT const struct iwl_dev_info iwl_dev_info_table[] = { #if IS_ENABLED(CONFIG_IWLMVM) /* 9000 */ - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_killer_1550_name, - DEVICE(0x2526), SUBDEV(0x1550), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name, - DEVICE(0x2526), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name, - DEVICE(0x2526), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name, - DEVICE(0x30DC), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name, - DEVICE(0x30DC), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name, - DEVICE(0x31DC), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name, - DEVICE(0x31DC), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name, - DEVICE(0xA370), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name, - DEVICE(0xA370), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name, - DEVICE(0x54F0), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name, - DEVICE(0x54F0), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name, - DEVICE(0x51F0), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name, - DEVICE(0x51F0), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name, - DEVICE(0x51F0), SUBDEV(0x1691), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name, - DEVICE(0x51F0), SUBDEV(0x1692), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name, - DEVICE(0x51F1), SUBDEV(0x1692), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name, - DEVICE(0x54F0), SUBDEV(0x1691), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name, - DEVICE(0x54F0), SUBDEV(0x1692), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name, - DEVICE(0x7A70), SUBDEV(0x1691), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name, - DEVICE(0x7A70), SUBDEV(0x1692), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name, - DEVICE(0x7AF0), SUBDEV(0x1691), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name, - DEVICE(0x7AF0), SUBDEV(0x1692), BW_NO_LIMIT), - - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_1_name, - DEVICE(0x271C), SUBDEV(0x0214), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax411_killer_1690s_name, - DEVICE(0x7E40), SUBDEV(0x1691), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax411_killer_1690i_name, - DEVICE(0x7E40), SUBDEV(0x1692), BW_NO_LIMIT), + IWL_DEV_INFO(0x2526, 0x1550, iwl9260_2ac_cfg, iwl9260_killer_1550_name), + IWL_DEV_INFO(0x2526, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), + IWL_DEV_INFO(0x2526, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), + IWL_DEV_INFO(0x30DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), + IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), + IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), + IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), + IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), + IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), + IWL_DEV_INFO(0x54F0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name), + IWL_DEV_INFO(0x54F0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), + IWL_DEV_INFO(0x51F0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name), + IWL_DEV_INFO(0x51F0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name), + IWL_DEV_INFO(0x51F0, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x51F0, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), + IWL_DEV_INFO(0x51F1, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), + IWL_DEV_INFO(0x54F0, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x54F0, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), + IWL_DEV_INFO(0x7A70, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x7A70, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), + IWL_DEV_INFO(0x7AF0, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x7AF0, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), + + IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name), + IWL_DEV_INFO(0x7E40, 0x1691, iwl_cfg_ma, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x7E40, 0x1692, iwl_cfg_ma, iwl_ax411_killer_1690i_name), /* AX200 */ - IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_name, - DEVICE(0x2723), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name, - DEVICE(0x2723), SUBDEV(0x1653), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name, - DEVICE(0x2723), SUBDEV(0x1654), BW_NO_LIMIT), + IWL_DEV_INFO(0x2723, IWL_CFG_ANY, iwl_ax200_cfg_cc, iwl_ax200_name), + IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name), + IWL_DEV_INFO(0x2723, 0x1654, iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name), /* Qu with Hr */ - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650s_2ax_cfg_qu_b0_hr_b0, - iwl_ax201_killer_1650s_name, - DEVICE(0x43F0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650i_2ax_cfg_qu_b0_hr_b0, - iwl_ax201_killer_1650i_name, - DEVICE(0x43F0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x43F0), SUBDEV(0x4070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x0A10), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650s_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0xA0F0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650i_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0xA0F0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x4070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0xA0F0), SUBDEV(0x6074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x6074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x02F0), SUBDEV(0x4070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax1650s_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax1650i_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_quz_hr, NULL, - DEVICE(0x06F0), SUBDEV(0x4070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650s_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x34F0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650i_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x34F0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x34F0), SUBDEV(0x4070), BW_NO_LIMIT), - - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650s_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x3DF0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650i_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x3DF0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x3DF0), SUBDEV(0x4070), BW_NO_LIMIT), - - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x0070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x0074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x0078), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x007C), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650s_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x4DF0), SUBDEV(0x1651), BW_NO_LIMIT), - IWL_DEV_INFO(killer1650i_2ax_cfg_qu_b0_hr_b0, NULL, - DEVICE(0x4DF0), SUBDEV(0x1652), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x2074), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x4070), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_ax201_cfg_qu_hr, NULL, - DEVICE(0x4DF0), SUBDEV(0x6074), BW_NO_LIMIT), + IWL_DEV_INFO(0x43F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650s_name), + IWL_DEV_INFO(0x43F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650i_name), + IWL_DEV_INFO(0x43F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x43F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x0A10, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0xA0F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0xA0F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0xA0F0, 0x6074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x6074, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x02F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x06F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x0310, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x34F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x34F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x34F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + + IWL_DEV_INFO(0x3DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x3DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x3DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x3DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + + IWL_DEV_INFO(0x4DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x4DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL), + IWL_DEV_INFO(0x4DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL), + IWL_DEV_INFO(0x4DF0, 0x6074, iwl_ax201_cfg_qu_hr, NULL), /* So with HR */ - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0090), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0020), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x2020), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0024), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0510), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x0A10), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0xE020), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0xE024), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x4020), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x6020), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, NULL, - DEVICE(0x2725), SUBDEV(0x6024), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675w_name, - DEVICE(0x2725), SUBDEV(0x1673), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675x_name, - DEVICE(0x2725), SUBDEV(0x1674), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x0090), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x0098), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x00B0), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x0510), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0_long, NULL, - DEVICE(0x7A70), SUBDEV(0x0A10), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x0090), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x0098), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x00B0), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x0310), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x0510), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, NULL, - DEVICE(0x7AF0), SUBDEV(0x0A10), BW_NO_LIMIT), + IWL_DEV_INFO(0x2725, 0x0090, iwlax211_2ax_cfg_so_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x0020, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x2020, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x0024, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x0310, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x0510, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x0A10, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0xE020, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0xE024, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x4020, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x6020, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x6024, iwlax210_2ax_cfg_ty_gf_a0, NULL), + IWL_DEV_INFO(0x2725, 0x1673, iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675w_name), + IWL_DEV_INFO(0x2725, 0x1674, iwlax210_2ax_cfg_ty_gf_a0, iwl_ax210_killer_1675x_name), + IWL_DEV_INFO(0x7A70, 0x0090, iwlax211_2ax_cfg_so_gf_a0_long, NULL), + IWL_DEV_INFO(0x7A70, 0x0098, iwlax211_2ax_cfg_so_gf_a0_long, NULL), + IWL_DEV_INFO(0x7A70, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0_long, NULL), + IWL_DEV_INFO(0x7A70, 0x0310, iwlax211_2ax_cfg_so_gf_a0_long, NULL), + IWL_DEV_INFO(0x7A70, 0x0510, iwlax211_2ax_cfg_so_gf_a0_long, NULL), + IWL_DEV_INFO(0x7A70, 0x0A10, iwlax211_2ax_cfg_so_gf_a0_long, NULL), + IWL_DEV_INFO(0x7AF0, 0x0090, iwlax211_2ax_cfg_so_gf_a0, NULL), + IWL_DEV_INFO(0x7AF0, 0x0098, iwlax211_2ax_cfg_so_gf_a0, NULL), + IWL_DEV_INFO(0x7AF0, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0, NULL), + IWL_DEV_INFO(0x7AF0, 0x0310, iwlax211_2ax_cfg_so_gf_a0, NULL), + IWL_DEV_INFO(0x7AF0, 0x0510, iwlax211_2ax_cfg_so_gf_a0, NULL), + IWL_DEV_INFO(0x7AF0, 0x0A10, iwlax211_2ax_cfg_so_gf_a0, NULL), /* So with JF */ - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name, - DEVICE(0x7A70), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name, - DEVICE(0x7A70), SUBDEV(0x1552), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name, - DEVICE(0x7AF0), SUBDEV(0x1551), BW_NO_LIMIT), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name, - DEVICE(0x7AF0), SUBDEV(0x1552), BW_NO_LIMIT), + IWL_DEV_INFO(0x7A70, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name), + IWL_DEV_INFO(0x7A70, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name), + IWL_DEV_INFO(0x7AF0, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_160_name), + IWL_DEV_INFO(0x7AF0, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_160_name), /* SO with GF2 */ - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x2726), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x2726), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x51F0), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x51F0), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x51F1), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x51F1), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x54F0), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x54F0), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x7A70), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x7A70), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x7AF0), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x7AF0), SUBDEV(0x1672), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name, - DEVICE(0x7F70), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name, - DEVICE(0x7F70), SUBDEV(0x1672), BW_NO_LIMIT), + IWL_DEV_INFO(0x2726, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x2726, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x51F0, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x51F0, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x51F1, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x51F1, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x54F0, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x54F0, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x7A70, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x7A70, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x7AF0, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x7AF0, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x7F70, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x7F70, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), /* MA with GF2 */ - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax211_killer_1675s_name, - DEVICE(0x7E40), SUBDEV(0x1671), BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax211_killer_1675i_name, - DEVICE(0x7E40), SUBDEV(0x1672), BW_NO_LIMIT), - - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9461_160_name, MAC_TYPE(PU), - RF_TYPE(JF1), RF_ID(JF1), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9461_name, MAC_TYPE(PU), - RF_TYPE(JF1), RF_ID(JF1), - BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9462_160_name, MAC_TYPE(PU), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9462_name, MAC_TYPE(PU), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_160_name, MAC_TYPE(PU), - RF_TYPE(JF2), RF_ID(JF), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_2ac_cfg_soc, iwl9560_name, MAC_TYPE(PU), - RF_TYPE(JF2), RF_ID(JF), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9270_160_name, DEVICE(0x2526), - MAC_TYPE(TH), RF_TYPE(TH), - BW_NO_LIMIT, CORES(BT_GNSS), NO_CDB), - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9270_name, DEVICE(0x2526), - MAC_TYPE(TH), RF_TYPE(TH), - BW_LIMIT(80), CORES(BT_GNSS), NO_CDB), - - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9162_160_name, DEVICE(0x271B), - MAC_TYPE(TH), RF_TYPE(TH1), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9162_name, DEVICE(0x271B), - MAC_TYPE(TH), RF_TYPE(TH1), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_160_name, DEVICE(0x2526), - MAC_TYPE(TH), RF_TYPE(TH), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9260_2ac_cfg, iwl9260_name, DEVICE(0x2526), - MAC_TYPE(TH), RF_TYPE(TH), - BW_LIMIT(80), CORES(BT), NO_CDB), + IWL_DEV_INFO(0x7E40, 0x1671, iwl_cfg_ma, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x7E40, 0x1672, iwl_cfg_ma, iwl_ax211_killer_1675i_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9462_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_2ac_cfg_soc, iwl9560_name), + + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9270_160_name), + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT_GNSS, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9270_name), + + _IWL_DEV_INFO(0x271B, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9162_160_name), + _IWL_DEV_INFO(0x271B, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9162_name), + + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9260_160_name), + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9260_2ac_cfg, iwl9260_name), /* Qu with Jf */ /* Qu B step */ - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name, - MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF1), RF_ID(JF1), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9461_name, - MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF1), RF_ID(JF1), - BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name, - MAC_TYPE(QU), MAC_STEP(B), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9462_name, - MAC_TYPE(QU), MAC_STEP(B), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name, - MAC_TYPE(QU), MAC_STEP(B), - RF_TYPE(JF2), RF_ID(JF), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9560_name, - MAC_TYPE(QU), MAC_STEP(B), - RF_TYPE(JF2), RF_ID(JF), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name, - SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2), - RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name, - SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(B), RF_TYPE(JF2), - RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9462_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9560_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name), + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name), /* Qu C step */ - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name, - MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(JF1), RF_ID(JF1), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9461_name, - MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(JF1), RF_ID(JF1), - BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name, - MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9462_name, - MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(JF1), RF_ID(JF1_DIV), - BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name, MAC_TYPE(QU), - MAC_STEP(C), RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9560_name, MAC_TYPE(QU), - MAC_STEP(C), RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), - NO_CDB), - - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name, - SUBDEV(0x1551), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2), - RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name, - SUBDEV(0x1552), MAC_TYPE(QU), MAC_STEP(C), RF_TYPE(JF2), - RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9462_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9560_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name), + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name), /* QuZ */ - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name, MAC_TYPE(QUZ), - RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9461_name, MAC_TYPE(QUZ), - RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name, MAC_TYPE(QUZ), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9462_name, MAC_TYPE(QUZ), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name, MAC_TYPE(QUZ), - RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_name, MAC_TYPE(QUZ), - RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), - - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name, - SUBDEV(0x1551), MAC_TYPE(QUZ), RF_TYPE(JF2), RF_ID(JF), - BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name, - SUBDEV(0x1552), MAC_TYPE(QUZ), RF_TYPE(JF2), RF_ID(JF), - BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9462_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9560_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name), + _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name), /* Qu with Hr */ /* Qu B step */ - IWL_DEV_INFO(iwl_qu_b0_hr1_b0, iwl_ax101_name, MAC_TYPE(QU), - MAC_STEP(B), RF_TYPE(HR1), NO_CDB), - IWL_DEV_INFO(iwl_qu_b0_hr_b0, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(B), - RF_TYPE(HR2), BW_LIMIT(80), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_qu_b0_hr1_b0, iwl_ax101_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_qu_b0_hr_b0, iwl_ax203_name), /* Qu C step */ - IWL_DEV_INFO(iwl_qu_c0_hr1_b0, iwl_ax101_name, MAC_TYPE(QU), - MAC_STEP(C), RF_TYPE(HR1), NO_CDB), - IWL_DEV_INFO(iwl_qu_c0_hr_b0, iwl_ax203_name, MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(HR2), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_qu_c0_hr_b0, iwl_ax201_name, MAC_TYPE(QU), MAC_STEP(C), - RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_qu_c0_hr1_b0, iwl_ax101_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_qu_c0_hr_b0, iwl_ax203_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_qu_c0_hr_b0, iwl_ax201_name), /* QuZ */ - IWL_DEV_INFO(iwl_quz_a0_hr1_b0, iwl_ax101_name, MAC_TYPE(QUZ), - RF_TYPE(HR1), NO_CDB), - IWL_DEV_INFO(iwl_cfg_quz_a0_hr_b0, iwl_ax203_name, MAC_TYPE(QUZ), - MAC_STEP(B), RF_TYPE(HR2), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_cfg_quz_a0_hr_b0, iwl_ax201_name, MAC_TYPE(QUZ), - MAC_STEP(B), RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_quz_a0_hr1_b0, iwl_ax101_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, SILICON_B_STEP, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_quz_a0_hr_b0, iwl_ax203_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_QUZ, SILICON_B_STEP, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_quz_a0_hr_b0, iwl_ax201_name), /* Ma */ - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax201_name, MAC_TYPE(MA), RF_TYPE(HR2), - NO_CDB), - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax211_name, MAC_TYPE(MA), RF_TYPE(GF)), - IWL_DEV_INFO(iwl_cfg_ma, iwl_ax231_name, MAC_TYPE(MA), RF_TYPE(FM), - NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_ma, iwl_ax201_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_ma, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_ma, iwl_ax231_name), /* So with Hr */ - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax203_name, MAC_TYPE(SO), - RF_TYPE(HR2), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax101_name, MAC_TYPE(SO), - RF_TYPE(HR1), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SO), - RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax203_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax101_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax201_name), /* So-F with Hr */ - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax203_name, MAC_TYPE(SOF), - RF_TYPE(HR2), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax101_name, MAC_TYPE(SOF), - RF_TYPE(HR1), BW_LIMIT(80), NO_CDB), - IWL_DEV_INFO(iwl_cfg_so_a0_hr_a0, iwl_ax201_name, MAC_TYPE(SOF), - RF_TYPE(HR2), BW_NO_LIMIT, NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax203_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY, IWL_CFG_ANY, + 80, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax101_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_so_a0_hr_a0, iwl_ax201_name), /* So-F with Gf */ - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name, MAC_TYPE(SOF), - RF_TYPE(GF), BW_NO_LIMIT, NO_CDB), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name, MAC_TYPE(SOF), - RF_TYPE(GF), BW_NO_LIMIT, CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_CDB, + iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name), /* SoF with JF2 */ - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name, MAC_TYPE(SOF), - RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_name, MAC_TYPE(SOF), - RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9560_name), /* SoF with JF */ - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name, MAC_TYPE(SOF), - RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name, MAC_TYPE(SOF), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_name, MAC_TYPE(SOF), - RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_name, MAC_TYPE(SOF), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9462_name), /* So with GF */ - IWL_DEV_INFO(iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name, MAC_TYPE(SO), - RF_TYPE(GF), BW_NO_LIMIT, NO_CDB), - IWL_DEV_INFO(iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name, MAC_TYPE(SO), - RF_TYPE(GF), BW_NO_LIMIT, CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_CDB, + iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_name), /* So with JF2 */ - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name, MAC_TYPE(SO), - RF_TYPE(JF2), RF_ID(JF), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9560_name, MAC_TYPE(SO), - RF_TYPE(JF2), RF_ID(JF), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9560_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9560_name), /* So with JF */ - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name, MAC_TYPE(SO), - RF_TYPE(JF1), RF_ID(JF1), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name, MAC_TYPE(SO), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_NO_LIMIT, CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9461_name, MAC_TYPE(SO), - RF_TYPE(JF1), RF_ID(JF1), BW_LIMIT(80), CORES(BT), NO_CDB), - IWL_DEV_INFO(iwlax210_2ax_cfg_so_jf_b0, iwl9462_name, MAC_TYPE(SO), - RF_TYPE(JF1), RF_ID(JF1_DIV), BW_LIMIT(80), CORES(BT), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9461_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9462_160_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9461_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_ANY, + 80, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, + iwlax210_2ax_cfg_so_jf_b0, iwl9462_name), #endif /* CONFIG_IWLMVM */ #if IS_ENABLED(CONFIG_IWLMLD) /* Bz */ - IWL_DEV_INFO(iwl_cfg_bz, iwl_ax201_name, MAC_TYPE(BZ), RF_TYPE(HR2)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_ax211_name, MAC_TYPE(BZ), RF_TYPE(GF)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_fm_name, MAC_TYPE(BZ), RF_TYPE(FM)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_wh_name, MAC_TYPE(BZ), RF_TYPE(WH)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_ax201_name, MAC_TYPE(BZ_W), RF_TYPE(HR2)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_ax211_name, MAC_TYPE(BZ_W), RF_TYPE(GF)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_fm_name, MAC_TYPE(BZ_W), RF_TYPE(FM)), - - IWL_DEV_INFO(iwl_cfg_bz, iwl_wh_name, MAC_TYPE(BZ_W), RF_TYPE(WH)), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_ax201_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_ax211_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_fm_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_wh_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_ax201_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_ax211_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_fm_name), + + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BZ_W, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_bz, iwl_wh_name), /* Ga (Gl) */ - IWL_DEV_INFO(iwl_cfg_gl, iwl_gl_name, MAC_TYPE(GL), RF_TYPE(FM), - BW_NO_LIMIT, NO_CDB), - IWL_DEV_INFO(iwl_cfg_gl, iwl_mtp_name, MAC_TYPE(GL), RF_TYPE(FM), - BW_LIMIT(160), NO_CDB), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_gl, iwl_gl_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_GL, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + 160, IWL_CFG_ANY, IWL_CFG_NO_CDB, + iwl_cfg_gl, iwl_mtp_name), /* Sc */ - IWL_DEV_INFO(iwl_cfg_sc, iwl_ax211_name, MAC_TYPE(SC), RF_TYPE(GF)), - IWL_DEV_INFO(iwl_cfg_sc, iwl_fm_name, MAC_TYPE(SC), RF_TYPE(FM)), - IWL_DEV_INFO(iwl_cfg_sc, iwl_wh_name, MAC_TYPE(SC), RF_TYPE(WH), - BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_sc, iwl_sp_name, MAC_TYPE(SC), RF_TYPE(WH), - BW_LIMIT(160)), - IWL_DEV_INFO(iwl_cfg_sc2, iwl_ax211_name, MAC_TYPE(SC2), RF_TYPE(GF)), - IWL_DEV_INFO(iwl_cfg_sc2, iwl_fm_name, MAC_TYPE(SC2), RF_TYPE(FM)), - IWL_DEV_INFO(iwl_cfg_sc2, iwl_wh_name, MAC_TYPE(SC2), RF_TYPE(WH), - BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_sc2, iwl_sp_name, MAC_TYPE(SC2), RF_TYPE(WH), - BW_LIMIT(160)), - IWL_DEV_INFO(iwl_cfg_sc2f, iwl_ax211_name, MAC_TYPE(SC2F), RF_TYPE(GF)), - IWL_DEV_INFO(iwl_cfg_sc2f, iwl_fm_name, MAC_TYPE(SC2F), RF_TYPE(FM)), - IWL_DEV_INFO(iwl_cfg_sc2f, iwl_wh_name, MAC_TYPE(SC2F), RF_TYPE(WH), - BW_NO_LIMIT), - IWL_DEV_INFO(iwl_cfg_sc2f, iwl_sp_name, MAC_TYPE(SC2F), RF_TYPE(WH), - BW_LIMIT(160)), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc, iwl_fm_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc, iwl_wh_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + 160, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc, iwl_sp_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2, iwl_fm_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2, iwl_wh_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + 160, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2, iwl_sp_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2f, iwl_ax211_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_FM, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2f, iwl_fm_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_NO_LIM, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2f, iwl_wh_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SC2F, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_WH, IWL_CFG_ANY, IWL_CFG_ANY, + 160, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_sc2f, iwl_sp_name), /* Dr */ - IWL_DEV_INFO(iwl_cfg_dr, iwl_dr_name, MAC_TYPE(DR)), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_DR, IWL_CFG_ANY, + IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_dr, iwl_dr_name), /* Br */ - IWL_DEV_INFO(iwl_cfg_br, iwl_br_name, MAC_TYPE(BR)), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_BR, IWL_CFG_ANY, + IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_BW_ANY, IWL_CFG_ANY, IWL_CFG_ANY, + iwl_cfg_br, iwl_br_name), #endif /* CONFIG_IWLMLD */ }; EXPORT_SYMBOL_IF_IWLWIFI_KUNIT(iwl_dev_info_table); -- 2.50.1