From 7a52db70c8c5f4e2f6cf404b6cac10beae43f2bd Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 19 Sep 2024 00:57:14 +0200 Subject: [PATCH] arm64: dts: qcom: qdu1000: Affirm IDR0.CCTW on apps_smmu On RPMh-based SoCs, the APPS SMMU advertizes support for cache-coherent pagetable walk via the IDR0 register. This however is not respected by the arm-smmu driver unless dma-coherent is set. Mark the node as dma-coherent to ensure this (and other) implementations take this coherency into account. Signed-off-by: Konrad Dybcio Tested-by: Steev Klimaszewski # Thinkpad X13s (sc8280xp) Tested-by: Neil Armstrong # on sdm845-rb3 Link: https://lore.kernel.org/r/20240919-topic-apps_smmu_coherent-v1-1-5b3a8662403d@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 642ca8f0236b..1dd760e97794 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1412,6 +1412,7 @@ , , ; + dma-coherent; }; intc: interrupt-controller@17200000 { -- 2.50.1