From 76b7be63d9f33e8f319e480c50d3e53460927add Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Tue, 18 Feb 2025 22:58:47 +0200 Subject: [PATCH] drm/i915/dsb: Allow DSB based updates without planes MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We don't actually need any planes to get updated in order to perform the commit on the DSB. Allow DSB based updates even when we don't touch planes. The main benefit here is that pure LUT updates will now go through the DSB path and therefore we don't have to do vblank evasion/etc. on the CPU. I think the reason I had this excluded was that I was originally contemplating using frame/flip timestamps as a way to complete the commits. But I had to scrap that idea when it turned out that those timestamp get corrupted when DSB is poking at random registers. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250218205850.1422-2-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index ecc39ffd8dd0..4843ad19899e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7175,7 +7175,6 @@ static void intel_atomic_dsb_prepare(struct intel_atomic_state *state, /* FIXME deal with everything */ new_crtc_state->use_dsb = - new_crtc_state->update_planes && !new_crtc_state->do_async_flip && (DISPLAY_VER(display) >= 20 || !new_crtc_state->has_psr) && !new_crtc_state->scaler_state.scaler_users && -- 2.50.1