From 74e3d3aee8471aaad174d68ae9733a0b88e36d58 Mon Sep 17 00:00:00 2001 From: Tim Chen Date: Thu, 21 Dec 2017 20:21:49 -0500 Subject: [PATCH] x86/idle: Disable IBRS entering idle and enable it on wakeup Clear IBRS on idle entry and set it on idle exit into kernel on mwait. Orabug: 27344012 CVE: CVE-2017-5715 Signed-off-by: Tim Chen Signed-off-by: Konrad Rzeszutek Wilk [Backport: We don't have b466bdb614823 "x86/asm/delay: Introduce an MWAITX-based delay with a configurable timer" hence the change to delay_mwaitx is not needed] Reviewed-by: John Haxby Signed-off-by: Kirtikar Kashyap --- arch/x86/include/asm/mwait.h | 8 ++++++++ arch/x86/kernel/process.c | 13 +++++++++++-- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h index 653dfa7662e1..c4b6a15065d2 100644 --- a/arch/x86/include/asm/mwait.h +++ b/arch/x86/include/asm/mwait.h @@ -2,6 +2,8 @@ #define _ASM_X86_MWAIT_H #include +#include +#include #define MWAIT_SUBSTATE_MASK 0xf #define MWAIT_CSTATE_MASK 0xf @@ -57,9 +59,15 @@ static inline void mwait_idle_with_hints(unsigned long eax, unsigned long ecx) mb(); } + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + native_wrmsrl(MSR_IA32_SPEC_CTRL, 0); + __monitor((void *)¤t_thread_info()->flags, 0, 0); if (!need_resched()) __mwait(eax, ecx); + + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + native_wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS); } current_clr_polling(); } diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 57c24319fa53..d8b0473ca0cc 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -459,11 +459,20 @@ static __cpuidle void mwait_idle(void) smp_mb(); /* quirk */ } + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + native_wrmsrl(MSR_IA32_SPEC_CTRL, 0); + __monitor((void *)¤t_thread_info()->flags, 0, 0); - if (!need_resched()) + if (!need_resched()) { __sti_mwait(0, 0); - else + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + native_wrmsrl(MSR_IA32_SPEC_CTRL, + FEATURE_ENABLE_IBRS); + } else { + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) + native_wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS); local_irq_enable(); + } trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); } else { local_irq_enable(); -- 2.50.1