From 66d83a42f2a3f545c347a9612e9af39cc3804e9d Mon Sep 17 00:00:00 2001 From: Caleb Connolly Date: Mon, 24 Jun 2024 14:08:36 +0200 Subject: [PATCH] arm64: dts: qcom: sm6115: add resets for sdhc_1 These are documented and supported everywhere, but not described in DT. Add them. Signed-off-by: Caleb Connolly Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240624120849.2550621-2-caleb.connolly@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 86ac6af2ef0f..ac5f071a8db3 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1088,6 +1088,8 @@ <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "iface", "core", "xo", "ice"; + resets = <&gcc GCC_SDCC1_BCR>; + power-domains = <&rpmpd SM6115_VDDCX>; operating-points-v2 = <&sdhc1_opp_table>; interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG -- 2.50.1