From 65dc0b7745abcd24ea7a83b97b17ff11e0471e19 Mon Sep 17 00:00:00 2001 From: Matt Sealey Date: Wed, 5 Dec 2018 11:14:23 +1100 Subject: [PATCH] lib/lzo: enable 64-bit CTZ on Arm ARMv6 Thumb state introduced an RBIT instruction which, combined with CLZ as present in ARMv5, introduces an extremely fast path for counting trailing zeroes. Enable the use of the GCC builtin for this on ARMv6+ with CONFIG_THUMB2_KERNEL to ensure we get the 'new' instruction usage. We do not bother enabling LZO_USE_CTZ64 support for ARMv5 as the builtin code path does the same thing as the LZO_USE_CTZ32 code, only with more register pressure. Link: http://lkml.kernel.org/r/20181127161913.23863-4-dave.rodgman@arm.com Signed-off-by: Matt Sealey Signed-off-by: Dave Rodgman Cc: David S. Miller Cc: Greg Kroah-Hartman Cc: Herbert Xu Cc: Markus F.X.J. Oberhumer Cc: Minchan Kim Cc: Nitin Gupta Cc: Richard Purdie Cc: Sergey Senozhatsky Cc: Sonny Rao Signed-off-by: Andrew Morton Signed-off-by: Stephen Rothwell --- lib/lzo/lzodefs.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/lib/lzo/lzodefs.h b/lib/lzo/lzodefs.h index e1b3cf6459a9..c0193f726db0 100644 --- a/lib/lzo/lzodefs.h +++ b/lib/lzo/lzodefs.h @@ -33,9 +33,14 @@ #define LZO_USE_CTZ32 1 #elif defined(CONFIG_X86) || defined(CONFIG_PPC) #define LZO_USE_CTZ32 1 -#elif defined(CONFIG_ARM) && (__LINUX_ARM_ARCH__ >= 5) +#elif defined(CONFIG_ARM) +#if (__LINUX_ARM_ARCH__ >= 5) #define LZO_USE_CTZ32 1 #endif +#if (__LINUX_ARM_ARCH__ >= 6) && defined(CONFIG_THUMB2_KERNEL) +#define LZO_USE_CTZ64 1 +#endif +#endif #define M1_MAX_OFFSET 0x0400 #define M2_MAX_OFFSET 0x0800 -- 2.50.1