From 540264746d83b645b32e6a67367489d8e2c536f9 Mon Sep 17 00:00:00 2001 From: Ladislav Michl Date: Mon, 31 Jul 2023 11:33:24 +0200 Subject: [PATCH] usb: dwc3: dwc3-octeon: Dump control register on clock init failure MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It might be interesting to know control register value in case clock fails to enable. Signed-off-by: Ladislav Michl Reviewed-by: Philippe Mathieu-Daudé Acked-by: Thinh Nguyen Link: https://lore.kernel.org/r/ZMd/5OX9szEMnhQH@lenoch Signed-off-by: Greg Kroah-Hartman --- drivers/usb/dwc3/dwc3-octeon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-octeon.c b/drivers/usb/dwc3/dwc3-octeon.c index 330bcb59cc95..d578110f7afb 100644 --- a/drivers/usb/dwc3/dwc3-octeon.c +++ b/drivers/usb/dwc3/dwc3-octeon.c @@ -299,8 +299,8 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon, val = dwc3_octeon_readq(uctl_ctl_reg); if ((div != FIELD_GET(USBDRD_UCTL_CTL_H_CLKDIV_SEL, val)) || (!(FIELD_GET(USBDRD_UCTL_CTL_H_CLK_EN, val)))) { - dev_err(dev, "dwc3 controller clock init failure.\n"); - return -EINVAL; + dev_err(dev, "clock init failure (UCTL_CTL=%016llx)\n", val); + return -EINVAL; } /* Step 4c: Deassert the controller clock divider reset. */ -- 2.50.1