From 524ba3abe726fd7207f1d187429f7ce552d6758e Mon Sep 17 00:00:00 2001 From: Manikanta Mylavarapu Date: Fri, 3 Jan 2025 12:07:07 +0530 Subject: [PATCH] arm64: dts: qcom: ipq5424: add spi nodes Serial engines 4 and 5 on the IPQ5424 support SPI. Serial engine 4 is exclusively dedicated to SPI, whereas serial engine 5 is firmware based and supports SPI, I2C, and UART. The SPI instance operates on serial engine 4, designated as spi0, and on serial engine 5, designated as spi1. Add both the spi0 and spi1 nodes. Signed-off-by: Manikanta Mylavarapu Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20250103063708.3256467-2-quic_mmanikan@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/ipq5424.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi index 269cbee1bc54..70e5d1d80271 100644 --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi @@ -201,6 +201,28 @@ clock-names = "se"; interrupts = ; }; + + spi0: spi@1a90000 { + compatible = "qcom,geni-spi"; + reg = <0 0x01a90000 0 0x4000>; + clocks = <&gcc GCC_QUPV3_SPI0_CLK>; + clock-names = "se"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@1a94000 { + compatible = "qcom,geni-spi"; + reg = <0 0x01a94000 0 0x4000>; + clocks = <&gcc GCC_QUPV3_SPI1_CLK>; + clock-names = "se"; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; sdhc: mmc@7804000 { -- 2.50.1