From 42b2ac9f1bfee9401adabde61e24082dd88b3d3e Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Thu, 3 Apr 2025 21:59:31 -0500 Subject: [PATCH] arm64: dts: imx: Drop redundant CPU "clock-latency" The "clock-latency" property is part of the deprecated opp-v1 binding and is redundant if the opp-v2 table has equal or larger values in any "clock-latency-ns". The OPP tables have values of 150000, so it can be removed. Signed-off-by: Rob Herring (Arm) Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 4 ---- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 4 ---- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 ---- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 4 ---- 4 files changed, 16 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 4de3bf22902b..cfebaa01217e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -62,7 +62,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MM_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -83,7 +82,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x1>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MM_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -102,7 +100,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x2>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MM_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -121,7 +118,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x3>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MM_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index a5f9cfb46e5d..848ba5e46ee6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -62,7 +62,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; - clock-latency = <61036>; clocks = <&clk IMX8MN_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -83,7 +82,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x1>; - clock-latency = <61036>; clocks = <&clk IMX8MN_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -102,7 +100,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x2>; - clock-latency = <61036>; clocks = <&clk IMX8MN_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -121,7 +118,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x3>; - clock-latency = <61036>; clocks = <&clk IMX8MN_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index c017eb98c49d..75a1d02d39da 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -66,7 +66,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; - clock-latency = <61036>; clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -87,7 +86,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x1>; - clock-latency = <61036>; clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -106,7 +104,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x2>; - clock-latency = <61036>; clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -125,7 +122,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x3>; - clock-latency = <61036>; clocks = <&clk IMX8MP_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 387b3e227cfc..07925b387677 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -106,7 +106,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MQ_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -126,7 +125,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x1>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MQ_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -144,7 +142,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x2>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MQ_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; @@ -162,7 +159,6 @@ device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x3>; - clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clk IMX8MQ_CLK_ARM>; enable-method = "psci"; i-cache-size = <0x8000>; -- 2.50.1