From 386e0ac929f64de4c9df33e247d5acd514cd1c58 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Mon, 24 Jun 2024 14:32:37 +0100 Subject: [PATCH] dt-bindings: clock: Add x1e80100 LPASSCC reset controller X1E80100 LPASS (Low Power Audio Subsystem) clock controller provides reset support when it is under the control of Q6DSP. Add x1e80100 compatible to the existing sc8280xp as these reset controllers have same reg layout and compatible. Signed-off-by: Srinivas Kandagatla Reviewed-by: Krzysztof Kozlowski Acked-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240624-x1e-swr-reset-v2-2-8bc677fcfa64@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml index c33bf4c5af7d..273d66e245c5 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml @@ -25,6 +25,10 @@ properties: - items: - const: qcom,x1e80100-lpassaudiocc - const: qcom,sc8280xp-lpassaudiocc + - items: + - const: qcom,x1e80100-lpasscc + - const: qcom,sc8280xp-lpasscc + reg: maxItems: 1 -- 2.50.1