From 27554e2bef4d70841c4d20d96c673de51edb353c Mon Sep 17 00:00:00 2001 From: Tingguo Cheng Date: Mon, 2 Dec 2024 17:37:22 +0800 Subject: [PATCH] arm64: dts: qcom: qcs615: Adds SPMI support Add the SPMI bus Arbiter node for the PMIC on QCS615 platforms. Reviewed-by: Konrad Dybcio Signed-off-by: Tingguo Cheng Link: https://lore.kernel.org/r/20241202-adds-spmi-pmic-peripherals-for-qcs615-v6-1-bdd306b4940d@quicinc.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index 45a4d9a76163..fc69abff7127 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -2946,6 +2946,29 @@ ; }; + spmi_bus: spmi@c440000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x0 0x0c440000 0x0 0x1100>, + <0x0 0x0c600000 0x0 0x2000000>, + <0x0 0x0e600000 0x0 0x100000>, + <0x0 0x0e700000 0x0 0xa0000>, + <0x0 0x0c40a000 0x0 0x26000>; + reg-names = "core", + "chnls", + "obsrvr", + "intr", + "cnfg"; + interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "periph_irq"; + interrupt-controller; + #interrupt-cells = <4>; + #address-cells = <2>; + #size-cells = <0>; + cell-index = <0>; + qcom,channel = <0>; + qcom,ee = <0>; + }; + intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */ -- 2.50.1