From 22b246e3fc5eb450fffad1eb322e08e3af0e6e3d Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Wed, 23 Jul 2025 19:58:56 +0300 Subject: [PATCH] scsi: ufs: ufs-pci: Remove control of UIC Completion interrupt for Intel MTL Now that UFS core enables the UIC Completion interrupt only when needed, Intel MTL driver no longer needs to control the interrupt itself. So remove the associated code. Signed-off-by: Adrian Hunter Link: https://lore.kernel.org/r/20250723165856.145750-9-adrian.hunter@intel.com Reviewed-by: Bart Van Assche Signed-off-by: Martin K. Petersen --- drivers/ufs/host/ufshcd-pci.c | 27 --------------------------- 1 file changed, 27 deletions(-) diff --git a/drivers/ufs/host/ufshcd-pci.c b/drivers/ufs/host/ufshcd-pci.c index b29ec1904482a..b39239f641f21 100644 --- a/drivers/ufs/host/ufshcd-pci.c +++ b/drivers/ufs/host/ufshcd-pci.c @@ -211,32 +211,6 @@ out: return ret; } -static void ufs_intel_ctrl_uic_compl(struct ufs_hba *hba, bool enable) -{ - u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE); - - if (enable) - set |= UIC_COMMAND_COMPL; - else - set &= ~UIC_COMMAND_COMPL; - ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE); -} - -static void ufs_intel_mtl_h8_notify(struct ufs_hba *hba, - enum uic_cmd_dme cmd, - enum ufs_notify_change_status status) -{ - /* - * Disable UIC COMPL INTR to prevent access to UFSHCI after - * checking HCS.UPMCRS - */ - if (status == PRE_CHANGE && cmd == UIC_CMD_DME_HIBER_ENTER) - ufs_intel_ctrl_uic_compl(hba, false); - - if (status == POST_CHANGE && cmd == UIC_CMD_DME_HIBER_EXIT) - ufs_intel_ctrl_uic_compl(hba, true); -} - #define INTEL_ACTIVELTR 0x804 #define INTEL_IDLELTR 0x808 @@ -549,7 +523,6 @@ static struct ufs_hba_variant_ops ufs_intel_mtl_hba_vops = { .init = ufs_intel_mtl_init, .exit = ufs_intel_common_exit, .hce_enable_notify = ufs_intel_hce_enable_notify, - .hibern8_notify = ufs_intel_mtl_h8_notify, .link_startup_notify = ufs_intel_link_startup_notify, .resume = ufs_intel_resume, .device_reset = ufs_intel_device_reset, -- 2.51.0