From 0dbc07985b15940ff3f19529c1f6fd734d535971 Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Thu, 17 May 2012 15:34:34 +0200 Subject: [PATCH] PPC: e500: dt: create pci node dynamically Signed-off-by: Alexander Graf --- hw/ppce500_mpc8544ds.c | 50 +++++++++++++++++++++++++++++++++++++++++ pc-bios/mpc8544ds.dtb | Bin 1810 -> 72 bytes pc-bios/mpc8544ds.dts | 46 ------------------------------------- 3 files changed, 50 insertions(+), 46 deletions(-) diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index 03938b2e3b..15df51571c 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -62,6 +62,27 @@ struct boot_info uint32_t entry; }; +static void pci_map_create(void *fdt, uint32_t *pci_map, uint32_t mpic) +{ + int i; + const uint32_t tmp[] = { + /* IDSEL 0x11 J17 Slot 1 */ + 0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1, + 0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1, + 0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1, + 0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, + + /* IDSEL 0x12 J16 Slot 2 */ + 0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1, + 0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1, + 0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1, + 0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, + }; + for (i = 0; i < (7 * 8); i++) { + pci_map[i] = cpu_to_be32(tmp[i]); + } +} + static int mpc8544_load_device_tree(CPUPPCState *env, target_phys_addr_t addr, uint32_t ramsize, @@ -86,6 +107,11 @@ static int mpc8544_load_device_tree(CPUPPCState *env, char mpic[128]; uint32_t mpic_ph; char gutil[128]; + char pci[128]; + uint32_t pci_map[7 * 8]; + uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0, + 0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000, + 0x0, 0x10000 }; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); if (!filename) { @@ -256,6 +282,30 @@ static int mpc8544_load_device_tree(CPUPPCState *env, MPC8544_CCSRBAR_BASE, 0x1000); qemu_devtree_setprop(fdt, gutil, "fsl,has-rstcr", NULL, 0); + snprintf(pci, sizeof(pci), "/pci@%x", MPC8544_PCI_REGS_BASE); + qemu_devtree_add_subnode(fdt, pci); + qemu_devtree_setprop_cell(fdt, pci, "cell-index", 0); + qemu_devtree_setprop_string(fdt, pci, "compatible", "fsl,mpc8540-pci"); + qemu_devtree_setprop_string(fdt, pci, "device_type", "pci"); + qemu_devtree_setprop_cells(fdt, pci, "interrupt-map-mask", 0xf800, 0x0, + 0x0, 0x7); + pci_map_create(fdt, pci_map, qemu_devtree_get_phandle(fdt, mpic)); + qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, sizeof(pci_map)); + qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic); + qemu_devtree_setprop_cells(fdt, pci, "interrupts", 24, 2); + qemu_devtree_setprop_cells(fdt, pci, "bus-range", 0, 255); + for (i = 0; i < 12; i++) { + pci_ranges[i] = cpu_to_be32(pci_ranges[i]); + } + qemu_devtree_setprop(fdt, pci, "ranges", pci_ranges, sizeof(pci_ranges)); + qemu_devtree_setprop_cells(fdt, pci, "reg", MPC8544_PCI_REGS_BASE, + 0x1000); + qemu_devtree_setprop_cell(fdt, pci, "clock-frequency", 66666666); + qemu_devtree_setprop_cell(fdt, pci, "#interrupt-cells", 1); + qemu_devtree_setprop_cell(fdt, pci, "#size-cells", 2); + qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3); + qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci); + ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr); if (ret < 0) { goto out; diff --git a/pc-bios/mpc8544ds.dtb b/pc-bios/mpc8544ds.dtb index 25d92f681dec184530af63e2d2cea61cb4cccd04..90ef5c00243b04f4aa3f812b89d5b37c63be09f2 100644 GIT binary patch literal 72 rcmcb>`|m9S1A_+x1A_&W)?i>@5M*Fr5MV$6WHt;iLK#d93=EtA1NZ~> literal 1810 zcmbtUJ!=#}7=F$qB*702_T?QMM1<4)ABOCXHCc^BBM_ z!1X5Pdm5a4zrr*^hocQK#XkKbraS+Q$tcm^=C=4^h>7%~F*nYU6!E@l)ad5mrppO? z8}3X`j7zgo7?~$VxhZ?yDtkUJp2dCL=mVp@ZT4=Yi$SK7x>8zIN?O0;vz)v;y#uQ^ zrp8@?WK>svi+p^KlgLi?h4enu;^y<`n$NH`_l8^8$dx8WD8`EYNgF(EKLTG}vOt_M zZMnXmfoD-p;vVpGcv`w3bG~gI_|NHLzF;$_Yvpsc zl*PM1-*{iHwRY)y0QW2Oh!fsp64IOSk*iEk3a zN1nURbHuoRj3;qtT&-eUSeegqtO1?H)8EqByGvhwtNsm0;s3W_gi5iV4Tq()HW5;5 zi*>6W$#5RZhf2tM)sc}9#nfb#8fb|!%SY0plp_pkn;ew#K`nD}1V%_yK9q+Lx)76w zO68R-%i2`-; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - cell-index = <0>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 J16 Slot 2 */ - - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - }; }; -- 2.50.1