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MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB
authorMarkos Chandras <markos.chandras@imgtec.com>
Thu, 9 Jul 2015 09:40:50 +0000 (10:40 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 26 Aug 2015 13:23:17 +0000 (15:23 +0200)
commitc982c6d6c48b48159db481581cadbb8773219677
tree78fdd17d2a30c16fb6a09cf709f01d22e2104c90tree
parent6f50c83529ac1fa3444ff4be5f5b0bf3d76db678commit | diff
MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB

We are so early in the boot process where we really don't want to
stall and wait for CP0 FTLB related changes become visible so just drop
the cp0 hazard barrier.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10649/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cpu-probe.c diff | blob | history
XArray, radix tree and IDR