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iommu/vt-d: Change PASID support to bit 40 of Extended Capability Register
authorDavid Woodhouse <David.Woodhouse@intel.com>
Tue, 9 Jun 2015 14:06:55 +0000 (15:06 +0100)
committerDavid Woodhouse <David.Woodhouse@intel.com>
Tue, 9 Jun 2015 14:06:55 +0000 (15:06 +0100)
commitbd00c606a6f60ca015a62bdbf671eadd48a4ca82
treeb1ff5d170c39a242ff3d260cb342b1f644b27b11tree
parent4ed6a540fab8ea4388c1703b73ecfed68a2009d1commit | diff
iommu/vt-d: Change PASID support to bit 40 of Extended Capability Register

The existing hardware implementations with PASID support advertised in
bit 28? Forget them. They do not exist. Bit 28 means nothing. When we
have something that works, it'll use bit 40. Do not attempt to infer
anything meaningful from bit 28.

This will be reflected in an updated VT-d spec in the extremely near
future.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
include/linux/intel-iommu.h diff | blob | history
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