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1 // SPDX-License-Identifier: GPL-2.0+

4 #include <drm/drmP.h>

6 #include <dt-bindings/clock/sun8i-tcon-top.h>

8 #include <linux/bitfield.h>

9 #include <linux/component.h>

10 #include <linux/device.h>

11 #include <linux/module.h>

12 #include <linux/of_device.h>

13 #include <linux/of_graph.h>

14 #include <linux/platform_device.h>

16 #include "sun8i_tcon_top.h"

18 struct sun8i_tcon_top_quirks {

19 bool has_tcon_tv1;

20 bool has_dsi;

21 };

23 static bool sun8i_tcon_top_node_is_tcon_top(struct device_node *node)

24 {

25 return !!of_match_node(sun8i_tcon_top_of_table, node);

26 }

28 int sun8i_tcon_top_set_hdmi_src(struct device *dev, int tcon)

29 {

30 struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);

31 unsigned long flags;

32 u32 val;

34 if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {

35 dev_err(dev, "Device is not TCON TOP!\n");

36 return -EINVAL;

37 }

39 if (tcon < 2 || tcon > 3) {

40 dev_err(dev, "TCON index must be 2 or 3!\n");

41 return -EINVAL;

42 }

44 spin_lock_irqsave(&tcon_top->reg_lock, flags);

46 val = readl(tcon_top->regs + TCON_TOP_GATE_SRC_REG);

47 val &= ~TCON_TOP_HDMI_SRC_MSK;

48 val |= FIELD_PREP(TCON_TOP_HDMI_SRC_MSK, tcon - 1);

49 writel(val, tcon_top->regs + TCON_TOP_GATE_SRC_REG);

51 spin_unlock_irqrestore(&tcon_top->reg_lock, flags);

53 return 0;

54 }

55 EXPORT_SYMBOL(sun8i_tcon_top_set_hdmi_src);

57 int sun8i_tcon_top_de_config(struct device *dev, int mixer, int tcon)

58 {

59 struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);

60 unsigned long flags;

61 u32 reg;

63 if (!sun8i_tcon_top_node_is_tcon_top(dev->of_node)) {

64 dev_err(dev, "Device is not TCON TOP!\n");

65 return -EINVAL;

66 }

68 if (mixer > 1) {

69 dev_err(dev, "Mixer index is too high!\n");

70 return -EINVAL;

71 }

73 if (tcon > 3) {

74 dev_err(dev, "TCON index is too high!\n");

75 return -EINVAL;

76 }

78 spin_lock_irqsave(&tcon_top->reg_lock, flags);

80 reg = readl(tcon_top->regs + TCON_TOP_PORT_SEL_REG);

81 if (mixer == 0) {

82 reg &= ~TCON_TOP_PORT_DE0_MSK;

83 reg |= FIELD_PREP(TCON_TOP_PORT_DE0_MSK, tcon);

84 } else {

85 reg &= ~TCON_TOP_PORT_DE1_MSK;

86 reg |= FIELD_PREP(TCON_TOP_PORT_DE1_MSK, tcon);

87 }

88 writel(reg, tcon_top->regs + TCON_TOP_PORT_SEL_REG);

90 spin_unlock_irqrestore(&tcon_top->reg_lock, flags);

92 return 0;

93 }

94 EXPORT_SYMBOL(sun8i_tcon_top_de_config);

97 static struct clk_hw *sun8i_tcon_top_register_gate(struct device *dev,

98 const char *parent,

99 void __iomem *regs,

100 spinlock_t *lock,

101 u8 bit, int name_index)

102 {

103 const char *clk_name, *parent_name;

104 int ret, index;

105

106 index = of_property_match_string(dev->of_node, "clock-names", parent);

107 if (index < 0)

108 return ERR_PTR(index);

109

110 parent_name = of_clk_get_parent_name(dev->of_node, index);

111

112 ret = of_property_read_string_index(dev->of_node,

113 "clock-output-names", name_index,

114 &clk_name);

115 if (ret)

116 return ERR_PTR(ret);

117

118 return clk_hw_register_gate(dev, clk_name, parent_name,

119 CLK_SET_RATE_PARENT,

120 regs + TCON_TOP_GATE_SRC_REG,

121 bit, 0, lock);

122 };

123

124 static int sun8i_tcon_top_bind(struct device *dev, struct device *master,

125 void *data)

126 {

127 struct platform_device *pdev = to_platform_device(dev);

128 struct clk_hw_onecell_data *clk_data;

129 struct sun8i_tcon_top *tcon_top;

130 const struct sun8i_tcon_top_quirks *quirks;

131 struct resource *res;

132 void __iomem *regs;

133 int ret, i;

134

135 quirks = of_device_get_match_data(&pdev->dev);

136

137 tcon_top = devm_kzalloc(dev, sizeof(*tcon_top), GFP_KERNEL);

138 if (!tcon_top)

139 return -ENOMEM;

140

141 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, CLK_NUM),

142 GFP_KERNEL);

143 if (!clk_data)

144 return -ENOMEM;

145 tcon_top->clk_data = clk_data;

146

147 spin_lock_init(&tcon_top->reg_lock);

148

149 tcon_top->rst = devm_reset_control_get(dev, NULL);

150 if (IS_ERR(tcon_top->rst)) {

151 dev_err(dev, "Couldn't get our reset line\n");

152 return PTR_ERR(tcon_top->rst);

153 }

154

155 tcon_top->bus = devm_clk_get(dev, "bus");

156 if (IS_ERR(tcon_top->bus)) {

157 dev_err(dev, "Couldn't get the bus clock\n");

158 return PTR_ERR(tcon_top->bus);

159 }

160

161 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);

162 regs = devm_ioremap_resource(dev, res);

163 tcon_top->regs = regs;

164 if (IS_ERR(regs))

165 return PTR_ERR(regs);

166

167 ret = reset_control_deassert(tcon_top->rst);

168 if (ret) {

169 dev_err(dev, "Could not deassert ctrl reset control\n");

170 return ret;

171 }

172

173 ret = clk_prepare_enable(tcon_top->bus);

174 if (ret) {

175 dev_err(dev, "Could not enable bus clock\n");

176 goto err_assert_reset;

177 }

178

179 /*

180 * At least on H6, some registers have some bits set by default

181 * which may cause issues. Clear them here.

182 */

183 writel(0, regs + TCON_TOP_PORT_SEL_REG);

184 writel(0, regs + TCON_TOP_GATE_SRC_REG);

185

186 /*

187 * TCON TOP has two muxes, which select parent clock for each TCON TV

188 * channel clock. Parent could be either TCON TV or TVE clock. For now

189 * we leave this fixed to TCON TV, since TVE driver for R40 is not yet

190 * implemented. Once it is, graph needs to be traversed to determine

191 * if TVE is active on each TCON TV. If it is, mux should be switched

192 * to TVE clock parent.

193 */

194 clk_data->hws[CLK_TCON_TOP_TV0] =

195 sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,

196 &tcon_top->reg_lock,

197 TCON_TOP_TCON_TV0_GATE, 0);

198

199 if (quirks->has_tcon_tv1)

200 clk_data->hws[CLK_TCON_TOP_TV1] =

201 sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,

202 &tcon_top->reg_lock,

203 TCON_TOP_TCON_TV1_GATE, 1);

204

205 if (quirks->has_dsi)

206 clk_data->hws[CLK_TCON_TOP_DSI] =

207 sun8i_tcon_top_register_gate(dev, "dsi", regs,

208 &tcon_top->reg_lock,

209 TCON_TOP_TCON_DSI_GATE, 2);

210

211 for (i = 0; i < CLK_NUM; i++)

212 if (IS_ERR(clk_data->hws[i])) {

213 ret = PTR_ERR(clk_data->hws[i]);

214 goto err_unregister_gates;

215 }

216

217 clk_data->num = CLK_NUM;

218

219 ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,

220 clk_data);

221 if (ret)

222 goto err_unregister_gates;

223

224 dev_set_drvdata(dev, tcon_top);

225

226 return 0;

227

228 err_unregister_gates:

229 for (i = 0; i < CLK_NUM; i++)

230 if (clk_data->hws[i])

231 clk_hw_unregister_gate(clk_data->hws[i]);

232 clk_disable_unprepare(tcon_top->bus);

233 err_assert_reset:

234 reset_control_assert(tcon_top->rst);

235

236 return ret;

237 }

238

239 static void sun8i_tcon_top_unbind(struct device *dev, struct device *master,

240 void *data)

241 {

242 struct sun8i_tcon_top *tcon_top = dev_get_drvdata(dev);

243 struct clk_hw_onecell_data *clk_data = tcon_top->clk_data;

244 int i;

245

246 of_clk_del_provider(dev->of_node);

247 for (i = 0; i < CLK_NUM; i++)

248 clk_hw_unregister_gate(clk_data->hws[i]);

249

250 clk_disable_unprepare(tcon_top->bus);

251 reset_control_assert(tcon_top->rst);

252 }

253

254 static const struct component_ops sun8i_tcon_top_ops = {

255 .bind = sun8i_tcon_top_bind,

256 .unbind = sun8i_tcon_top_unbind,

257 };

258

259 static int sun8i_tcon_top_probe(struct platform_device *pdev)

260 {

261 return component_add(&pdev->dev, &sun8i_tcon_top_ops);

262 }

263

264 static int sun8i_tcon_top_remove(struct platform_device *pdev)

265 {

266 component_del(&pdev->dev, &sun8i_tcon_top_ops);

267

268 return 0;

269 }

270

271 static const struct sun8i_tcon_top_quirks sun8i_r40_tcon_top_quirks = {

272 .has_tcon_tv1 = true,

273 .has_dsi = true,

274 };

275

276 static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = {

277 /* Nothing special */

278 };

279

280 /* sun4i_drv uses this list to check if a device node is a TCON TOP */

281 const struct of_device_id sun8i_tcon_top_of_table[] = {

282 {

283 .compatible = "allwinner,sun8i-r40-tcon-top",

284 .data = &sun8i_r40_tcon_top_quirks

285 },

286 {

287 .compatible = "allwinner,sun50i-h6-tcon-top",

288 .data = &sun50i_h6_tcon_top_quirks

289 },

290 { /* sentinel */ }

291 };

292 MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);

293 EXPORT_SYMBOL(sun8i_tcon_top_of_table);

294

295 static struct platform_driver sun8i_tcon_top_platform_driver = {

296 .probe = sun8i_tcon_top_probe,

297 .remove = sun8i_tcon_top_remove,

298 .driver = {

299 .name = "sun8i-tcon-top",

300 .of_match_table = sun8i_tcon_top_of_table,

301 },

302 };

303 module_platform_driver(sun8i_tcon_top_platform_driver);

304

305 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");

306 MODULE_DESCRIPTION("Allwinner R40 TCON TOP driver");

307 MODULE_LICENSE("GPL");