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9 months agorust: qom: change the parent type to an associated type
Paolo Bonzini [Sun, 24 Nov 2024 17:51:34 +0000 (18:51 +0100)]
rust: qom: change the parent type to an associated type

Avoid duplicated code to retrieve the QOM type strings from the
Rust type.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: split ObjectType from ObjectImpl trait
Paolo Bonzini [Thu, 31 Oct 2024 08:56:15 +0000 (09:56 +0100)]
rust: qom: split ObjectType from ObjectImpl trait

Define a separate trait for fields that also applies to classes that are
defined by C code.  This makes it possible to add metadata to core classes,
which has multiple uses:

- it makes it possible to access the parent struct's TYPE_* for types
  that are defined in Rust code, and to avoid repeating it in every subclass

- implementors of ObjectType will be allowed to implement the IsA<> trait and
  therefore to perform typesafe casts from one class to another.

- in the future, an ObjectType could be created with Foo::new() in a type-safe
  manner, without having to pass a TYPE_* constant.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: move bridge for TypeInfo functions out of pl011
Paolo Bonzini [Mon, 28 Oct 2024 09:45:55 +0000 (10:45 +0100)]
rust: qom: move bridge for TypeInfo functions out of pl011

Allow the ObjectImpl trait to expose Rust functions that avoid raw
pointers (though INSTANCE_INIT for example is still unsafe).
ObjectImpl::TYPE_INFO adds thunks around the functions in
ObjectImpl.

While at it, document `TypeInfo`.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agotests/functional: remove pointless with statement
Daniel P. Berrangé [Fri, 29 Nov 2024 17:31:02 +0000 (17:31 +0000)]
tests/functional: remove pointless with statement

The xorriso command directly writes to 'filename', so the surrounding
'with' statement is pointless.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241129173120.761728-5-berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: remove unused system imports
Daniel P. Berrangé [Fri, 29 Nov 2024 17:31:00 +0000 (17:31 +0000)]
tests/functional: remove unused system imports

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241129173120.761728-3-berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: Convert the cubieboard avocado tests
Thomas Huth [Fri, 6 Dec 2024 10:23:54 +0000 (11:23 +0100)]
tests/functional: Convert the cubieboard avocado tests

Straight forward conversion, just the hashsums needed to be
updated to sha256 now.

These were the last tests that used image_pow2ceil_expand in
boot_linux_console.py, so we can remove that function from that
file now, too.

Message-ID: <20241206102358.1186644-5-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: Convert the smdkc210 avocado test
Thomas Huth [Fri, 6 Dec 2024 10:23:53 +0000 (11:23 +0100)]
tests/functional: Convert the smdkc210 avocado test

A straight forward conversion, just the hashsums needed to be
updated to sha256 now.

Message-ID: <20241206102358.1186644-4-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: Convert the emcraft_sf2 avocado test
Thomas Huth [Fri, 6 Dec 2024 10:23:52 +0000 (11:23 +0100)]
tests/functional: Convert the emcraft_sf2 avocado test

A pretty straight-forward conversion of the emcraft_sf2 boot
test to the functional framework.

This was the last test that used file_truncate() in
boot_linux_console.py, so we can remove that function from that
file now, too.

Message-ID: <20241206102358.1186644-3-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: Convert the xlnx_versal_virt avocado test
Thomas Huth [Fri, 6 Dec 2024 10:23:51 +0000 (11:23 +0100)]
tests/functional: Convert the xlnx_versal_virt avocado test

A straight-forward conversion of the xlnx_versal_virt boot
test to the functional framework.

Message-ID: <20241206102358.1186644-2-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agoMAINTAINERS: Cover the tests/functional/test_sh4eb_r2d.py file
Thomas Huth [Wed, 4 Dec 2024 07:11:20 +0000 (08:11 +0100)]
MAINTAINERS: Cover the tests/functional/test_sh4eb_r2d.py file

This file should belong to the R2D machine in the MAINTAINERS file.

Message-ID: <20241204071120.663446-1-thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotests/functional: Bump the timeout of the sh4_tuxrun test
Thomas Huth [Wed, 4 Dec 2024 07:07:57 +0000 (08:07 +0100)]
tests/functional: Bump the timeout of the sh4_tuxrun test

When running "make -j$(nproc) check SPEED=thorough", the sh4_tuxrun
test is timing out for me, and using TIMEOUT_MULTIPLIER I can see
that it clearly takes more than 100 seconds to finish. Thus increase
the timeout setting of this test to avoid the problem.

Message-ID: <20241204070757.663119-1-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: gen17 model
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:51 +0000 (13:27 +0100)]
s390x/cpumodel: gen17 model

This commit introduces the definition of the gen17a/gen17b CPU model.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Message-ID: <20241206122751.189721-16-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: Add PLO-extension facility
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:50 +0000 (13:27 +0100)]
s390x/cpumodel: Add PLO-extension facility

The PLO-extension facility introduces numerous locking related
subfunctions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-15-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: correct PLO feature wording
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:49 +0000 (13:27 +0100)]
s390x/cpumodel: correct PLO feature wording

The PLO functions 0, 4, 8, 12, 16, and 20 use 32-bit registers
values.  The plo-*gr variants use 64-bit instead and, thus, correct
the wording.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-14-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: Add Sequential-Instruction-Fetching facility
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:48 +0000 (13:27 +0100)]
s390x/cpumodel: Add Sequential-Instruction-Fetching facility

The sequential instruction fetching facility provides few guarantees,
for example, to avoid stop machine calls on enabling/disabling kprobes.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-13-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add Ineffective-nonconstrained-transaction facility
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:47 +0000 (13:27 +0100)]
s390x/cpumodel: add Ineffective-nonconstrained-transaction facility

This facility indicates reduced support for noncontrained
transactional-execution.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-12-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add Vector-Packed-Decimal-Enhancement facility 3
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:46 +0000 (13:27 +0100)]
s390x/cpumodel: add Vector-Packed-Decimal-Enhancement facility 3

This facility introduces new capabilities for the signed-pack-decimal
format.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-11-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add Miscellaneous-Instruction-Extensions Facility 4
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:45 +0000 (13:27 +0100)]
s390x/cpumodel: add Miscellaneous-Instruction-Extensions Facility 4

This facility introduces few new instructions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-10-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add Vector Enhancements facility 3
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:44 +0000 (13:27 +0100)]
s390x/cpumodel: add Vector Enhancements facility 3

The Vector Enhancements facility 3 introduces new instructions and
extends support for doubleword/quadword elements.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-9-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add Concurrent-functions facility support
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:43 +0000 (13:27 +0100)]
s390x/cpumodel: add Concurrent-functions facility support

The Concurrent-functions facility introduces the new instruction
Perform Functions with Concurrent Results (PFCR) with few subfunctions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-8-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agolinux-headers: Update to Linux 6.13-rc1
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:42 +0000 (13:27 +0100)]
linux-headers: Update to Linux 6.13-rc1

This linux headers update includes required changes for
the gen17 CPU model.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241206122751.189721-7-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: Add ptff Query Time-Stamp Event (QTSE) support
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:41 +0000 (13:27 +0100)]
s390x/cpumodel: Add ptff Query Time-Stamp Event (QTSE) support

Introduce a new PTFF subfunction to query-stamp events.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-6-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add msa13 subfunctions
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:40 +0000 (13:27 +0100)]
s390x/cpumodel: add msa13 subfunctions

MSA13 introduces query authentication information (QAI) subfunctions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Message-ID: <20241206122751.189721-5-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add msa12 changes
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:39 +0000 (13:27 +0100)]
s390x/cpumodel: add msa12 changes

MSA12 changes the KIMD/KLMD instruction format for SHA3/SHAKE.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Message-ID: <20241206122751.189721-4-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add msa11 subfunctions
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:38 +0000 (13:27 +0100)]
s390x/cpumodel: add msa11 subfunctions

MSA11 introduces new HMAC subfunctions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Message-ID: <20241206122751.189721-3-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agos390x/cpumodel: add msa10 subfunctions
Hendrik Brueckner [Fri, 6 Dec 2024 12:27:37 +0000 (13:27 +0100)]
s390x/cpumodel: add msa10 subfunctions

MSA10 introduces new AES XTS subfunctions.

Signed-off-by: Hendrik Brueckner <brueckner@linux.ibm.com>
Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Message-ID: <20241206122751.189721-2-brueckner@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agodocs: replace 'Edit on GitLab' with 'View page source'
Daniel P. Berrangé [Mon, 9 Dec 2024 16:35:06 +0000 (16:35 +0000)]
docs: replace 'Edit on GitLab' with 'View page source'

QEMU takes contributions via the mailing list, so while you can edit a
file on gitlab and then switch to the terminal to send a patch, the
wording 'Edit on GitLab' strongly suggests we take merge requests.

Switching back to "View page source" is a more agnostic term that does
not imply a particular contribution approach, that we had used in QEMU
before:

  commit 73e6aec6522e1edd63f631c52577b49a39bc234f
  Author: Marc-André Lureau <marcandre.lureau@redhat.com>
  Date:   Tue Mar 23 15:53:28 2021 +0400

    sphinx: adopt kernel readthedoc theme

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20241209163506.2089961-1-berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agohw: add compat machines for 10.0
Cornelia Huck [Tue, 26 Nov 2024 10:30:05 +0000 (11:30 +0100)]
hw: add compat machines for 10.0

Add 10.0 machine types for arm/i440fx/m68k/q35/s390x/spapr.

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20241126103005.3794748-3-cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agohw/i386: define _AS_LATEST() macros for machine types
Daniel P. Berrangé [Tue, 26 Nov 2024 10:30:04 +0000 (11:30 +0100)]
hw/i386: define _AS_LATEST() macros for machine types

Follow the other architecture targets by adding extra macros for
defining a versioned machine type as the latest. This reduces the
size of the changes when introducing new machine types at the start
of each release cycle.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-ID: <20240910163041.3764176-1-berrange@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Message-ID: <20241126103005.3794748-2-cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
9 months agotest/qtest/ast2700-smc-test: Support to test AST2700
Jamin Lin [Wed, 27 Nov 2024 09:15:43 +0000 (17:15 +0800)]
test/qtest/ast2700-smc-test: Support to test AST2700

Add test_ast2700_evb function and reused testcases which are from
aspeed_smc-test.c for AST2700 testing. The base address, flash base address
and ce index of fmc_cs0 are 0x14000000, 0x100000000 and 0, respectively.
The default flash model of fmc_cs0 is "w25q01jvq" whose size is 128MB,
so set jedec_id 0xef4021.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-11-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest: Introduce a new aspeed-smc-utils.c to place common testcases
Jamin Lin [Wed, 27 Nov 2024 09:15:42 +0000 (17:15 +0800)]
test/qtest: Introduce a new aspeed-smc-utils.c to place common testcases

The testcases for ASPEED SMC model were placed in aspeed_smc-test.c.
However, this test file only supports for ARM32. To support all ASPEED SOCs
such as AST2700 whose CPU architecture is aarch64, introduces a new
aspeed-smc-utils source file and move all common APIs and testcases
from aspeed_smc-test.c to aspeed-smc-utils.c.

Finally, users are able to re-used these testcase for AST2700 and future
ASPEED SOCs testing.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-10-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Support write page command with QPI mode
Jamin Lin [Wed, 27 Nov 2024 09:15:41 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Support write page command with QPI mode

Add a new testcase for write page command with QPI mode testing.
Currently, only run this testcase for AST2500, AST2600 and AST1030.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-9-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Support to test AST1030
Jamin Lin [Wed, 27 Nov 2024 09:15:40 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Support to test AST1030

Add test_ast1030_evb function and reused testcases for AST1030 testing.
The base address, flash base address and ce index of fmc_cs0 are
0x7E620000, 0x80000000 and 0, respectively.
The default flash model of fmc_cs0 is "w25q80bl" whose size is 1MB,
so set jedec_id 0xef4014.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-8-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Support to test AST2600
Jamin Lin [Wed, 27 Nov 2024 09:15:39 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Support to test AST2600

Add test_ast2600_evb function and reused testcases for AST2600 testing.
The spi base address, flash base address and ce index of fmc_cs0 are
0x1E620000, 0x20000000 and 0, respectively.
The default flash model of fmc_cs0 is "mx66u51235f" whose size is 64MB,
so set jedec_id 0xc2253a.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Support to test AST2500
Jamin Lin [Wed, 27 Nov 2024 09:15:38 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Support to test AST2500

Add test_ast2500_evb function and reused testcases for AST2500 testing.
The spi base address, flash base address and ce index of fmc_cs0 are
0x1E620000, 0x20000000 and 0, respectively.
The default flash model of fmc_cs0 is "mx25l25635e" whose size is 32MB,
so set jedec_id 0xc22019.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Introducing a "page_addr" data field
Jamin Lin [Wed, 27 Nov 2024 09:15:37 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Introducing a "page_addr" data field

Currently, these test cases used the hardcode offset 0x1400000 (0x14000 * 256)
which was beyond the 16MB flash size for flash page read/write command testing.
However, the default fmc flash model of ast1030-a1 EVB is "w25q80bl" whose size
is 1MB. To test SoC flash models, introduces a new page_addr member in TestData
structure, so users can set the offset for flash page read/write command
testing.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Support to test all CE pins
Jamin Lin [Wed, 27 Nov 2024 09:15:36 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Support to test all CE pins

Currently, these test cases only support to test CE0. To test all CE pins,
introduces new ce and node members in TestData structure. The ce member is used
for saving the ce index and node member is used for saving the node path,
respectively.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs
Jamin Lin [Wed, 27 Nov 2024 09:15:35 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Introduce a new TestData to test different BMC SOCs

Currently, these test cases are only used for testing fmc_cs0 for AST2400.
To test others BMC SOCs, introduces a new TestData structure.
Users can set the spi base address, flash base address, jedesc id and so on
for different BMC SOCs and flash model testing.

Introduce new helper functions to make the test case more readable.

Set spi base address 0x1E620000, flash_base address 0x20000000
and jedec id 0x20ba19 for fmc_cs0 with n25q256a flash for AST2400
SMC model testing.

To pass the TestData into the test case, replace qtest_add_func with
qtest_add_data_func.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotest/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function
Jamin Lin [Wed, 27 Nov 2024 09:15:34 +0000 (17:15 +0800)]
test/qtest/aspeed_smc-test: Move testcases to test_palmetto_bmc function

So far, the test cases are used for testing SMC model with AST2400 BMC.
However, AST2400 is end off live and ASPEED is no longer support this SOC.
To test SMC model for AST2500, AST2600 and AST1030, move the test cases
from main to test_palmetto_bmc function.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241127091543.1243114-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Move debian boot test from avocado
Cédric Le Goater [Fri, 6 Dec 2024 13:11:32 +0000 (14:11 +0100)]
tests/functional: Move debian boot test from avocado

This simply moves the debian boot test from the avocado testsuite to
the new functional testsuite. No changes in the test.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-8-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for rainier-bmc machine
Cédric Le Goater [Fri, 6 Dec 2024 13:11:31 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for rainier-bmc machine

This simply moves the rainier-bmc test to a new test file. No changes
in the test. The test_arm_aspeed.py is deleted.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-7-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for ast2600 SoC
Cédric Le Goater [Fri, 6 Dec 2024 13:11:30 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for ast2600 SoC

This moves the ast2600-evb tests to a new test file. No changes in the
test. The routines used to run the buildroot and sdk tests are removed
from the test_arm_aspeed.py file because now unused.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-6-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for ast2500 SoC
Cédric Le Goater [Fri, 6 Dec 2024 13:11:29 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for ast2500 SoC

This moves the ast2500-evb tests to a new test file and extends the
aspeed module with routines used to run the buildroot and sdk
tests. No changes in the test.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-5-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for romulus-bmc machine
Cédric Le Goater [Fri, 6 Dec 2024 13:11:28 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for romulus-bmc machine

This simply moves the romulus-bmc test to a new test file. No changes
in the test. The do_test_arm_aspeed routine is removed from the
test_arm_aspeed.py file because it is now unused.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-4-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for palmetto-bmc machine
Cédric Le Goater [Fri, 6 Dec 2024 13:11:27 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for palmetto-bmc machine

This introduces a new aspeed module for sharing code between tests and
moves the palmetto test to a new test file. No changes in the test.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-3-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agotests/functional: Introduce a specific test for ast1030 SoC
Cédric Le Goater [Fri, 6 Dec 2024 13:11:26 +0000 (14:11 +0100)]
tests/functional: Introduce a specific test for ast1030 SoC

This simply moves the ast1030 tests to a new test file. No changes.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20241206131132.520911-2-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agoaspeed/soc: Support eMMC for AST2700
Jamin Lin [Wed, 4 Dec 2024 08:44:53 +0000 (16:44 +0800)]
aspeed/soc: Support eMMC for AST2700

Add SDHCI model for AST2700 eMMC support. The eMMC controller only support 1
slot and registers base address is start at 0x1209_0000 and its interrupt is
connected to GICINT 15.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-7-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agoaspeed/soc: Support SDHCI for AST2700
Jamin Lin [Wed, 4 Dec 2024 08:44:52 +0000 (16:44 +0800)]
aspeed/soc: Support SDHCI for AST2700

Add SDHCI model for AST2700 SDHCI support. The SDHCI controller only support 1
slot and registers base address is start at 0x1408_0000 and its interrupt is
connected to GICINT133_INTC at bit 1.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-6-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agohw/sd/aspeed_sdhci: Add AST2700 Support
Jamin Lin [Wed, 4 Dec 2024 08:44:51 +0000 (16:44 +0800)]
hw/sd/aspeed_sdhci: Add AST2700 Support

Introduce a new ast2700 class to support AST2700. Add a new ast2700 SDHCI class
init function and set the value of capability register to "0x0000000719f80080".

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agohw:sdhci: Introduce a new "capareg" class member to set the different Capability...
Jamin Lin [Wed, 4 Dec 2024 08:44:50 +0000 (16:44 +0800)]
hw:sdhci: Introduce a new "capareg" class member to set the different Capability Registers

Currently, it set the hardcode value of capability registers to all ASPEED SOCs
However, the value of capability registers should be different for all ASPEED
SOCs. For example: the bit 28 of the Capability Register 1 should be 1 for
64-bits System Bus support for AST2700.

Introduce a new "capareg" class member whose data type is uint_64 to set the
different Capability Registers to all ASPEED SOCs.

The value of Capability Register is "0x0000000001e80080" for AST2400 and
AST2500. The value of Capability Register is "0x0000000701f80080" for AST2600.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agohw/arm/aspeed: Fix coding style
Jamin Lin [Wed, 4 Dec 2024 08:44:49 +0000 (16:44 +0800)]
hw/arm/aspeed: Fix coding style

Fix coding style issues from checkpatch.pl.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-3-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agohw/sd/aspeed_sdhci: Fix coding style
Jamin Lin [Wed, 4 Dec 2024 08:44:48 +0000 (16:44 +0800)]
hw/sd/aspeed_sdhci: Fix coding style

Fix coding style issues from checkpatch.pl.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/r/20241204084453.610660-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agoarm: Remove tacoma-bmc machine
Cédric Le Goater [Tue, 19 Nov 2024 07:13:52 +0000 (08:13 +0100)]
arm: Remove tacoma-bmc machine

Removal was scheduled for 10.0. Use the rainier-bmc machine or the
ast2600-evb as a replacement.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/r/20241119071352.515790-1-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
9 months agorust: qdev: move bridge for realize and reset functions out of pl011
Paolo Bonzini [Tue, 12 Nov 2024 16:08:07 +0000 (17:08 +0100)]
rust: qdev: move bridge for realize and reset functions out of pl011

Allow the DeviceImpl trait to expose safe Rust functions.
rust_device_class_init<> adds thunks around the functions
in DeviceImpl.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qdev: move device_class_init! body to generic function, ClassInitImpl implement...
Paolo Bonzini [Mon, 28 Oct 2024 09:29:27 +0000 (10:29 +0100)]
rust: qdev: move device_class_init! body to generic function, ClassInitImpl implementation to macro

Use a trait to access the former parameters to device_class_init!.
This allows hiding the details of the class_init implementation behind
a generic function and makes higher-level functionality available from
qemu_api.

The implementation of ClassInitImpl is then the same for all devices and
is easily macroized.  Later on, we can remove the need to implement
ClassInitImpl by hand for all device types, and stop making
rust_device_class_init<>() public.

While at it, document the members of DeviceImpl.

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: move ClassInitImpl to the instance side
Paolo Bonzini [Mon, 28 Oct 2024 13:42:23 +0000 (14:42 +0100)]
rust: qom: move ClassInitImpl to the instance side

Put all traits on the instance struct, which makes it possible to reuse
class structs if no new virtual methods or class fields are added.
This is almost always the case for devices (because they are leaf
classes), which is the primary use case for Rust.

This is also simpler: soon we will find the implemented methods without
macros, and this removes the need to go from the class struct to the
instance struct to find the implementation of the *Impl traits.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: convert type_info! macro to an associated const
Paolo Bonzini [Mon, 28 Oct 2024 10:47:12 +0000 (11:47 +0100)]
rust: qom: convert type_info! macro to an associated const

type_info! is only used in the definition of ObjectImpl::TYPE_INFO, and
in fact in all of them.  Pull type_info!'s definition into the ObjectImpl
trait, thus simplifying the external interface of qemu_api::definitions.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: rename Class trait to ClassInitImpl
Paolo Bonzini [Mon, 28 Oct 2024 12:05:43 +0000 (13:05 +0100)]
rust: qom: rename Class trait to ClassInitImpl

While at it, document it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: qom: add default definitions for ObjectImpl
Paolo Bonzini [Mon, 28 Oct 2024 10:28:23 +0000 (11:28 +0100)]
rust: qom: add default definitions for ObjectImpl

Remove a bunch of duplicate const definitions.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: add a bit operation module
Paolo Bonzini [Thu, 5 Dec 2024 13:29:13 +0000 (14:29 +0100)]
rust: add a bit operation module

The bindgen supports `static inline` function binding since v0.64.0 as
an experimental feature (`--wrap-static-fns`), and stabilizes it after
v0.70.0.

But the oldest version of bindgen supported by QEMU is v0.60.1, so
there's no way to generate the binding for deposit64() which is `static
inline` (in include/qemu/bitops.h).

Instead, implement it by hand in Rust and make it available for all
unsigned types through an IntegerExt trait. Since it only involves bit
operations, the Rust version of the code is almost identical to the
original C version, but it applies to more types than just u64.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Co-authored-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: add bindings for interrupt sources
Paolo Bonzini [Thu, 31 Oct 2024 10:29:42 +0000 (11:29 +0100)]
rust: add bindings for interrupt sources

The InterruptSource bindings let us call qemu_set_irq() and sysbus_init_irq()
as safe code.

Interrupt sources, qemu_irq in C code, are pointers to IRQState objects.
They are QOM link properties and can be written to outside the control
of the device (i.e. from a shared reference); therefore they must be
interior-mutable in Rust.  Since thread-safety is provided by the BQL,
what we want here is the newly-introduced BqlCell.  A pointer to the
contents of the BqlCell (an IRQState**, or equivalently qemu_irq*)
is then passed to the C sysbus_init_irq function.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: define prelude
Paolo Bonzini [Thu, 5 Dec 2024 12:42:33 +0000 (13:42 +0100)]
rust: define prelude

Add a module that will contain frequently used traits and
occasionally structs.  They can be included quickly with
"use qemu_api::prelude::*".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: cell: add BQL-enforcing RefCell variant
Paolo Bonzini [Fri, 15 Nov 2024 11:20:35 +0000 (12:20 +0100)]
rust: cell: add BQL-enforcing RefCell variant

Similar to the existing BqlCell, introduce a custom interior mutability
primitive that resembles RefCell but accounts for QEMU's threading model.
Borrowing the RefCell requires proving that the BQL is held, and
attempting to access without the BQL is a runtime panic.

Almost all of the code was taken from Rust's standard library, while
removing unstable features and probably-unnecessary functionality that
amounts to 60% of the original code.  A lot of what's left is documentation,
as well as unit tests in the form of doctests.  These are not yet integrated
in "make check" but can be run with "cargo test --doc".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: cell: add BQL-enforcing Cell variant
Paolo Bonzini [Fri, 15 Nov 2024 12:26:58 +0000 (13:26 +0100)]
rust: cell: add BQL-enforcing Cell variant

QEMU objects usually have their pointer shared with the "outside
world" very early in their lifetime, for example when they create their
MemoryRegions.  Because at this point it is not valid anymore to
create a &mut reference to the device, individual parts of the
device struct must be made mutable in a controlled manner.

QEMU's Big Lock (BQL) effectively turns multi-threaded code into
single-threaded code while device code runs, as long as the BQL is not
released while the device is borrowed (because C code could sneak in and
mutate the device).  We can then introduce custom interior mutability primitives
that are semantically similar to the standard library's (single-threaded)
Cell and RefCell, but account for QEMU's threading model.  Accessing
the "BqlCell" or borrowing the "BqlRefCell" requires proving that the
BQL is held, and attempting to access without the BQL is a runtime panic,
similar to RefCell's already-borrowed panic.

With respect to naming I also considered omitting the "Bql" prefix or
moving it to the module, e.g.  qemu_api::bql::{Cell, RefCell}.  However,
this could easily lead to mistakes and confusion; for example rustc could
suggest the wrong import, leading to subtle bugs.

As a start introduce the an equivalent of Cell.  Almost all of the code
was taken from Rust's standard library, while removing unstable features
and probably-unnecessary functionality that constitute a large of the
original code.  A lot of what's left is documentation, as well as unit
tests in the form of doctests.  These are not yet integrated in "make
check" but can be run with "cargo test --doc".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agobql: check that the BQL is not dropped within marked sections
Paolo Bonzini [Wed, 6 Nov 2024 07:59:07 +0000 (08:59 +0100)]
bql: check that the BQL is not dropped within marked sections

The Big QEMU Lock (BQL) is used to provide interior mutability to Rust
code.  While BqlCell performs indivisible accesses, an equivalent of
RefCell will allow the borrower to hold to the interior content for a
long time.  If the BQL is dropped, another thread could come and mutate
the data from C code (Rust code would panic on borrow_mut() instead).
In order to prevent this, add a new BQL primitive that can mark
BQL-atomic sections and aborts if the BQL is dropped within them.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoqom/object: Remove type_register()
Zhao Liu [Tue, 29 Oct 2024 08:59:34 +0000 (16:59 +0800)]
qom/object: Remove type_register()

At present, type_register() and type_register_static() are identical,
although their documentation expects the *_static variant to accept
the Typeinfo with the strings that have the static lifetime.

However, the code implementation doesn't have any check or guarantee for
static lifetime. In fact, this is unnecessary because type_new()
duplicates all strings, thereby taking ownership of them.

Therefore, type_register() and type_register_static() are redundant, so
one of them should be removed.

Since the changes required to remove type_register() were smaller,
type_register() was replaced with type_register_static() throughout the
code base.  Drop its definition, and delete the requirement about string
lifetime from the documentation.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-17-zhao1.liu@intel.com
9 months agoscript/codeconverter/qom_type_info: Deprecate MakeTypeRegisterStatic and MakeTypeRegi...
Zhao Liu [Tue, 29 Oct 2024 08:59:33 +0000 (16:59 +0800)]
script/codeconverter/qom_type_info: Deprecate MakeTypeRegisterStatic and MakeTypeRegisterNotStatic

Deprecate MakeTypeRegisterStatic and MakeTypeRegisterNotStatic because
type_register() will be deprecated, then only type_register_static()
is used.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-16-zhao1.liu@intel.com
9 months agoui: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:32 +0000 (16:59 +0800)]
ui: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-15-zhao1.liu@intel.com
9 months agotarget/xtensa: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:31 +0000 (16:59 +0800)]
target/xtensa: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-14-zhao1.liu@intel.com
9 months agotarget/sparc: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:30 +0000 (16:59 +0800)]
target/sparc: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-13-zhao1.liu@intel.com
9 months agotarget/mips: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:29 +0000 (16:59 +0800)]
target/mips: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-12-zhao1.liu@intel.com
9 months agoi386: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:28 +0000 (16:59 +0800)]
i386: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-11-zhao1.liu@intel.com
9 months agohw/virtio: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:27 +0000 (16:59 +0800)]
hw/virtio: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-10-zhao1.liu@intel.com
9 months agohw/usb: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:26 +0000 (16:59 +0800)]
hw/usb: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-9-zhao1.liu@intel.com
9 months agohw/sensor: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:25 +0000 (16:59 +0800)]
hw/sensor: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-8-zhao1.liu@intel.com
9 months agohw/scsi: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:24 +0000 (16:59 +0800)]
hw/scsi: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because\
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-7-zhao1.liu@intel.com
9 months agohw/rtc: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:23 +0000 (16:59 +0800)]
hw/rtc: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-6-zhao1.liu@intel.com
9 months agoppc: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:22 +0000 (16:59 +0800)]
ppc: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-5-zhao1.liu@intel.com
9 months agohw/net: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:21 +0000 (16:59 +0800)]
hw/net: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-4-zhao1.liu@intel.com
9 months agohw/block: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:20 +0000 (16:59 +0800)]
hw/block: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-3-zhao1.liu@intel.com
9 months agoarm: Replace type_register() with type_register_static()
Zhao Liu [Tue, 29 Oct 2024 08:59:19 +0000 (16:59 +0800)]
arm: Replace type_register() with type_register_static()

Replace type_register() with type_register_static() because
type_register() will be deprecated.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20241029085934.2799066-2-zhao1.liu@intel.com
9 months agokvm: remove unnecessary #ifdef
Paolo Bonzini [Wed, 13 Nov 2024 18:07:10 +0000 (19:07 +0100)]
kvm: remove unnecessary #ifdef

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoclock: inline most of qdev_init_clocklist
Paolo Bonzini [Thu, 28 Nov 2024 17:30:39 +0000 (18:30 +0100)]
clock: inline most of qdev_init_clocklist

Move object creation out of qdev_init_clocklist.  The input/output
cases are very simple, and the aliases are completely different.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoclock: treat outputs and inputs the same in NamedClockList
Paolo Bonzini [Fri, 29 Nov 2024 06:47:01 +0000 (07:47 +0100)]
clock: treat outputs and inputs the same in NamedClockList

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoclock: clear callback on unparent
Paolo Bonzini [Thu, 28 Nov 2024 12:21:13 +0000 (13:21 +0100)]
clock: clear callback on unparent

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust/qemu-api: Fix fragment-specifiers in define_property macro
Junjie Mao [Thu, 17 Oct 2024 14:32:44 +0000 (22:32 +0800)]
rust/qemu-api: Fix fragment-specifiers in define_property macro

For the matcher of macro, "expr" is used for expressions, while "ident"
is used for variable/function names, and "ty" matches types.

In define_property macro, $field is a member name of type $state, so it
should be defined as "ident", though offset_of! doesn't complain about
this. $type is the type of $field, since it is not used in the macro, so
that no type mismatch error is triggered either.

Fix fragment-specifiers of $field and $type.

Signed-off-by: Junjie Mao <junjie.mao@hotmail.com>
Co-developed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/20241017143245.1248589-2-zhao1.liu@intel.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: fix doc test syntax
Paolo Bonzini [Tue, 5 Nov 2024 17:44:56 +0000 (18:44 +0100)]
rust: fix doc test syntax

Allow "cargo test --doc" to pass.

Reviewed-by: Junjie Mao <junjie.mao@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: ci: add job that runs Rust tools
Paolo Bonzini [Thu, 31 Oct 2024 14:10:29 +0000 (15:10 +0100)]
rust: ci: add job that runs Rust tools

Code checks, as well as documentation generation, are not yet tied
to "make check" because they need new version of the Rust toolchain
(even nightly in the case of "rustfmt").  Run them in CI using the
existing nightly-Rust container.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: add "make clippy", "make rustfmt", "make rustdoc"
Paolo Bonzini [Wed, 13 Nov 2024 08:11:48 +0000 (09:11 +0100)]
rust: build: add "make clippy", "make rustfmt", "make rustdoc"

Abstract common invocations of "cargo", that do not require copying
the generated bindgen file or setting up MESON_BUILD_ROOT.

In the future these could also do completely without cargo and invoke
the underlying programs directly.

Reviewed-by: Junjie Mao <junjie.mao@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: establish a baseline of lints across all crates
Paolo Bonzini [Wed, 6 Nov 2024 10:42:00 +0000 (11:42 +0100)]
rust: build: establish a baseline of lints across all crates

Many lints that default to allow can be helpful in detecting bugs or
keeping the code style homogeneous.  Add them liberally, though perhaps
not as liberally as in hw/char/pl011/src/lib.rs.  In particular, enabling
entire groups can be problematic because of bitrot when new links are
added in the future.

For Clippy, this is actually a feature that is only present in Cargo
1.74.0 but, since we are not using Cargo to *build* QEMU, only developers
will need a new-enough cargo and only to run tools such as clippy.
The requirement does not apply to distros that are building QEMU.

Reviewed-by: Junjie Mao <junjie.mao@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: fix a couple style issues from clippy
Paolo Bonzini [Tue, 5 Nov 2024 17:03:12 +0000 (18:03 +0100)]
rust: fix a couple style issues from clippy

These are reported as clippy::semicolon_inside_block and clippy::as_ptr_cast_mut.

clippy::semicolon_inside_block can be configured not to lint single-line
blocks; just go with the default.

Reviewed-by: Junjie Mao <junjie.mao@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: move strict lints handling to rustc_args.py
Paolo Bonzini [Thu, 7 Nov 2024 09:14:49 +0000 (10:14 +0100)]
rust: build: move strict lints handling to rustc_args.py

Make Cargo use unknown_lints = "allow" as well.  This is more future
proof as we might add new lints to rust/Cargo.toml that are not supported
by older versions of rustc or clippy.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: cargo: store desired warning levels in workspace Cargo.toml
Paolo Bonzini [Wed, 6 Nov 2024 12:03:45 +0000 (13:03 +0100)]
rust: cargo: store desired warning levels in workspace Cargo.toml

An extra benefit of workspaces is that they allow to place lint level
settings in a single Cargo.toml; the settings are then inherited by
packages in the workspace.

Correspondingly, teach rustc_args.py to get the unexpected_cfgs
configuration from the workspace Cargo.toml.

Note that it is still possible to allow or deny warnings per crate or
module, via the #![] attribute syntax.  The rust/qemu-api/src/bindings.rs
file is an example.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: generate lint flags from Cargo.toml
Paolo Bonzini [Thu, 7 Nov 2024 09:02:15 +0000 (10:02 +0100)]
rust: build: generate lint flags from Cargo.toml

Cargo.toml makes it possible to describe the desired lint level settings
in a nice format.  We can extend this to Meson-built crates, by teaching
rustc_args.py to fetch lint and --check-cfg arguments from Cargo.toml.
--check-cfg arguments come from the unexpected_cfgs lint as well as crate
features

Start with qemu-api, since it already has a [lints.rust] table and
an invocation of rustc_args.py.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: restrict --cfg generation to only required symbols
Paolo Bonzini [Wed, 6 Nov 2024 10:25:55 +0000 (11:25 +0100)]
rust: build: restrict --cfg generation to only required symbols

Parse the Cargo.toml file, looking for the unexpected_cfgs
configuration.  When generating --cfg options from the
config-host.h file, only use those that are included in the
configuration.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: build: move rustc_args.py invocation to qemu-api crate
Paolo Bonzini [Tue, 12 Nov 2024 10:54:11 +0000 (11:54 +0100)]
rust: build: move rustc_args.py invocation to qemu-api crate

Only qemu-api needs access to the symbols in config-host.h.  Remove
the temptation to use them elsewhere by limiting the --cfg arguments to
the qemu-api crate.

Per-crate invocation of the script will also be needed to add --check-cfg
options for each crate's features (when more complex, build-time
configurable devices are added in the future).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: allow using build-root bindings.rs from cargo
Paolo Bonzini [Tue, 12 Nov 2024 10:52:23 +0000 (11:52 +0100)]
rust: allow using build-root bindings.rs from cargo

Right now, using cargo with QEMU requires copying by hand the bindings.rs to the
source tree.  Instead, we can use an include file to escape the cage of cargo's
mandated source directory structure.

By running cargo within meson's "devenv" and adding a MESON_BUILD_ROOT
environment variable, it is easy for build.rs to find the file.  However, the
file must be symlinked into cargo's output directory for rust-analyzer to find
it.

Suggested-by: Junjie Mao <junjie.mao@hotmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agorust: apply --cfg MESON to all crates
Paolo Bonzini [Tue, 12 Nov 2024 10:35:34 +0000 (11:35 +0100)]
rust: apply --cfg MESON to all crates

We might have more uses for --cfg MESON, even though right now it's only
qemu-api that has generated files.  Since we're going to add more flags
to the add_project_arguments calls for Rust, it makes sense to also add
--cfg MESON everywhere.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoci: enable rust in the Debian and Ubuntu system build job
Paolo Bonzini [Tue, 22 Oct 2024 05:24:32 +0000 (07:24 +0200)]
ci: enable rust in the Debian and Ubuntu system build job

We have fixed all incompatibilities with older versions of rustc
and bindgen.  Enable Rust on Debian to check that the minimum
supported version of Rust is indeed 1.63.0, and 0.60.x for bindgen.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
9 months agoOpen 10.0 development tree
Peter Maydell [Tue, 10 Dec 2024 17:41:17 +0000 (17:41 +0000)]
Open 10.0 development tree

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>