Andreas Kemnade [Wed, 5 Jul 2023 19:03:22 +0000 (21:03 +0200)]
ASoC: ti: omap-mcbsp: Ignore errors for getting fck_src
Commit 349355ce3a05 ("ARM: OMAP2+: Drop legacy platform data for omap4 mcbsp")
dropped prcm_fck for omap4, so the clk_src might not be available making the
clk_get(src) fail. In such cases, rely on the devicetree to assign
the correct parent.
ASoC: mediatek: mt8188: DPCM used FE and BE merged parameters
To ensure that DPCM takes into account the backend hardware limitations
when user space queries the hw_params of a device, we need to add
dpcm_merged_format, dpcm_merged_chan, and dpcm_merged_rate to the FE
dai_links.
This patch includes only stereo FE dai_links, since multi-channel FEs
may be reserved for specific purposes. Therefore, it may not be
appropriate to consider BE conditions.
The new PM functions require code that is part of the snd-acp-legacy-common
module:
x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `snd_acp_resume':
acp-pci.c:(.text+0x23): undefined reference to `acp_init'
x86_64-linux-ld: acp-pci.c:(.text+0x58): undefined reference to `acp_enable_interrupts'
x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `snd_acp_suspend':
acp-pci.c:(.text+0x89): undefined reference to `acp_deinit'
x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `acp_pci_remove':
acp-pci.c:(.text+0xec): undefined reference to `acp_deinit'
x86_64-linux-ld: sound/soc/amd/acp/acp-pci.o: in function `acp_pci_probe':
acp-pci.c:(.text+0x26b): undefined reference to `acp_init'
Select that Kconfig symbol as is done for the other frontends.
Mark Brown [Wed, 19 Jul 2023 00:06:03 +0000 (01:06 +0100)]
ASoC: Improve coverage in default KUnit runs
Merge series from Mark Brown <broonie@kernel.org>:
We have some KUnit tests for ASoC but they're not being run as much as
they should be since ASoC isn't enabled in the configs used by default
with KUnit and in the case of the topology tests there is no way to
enable them without enabling drivers that use them. This series
provides a Kconfig option which KUnit can use directly rather than worry
about drivers.
Further, since KUnit is typically run in UML but ALSA prevents build
with UML we need to remove that Kconfig conflict. As far as I can tell
the motiviation for this is that many ALSA drivers use iomem APIs which
are not available under UML and it's more trouble than it's worth to go
through and add per driver dependencies. In order to avoid these issues
we also provide stubs for these APIs so there are no build time issues
if a driver relies on iomem but does not depend on it. With these stubs
I am able to build all the sound drivers available in a UML defconfig
(UML allmodconfig appears to have substantial other issues in a quick
test).
With this series I am able to run the topology KUnit tests as part of a
kunit --alltests run.
Mark Brown [Tue, 18 Jul 2023 23:25:38 +0000 (00:25 +0100)]
ASoC: cirrus: Use the maple tree register cache
Merge series from Mark Brown <broonie@kernel.org>:
The maple tree register register cache is now able to generate multi
register writes which was the last big feature of the rbtree cache that
it didn't support so let's update drivers to use the cache with the more
modern data structure.
Richard Fitzgerald [Tue, 18 Jul 2023 14:46:25 +0000 (15:46 +0100)]
ASoC: cs35l56: Patch soft registers to defaults
The soft (firmware) registers for volume/mute/posture are not reset by
a chip soft-reset, so use a regmap patch to set them to defaults.
cs35l56_reread_firmware_registers() has been removed. Its intent was to
use whatever the firmware set as a default. But the driver now patches the
defaults to the registers.
Mark Brown [Tue, 18 Jul 2023 18:45:01 +0000 (19:45 +0100)]
ASoC: add multi Component support
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>:
On below HW case, we would like to use it as "2 Cards",
but unfortunately it is impossible in intuitive way,
or possible but not intuitive way.
In reality, it is handled as "1 big Card" today.
Mark Brown [Tue, 18 Jul 2023 00:28:46 +0000 (01:28 +0100)]
ASoC: topology: Add explicit build option
The default KUnit build options are not supposed to enable any
subsystems that were not already enabled but the topology code is a
library which is generally selected by drivers that want to use it.
Since KUnit is frequently run in virtual environments with minimal
driver support this makes it difficult to enable the toplogy tests so
provide an explicit Kconfig option which can be directly enabled when
using KUnit, and also include this in the KUnit all_tests.config.
Mark Brown [Tue, 18 Jul 2023 00:28:44 +0000 (01:28 +0100)]
ALSA: Enable build with UML
In order to facilitate testing using KUnit allow ALSA to build with UML,
it's not super useful at runtime but that's a user problem rather than
an actual dependency. The apparent reason for the dependency was the
widespread use of iomem APIs in ALSA drivers, earlier patches in this
series have provided stubs for these APIs so that there are no build
time issues even without individual drivers having IOMEM dependencies
added.
Mark Brown [Tue, 18 Jul 2023 00:28:43 +0000 (01:28 +0100)]
platform: Provide stubs for !HAS_IOMEM builds
The various _ioremap_resource functions are not built when
CONFIG_HAS_IOMEM is disabled but no stubs are provided. Given how
widespread IOMEM usage is in drivers and how rare !IOMEM configurations
are in practical use let's just provide some stubs so users will build
without having to add explicit dependencies on IOMEM.
The most likely use case is builds with UML for KUnit testing.
Mark Brown [Tue, 18 Jul 2023 00:28:42 +0000 (01:28 +0100)]
driver core: Provide stubs for !IOMEM builds
The various _ioremap_resource functions are not built when
CONFIG_HAS_IOMEM is disabled but no stubs are provided. Given how
widespread IOMEM usage is in drivers and how rare !IOMEM configurations
are in practical use let's just provide some stubs so users will build
without having to add explicit dependencies on HAS_IOMEM.
The most likely use case is builds with UML for KUnit testing.
Mark Brown [Thu, 13 Jul 2023 00:14:01 +0000 (01:14 +0100)]
ASoC: wm9713: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm9713 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:14:00 +0000 (01:14 +0100)]
ASoC: wm9712: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm9712 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:59 +0000 (01:13 +0100)]
ASoC: wm9705: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm9705 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:58 +0000 (01:13 +0100)]
ASoC: wm8988: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8988 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:57 +0000 (01:13 +0100)]
ASoC: wm8985: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8985 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:56 +0000 (01:13 +0100)]
ASoC: wm8983: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8983 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:55 +0000 (01:13 +0100)]
ASoC: wm8978: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8978 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:54 +0000 (01:13 +0100)]
ASoC: wm8971: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8971 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:53 +0000 (01:13 +0100)]
ASoC: wm8955: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8955 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:52 +0000 (01:13 +0100)]
ASoC: wm8940: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the w8940 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:51 +0000 (01:13 +0100)]
ASoC: wm8996: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8996 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:50 +0000 (01:13 +0100)]
ASoC: wm8995: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8995 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:49 +0000 (01:13 +0100)]
ASoC: wm8993: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8993 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:48 +0000 (01:13 +0100)]
ASoC: wm8991: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8991 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:47 +0000 (01:13 +0100)]
ASoC: wm8962: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8962 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:46 +0000 (01:13 +0100)]
ASoC: wm8961: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8961 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:45 +0000 (01:13 +0100)]
ASoC: wm8960: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8960 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:44 +0000 (01:13 +0100)]
ASoC: wm8904: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8904 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:43 +0000 (01:13 +0100)]
ASoC: wm8903: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8903 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:42 +0000 (01:13 +0100)]
ASoC: wm8900: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8900 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:41 +0000 (01:13 +0100)]
ASoC: wm8804: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8804 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:40 +0000 (01:13 +0100)]
ASoC: wm8776: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8776 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:39 +0000 (01:13 +0100)]
ASoC: wm8770: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8770 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:38 +0000 (01:13 +0100)]
ASoC: wm8753: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8753 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:37 +0000 (01:13 +0100)]
ASoC: wm8750: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8750 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:36 +0000 (01:13 +0100)]
ASoC: wm8741: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8741 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:35 +0000 (01:13 +0100)]
ASoC: wm8737: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8737 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:34 +0000 (01:13 +0100)]
ASoC: wm8731: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8731 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:33 +0000 (01:13 +0100)]
ASoC: wm8728: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8728 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:32 +0000 (01:13 +0100)]
ASoC: wm8711: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8711 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:31 +0000 (01:13 +0100)]
ASoC: wm8580: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8580 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:30 +0000 (01:13 +0100)]
ASoC: wm8523: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8523 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:29 +0000 (01:13 +0100)]
ASoC: wm8510: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm8510 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:28 +0000 (01:13 +0100)]
ASoC: wm9090: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm9090 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:27 +0000 (01:13 +0100)]
ASoC: wm9081: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm9081 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:26 +0000 (01:13 +0100)]
ASoC: wm5100: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm5100 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:25 +0000 (01:13 +0100)]
ASoC: wm2200: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wm2200 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:24 +0000 (01:13 +0100)]
ASoC: cs4349: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs4349 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:23 +0000 (01:13 +0100)]
ASoC: cs42xx8: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs42xx8 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:22 +0000 (01:13 +0100)]
ASoC: cs42l56: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs42l56 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:21 +0000 (01:13 +0100)]
ASoC: cs42l52: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs42l52 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:20 +0000 (01:13 +0100)]
ASoC: cs4270: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs4270 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:19 +0000 (01:13 +0100)]
ASoC: cs4265: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs4265 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:18 +0000 (01:13 +0100)]
ASoC: cs42l51: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs42l51 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:17 +0000 (01:13 +0100)]
ASoC: cs35l56: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs35l56 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:16 +0000 (01:13 +0100)]
ASoC: cs35l45: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs35l45 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:15 +0000 (01:13 +0100)]
ASoC: cs35l41: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs35l41 driver to use the more modern data structure.
Mark Brown [Thu, 13 Jul 2023 00:13:14 +0000 (01:13 +0100)]
ASoC: cs35l36: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the cs35l36 driver to use the more modern data structure.
Frank Li [Thu, 13 Jul 2023 22:25:12 +0000 (18:25 -0400)]
ASoC: codec: wm8960: add additional probe check for codec identification
The wm8960 codec is not readable, resulting in a NACK for address 0x3d (8-bit).
This can partially indicate it. For example: wm8962 codec use the same address
but is readable. This additional probe check will help prevent loading the wm8960
module incorrectly on wm8962 hardware.
Mark Brown [Mon, 17 Jul 2023 21:58:36 +0000 (22:58 +0100)]
ASoC: qcom: Use the maple tree register cache
Merge series from Mark Brown <broonie@kernel.org>:
The maple tree register cache should now be a good replacement for the
rbtree cache in almost all situations, update the Qualcomm CODEC drivers
to use the newer cache.
Rob Herring [Fri, 7 Jul 2023 22:17:25 +0000 (16:17 -0600)]
ASoC: dt-bindings: audio-graph-card2: Drop incomplete example
The example in audio-graph-card2 binding is incomplete, uses
undocumented compatibles strings, and doesn't follow typical .dts
formatting. Rather than try to fix with what would probably be a lengthy
example, just drop the example.
Yangtao Li [Tue, 11 Jul 2023 03:48:45 +0000 (11:48 +0800)]
ASoC: tegra: tegra20_ac97: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.
Yangtao Li [Tue, 11 Jul 2023 03:48:44 +0000 (11:48 +0800)]
ASoC: pxa: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.
ASoC: simple-card.c: enable multi Component support
If CPU/Codec driver keeps its DAI node, we can directly identify actual
DAI by using snd_soc_get_dai_via_args().
This means we can use multi Component.
This patch enables multi Component support for Simple Card
ASoC: simple-card-utils.c: enable multi Component support
If CPU/Codec driver keeps its DAI node, we can directly identify actual
DAI by using snd_soc_get_dai_via_args().
This means we can use multi Component.
This patch enables multi Component support on Audio Graph Card/Card2.
To use multi Component support, we need to check dai_args whether
Card could get DAI from args (CPU/Codec needs set dai_args on DAI driver).
If it could, we need to allocate dai_args for dlc.
This patch adds snd_soc_copy_dai_args() for it.
This is helper function for multi Component support.
Current snd_soc_is_matching_component() checks "of_node" or "dai_args".
Thus coping "of_node" only is not enough to use CPU as Platform.
This patch adds snd_soc_dlc_use_cpu_as_platform() and help it.
This is helper function for multi Component support.
Current ASoC Card is using dlc (snd_soc_dai_link_component) to find
target DAI / Component to be used.
Current dlc has below 3 items to identify DAI / Component
(a) name for Component
(b) of_node for Component
(c) dai_name for DAI
(a) or (b) is used to identify target Component, and (c) is used
to identify DAI.
One of the biggest issue on it today is dlc needs "name matching"
for "dai_name" (c).
It was not a big deal when we were using platform_device, because we
could specify nessesary "dai_name" via its platform_data.
But we need to find DAI name pointer from whole registered datas and/or
each related driver somehow in case of DT, because we can't specify it.
Therefore, Card driver parses DT and assumes the DAI, and find its name
pointer. How to assume is based on each Component and/or Card.
Next biggest issue is Component node (a)/(b).
Basically, Component is registered when CPU/Codec driver was
probed() (X). Here, 1 Component is possible to have some DAIs.
int xxx_probe(struct platform_device *pdev)
{
...
(X) ret = devm_snd_soc_register_component(pdev->dev,
&component_driver,
&dai_driver, dai_driver_num);
...
}
The image of each data will be like below.
One note here is "driver" is included for later explanation.
But below image which we can register today doesn't allow it,
because the same Component will be connected to both Card0/1,
but it will be rejected by (Z).
static int snd_soc_is_matching_component(...)
{
...
(B) if (dlc->of_node && component_of_node != dlc->of_node)
...
}
dlc checkes "of_node" to identify target component (B),
but this "of_node" came from component->dev (A) which is added
by snd_soc_register_component() (X) on probe().
This means we can have different "component->card", but have same
"component->dev" in this case.
Even though we calls snd_soc_register_component() (= X) multiple times,
all Components have same driver's dev, thus it is impossible to
identified the Component.
And if it was impossible to identify Component, it is impossible to
identify DAI on current implementation.
So, how to handle above complex HW image today is 2 patterns.
One is handles it as "1 big sound card".
The SW image is like below.
It handles as "2 Cards", but CPU part needs to be probed as 2 drivers.
It is also not intuitive.
To solve this issue, we need to have multi Component support.
In current implementation, we need to identify Component first
to identify DAI, and it is using name matching to identify DAI.
But how about to be enable to directly identify DAI by unique way
instead of name matching ? In such case, we can directly identify DAI,
then it can identify Component from DAI.
For example Simple-Card / Audio-Graph-Card case, it is specifying DAI
via its node.
Simple-Card
sound-dai = <&cpu-sound>;
Audio-Graph-Card
dais = <&cpu-sound>;
If each CPU/Codec driver keeps this property when probing,
we can identify DAI directly from Card.
Being able to identify DAI directly means being able to identify its
Component as well even though Component has same dev (= B).
This patch adds new "dai_node" for it.
To keeping compatibility, it checks "dai_node" first if it has,
otherwise, use existing method (name matching).
Current ASoC is specifying and checking DAI name.
But where it came from and how to check was ambiguous.
This patch adds snd_soc_dai_name_get() / snd_soc_dlc_dai_is_match()
and makes it clear.
Mark Brown [Wed, 12 Jul 2023 18:29:35 +0000 (19:29 +0100)]
ASoC: wsa883x: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wsa883x driver to use the more modern data structure.
Mark Brown [Wed, 12 Jul 2023 18:29:34 +0000 (19:29 +0100)]
ASoC: wsa881x: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wsa881x driver to use the more modern data structure.
Mark Brown [Wed, 12 Jul 2023 18:29:33 +0000 (19:29 +0100)]
ASoC: wcd938x: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wcd938x driver to use the more modern data structure.
Mark Brown [Wed, 12 Jul 2023 18:29:32 +0000 (19:29 +0100)]
ASoC: wcd9335: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache. In
v6.5 it has also acquired the ability to generate multi-register writes in
sync operations, bringing performance up to parity with the rbtree cache
there.
Update the wcd9335 driver to use the more modern data structure.
Merge tag 'xtensa-20230716' of https://github.com/jcmvbkbc/linux-xtensa
Pull xtensa fixes from Max Filippov:
- fix interaction between unaligned exception handler and load/store
exception handler
- fix parsing ISS network interface specification string
- add comment about etherdev freeing to ISS network driver
* tag 'xtensa-20230716' of https://github.com/jcmvbkbc/linux-xtensa:
xtensa: fix unaligned and load/store configuration interaction
xtensa: ISS: fix call to split_if_spec
xtensa: ISS: add comment about etherdev freeing
Merge tag 'perf_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull perf fix from Borislav Petkov:
- Fix a lockdep warning when the event given is the first one, no event
group exists yet but the code still goes and iterates over event
siblings
* tag 'perf_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86: Fix lockdep warning in for_each_sibling_event() on SPR
Merge tag 'objtool_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull objtool fixes from Borislav Petkov:
- Mark copy_iovec_from_user() __noclone in order to prevent gcc from
doing an inter-procedural optimization and confuse objtool
- Initialize struct elf fully to avoid build failures
* tag 'objtool_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
iov_iter: Mark copy_iovec_from_user() noclone
objtool: initialize all of struct elf
Merge tag 'sched_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull scheduler fixes from Borislav Petkov:
- Remove a cgroup from under a polling process properly
- Fix the idle sibling selection
* tag 'sched_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched/psi: use kernfs polling functions for PSI trigger polling
sched/fair: Use recent_used_cpu to test p->cpus_ptr
Merge tag 'pinctrl-v6.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
"I'm mostly on vacation but what would vacation be without a few
critical fixes so people can use their gaming laptops when hiding away
from the sun (or rain)?
- Fix a really annoying interrupt storm in the AMD driver affecting
Asus TUF gaming notebooks
- Fix device tree parsing in the Renesas driver"
* tag 'pinctrl-v6.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: amd: Unify debounce handling into amd_pinconf_set()
pinctrl: amd: Drop pull up select configuration
pinctrl: amd: Use amd_pinconf_set() for all config options
pinctrl: amd: Only use special debounce behavior for GPIO 0
pinctrl: renesas: rzg2l: Handle non-unique subnode names
pinctrl: renesas: rzv2m: Handle non-unique subnode names
Merge tag '6.5-rc1-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6
Pull smb client fixes from Steve French:
- Two reconnect fixes: important fix to address inFlight count to leak
(which can leak credits), and fix for better handling a deleted share
- DFS fix
- SMB1 cleanup fix
- deferred close fix
* tag '6.5-rc1-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6:
cifs: fix mid leak during reconnection after timeout threshold
cifs: is_network_name_deleted should return a bool
smb: client: fix missed ses refcounting
smb: client: Fix -Wstringop-overflow issues
cifs: if deferred close is disabled then close files immediately
Merge tag 'powerpc-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
- Fix Speculation_Store_Bypass reporting in /proc/self/status on
Power10
- Fix HPT with 4K pages since recent changes by implementing pmd_same()
- Fix 64-bit native_hpte_remove() to be irq-safe
Thanks to Aneesh Kumar K.V, Nageswara R Sastry, and Russell Currey.
* tag 'powerpc-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm/book3s64/hash/4k: Add pmd_same callback for 4K page size
powerpc/64e: Fix obtool warnings in exceptions-64e.S
powerpc/security: Fix Speculation_Store_Bypass reporting on Power10
powerpc/64s: Fix native_hpte_remove() to be irq-safe
Merge tag 'hardening-v6.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux
Pull hardening fixes from Kees Cook:
- Remove LTO-only suffixes from promoted global function symbols
(Yonghong Song)
- Remove unused .text..refcount section from vmlinux.lds.h (Petr Pavlu)
- Add missing __always_inline to sparc __arch_xchg() (Arnd Bergmann)
- Claim maintainership of string routines
* tag 'hardening-v6.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
sparc: mark __arch_xchg() as __always_inline
MAINTAINERS: Foolishly claim maintainership of string routines
kallsyms: strip LTO-only suffixes from promoted global functions
vmlinux.lds.h: Remove a reference to no longer used sections .text..refcount
Merge tag 'probes-fixes-v6.5-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace
Pull probe fixes from Masami Hiramatsu:
- fprobe: Add a comment why fprobe will be skipped if another kprobe is
running in fprobe_kprobe_handler().
- probe-events: Fix some issues related to fetch-arguments:
- Fix double counting of the string length for user-string and
symstr. This will require longer buffer in the array case.
- Fix not to count error code (minus value) for the total used
length in array argument. This makes the total used length
shorter.
- Fix to update dynamic used data size counter only if fetcharg uses
the dynamic size data. This may mis-count the used dynamic data
size and corrupt data.
- Revert "tracing: Add "(fault)" name injection to kernel probes"
because that did not work correctly with a bug, and we agreed the
current '(fault)' output (instead of '"(fault)"' like a string)
explains what happened more clearly.
- Fix to record 0-length (means fault access) data_loc data in fetch
function itself, instead of store_trace_args(). If we record an
array of string, this will fix to save fault access data on each
entry of the array correctly.
* tag 'probes-fixes-v6.5-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
tracing/probes: Fix to record 0-length data_loc in fetch_store_string*() if fails
Revert "tracing: Add "(fault)" name injection to kernel probes"
tracing/probes: Fix to update dynamic data counter if fetcharg uses it
tracing/probes: Fix not to count error code to total length
tracing/probes: Fix to avoid double count of the string length on the array
fprobes: Add a comment why fprobe_kprobe_handler exits if kprobe is running
Merge tag 'spi-fix-v6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A couple of fairly minor driver specific fixes here, plus a bunch of
maintainership and admin updates. Nothing too remarkable"
* tag 'spi-fix-v6.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
mailmap: add entry for Jonas Gorski
MAINTAINERS: add myself for spi-bcm63xx
spi: s3c64xx: clear loopback bit after loopback test
spi: bcm63xx: fix max prepend length
MAINTAINERS: Add myself as a maintainer for Microchip SPI
projects / linux.git / log