Heiko Stuebner [Sun, 18 May 2025 22:04:47 +0000 (00:04 +0200)]
arm64: dts: rockchip: fix rk3562 pcie unit addresses
The rk3562 pcie node currently uses the apb register as its unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3562.dtsi:624.26-675.5: Warning (simple_bus_reg): /soc/pcie@ff500000: simple-bus unit address format error, expected "fe000000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
With the move also move the reg + reg-names below the compatible, as is the
preferred position.
Heiko Stuebner [Sun, 18 May 2025 22:04:43 +0000 (00:04 +0200)]
arm64: dts: rockchip: fix rk3576 pcie unit addresses
The rk3576 pcie nodes currently use the apb register as their unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1346.24-1398.5: Warning (simple_bus_reg): /soc/pcie@2a200000: simple-bus unit address format error, expected "22000000"
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1400.24-1452.5: Warning (simple_bus_reg): /soc/pcie@2a210000: simple-bus unit address format error, expected "22400000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
Diederik de Haas [Mon, 19 May 2025 10:18:28 +0000 (12:18 +0200)]
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
The assigned-clocks and assigned-clock-rates properties were moved from
the scmi_clk node onto cpu nodes in commit 87810bda8a84 ("arm64: dts: rockchip: Fix SCMI assigned clocks on rk3588s")
During review of v1 of that patch set, the following comment was made:
why aren't you using OPP tables to define CPU frequencies.
Assigned-clocks looks like a temporary hack because you haven't
done proper OPP tables.
Some time later, proper OPP tables for rk3588 were added in commit 276856db91b4 ("arm64: dts: rockchip: Add OPP data for CPU cores on RK3588")
So this 'temporary hack' is no longer needed.
Dropping it fixes the following dtb validation issues:
cpu@0: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@400: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@600: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
Sebastian Reichel [Tue, 20 May 2025 11:14:27 +0000 (13:14 +0200)]
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Add the power-domains for the RK3576 SFC nodes according to the
TRM part 1. This fixes potential SErrors when accessing the SFC
registers without other peripherals (e.g. eMMC) doing a prior
power-domain enable. For example this is easy to trigger on the
Rock 4D, which enables the SFC0 interface, but does not enable
the eMMC interface at the moment.
Diederik de Haas [Tue, 13 May 2025 16:57:27 +0000 (18:57 +0200)]
arm64: dts: rockchip: Improve LED config for NanoPi R5S
The NanoPi R5S has 4 GPIO LEDs, a RED one for SYStem power and 3 green
LEDs meant to indicate that a cable is connected to either of the
2.5GbE LAN ports or the 1GbE WAN port.
In the NanoPi R5S schematic (2204; page 19) as well as on the PCB and on
the case, SYS is used and not POWER. So replace 'power' with 'sys'.
But keep the 'power_led' label/phandle even though the kernel doesn't
use it, but it may be used outside of it.
The SYStem LED already had "heartbeat" as its default-trigger.
Set the default-trigger to "netdev" for the NICs so they will show when
LAN1/LAN2/WAN is connected and set their default-state to "off".
Also assign labels as close as possible to the labels on the case, while
still being descriptive enough in their own right.
Heiko Stuebner [Wed, 14 May 2025 15:07:40 +0000 (17:07 +0200)]
arm64: dts: rockchip: add basic mdio node to px30
Using snps,reset-* properties for handling the phy-reset is deprecated
and instead a real phy node should be defined that then contains the
reset-gpios handling.
To facilitate this, add the core mdio node under the px30's gmac, similar
to how the other Rockchip socs already do this.
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
The u2phy0_host port is the part of the USB PHY0 (namely the
HOST0_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST0_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers.
USB3 OTG has been known to be unstable on RK3399 Puma Haikou for a
while, one of the recurring issues being that only USB2 is detected and
not USB3 in host mode. Reading the justification above and seeing that
we are keeping u2phy0_host in the Haikou carrierboard DTS probably may
have bothered you since it should be changed to u2phy0_otg. The issue is
that if it's switched to that, USB OTG on Haikou is entirely broken. I
have checked the routing in the Gerber file, the lanes are going to the
expected ball pins (that is, NOT HOST0_DP/DM).
u2phy0_host is for sure the wrong part of the PHY to use, but it's the
only one that works at the moment for that board so keep it until we
figure out what exactly is broken.
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
The u2phy1_host port is the part of the USB PHY1 (namely the
HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers and associated part in USB2.0 PHY.
arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
Currently, the onboard Cypress CYUSB3304 USB hub is not defined in
the device tree, and hub reset pin is provided as vcc5v0_host
regulator to usb phy. This causes instability issues, as a result
of improper reset duration.
The fixed regulator device requests the GPIO during probe in its
inactive state (except if regulator-boot-on property is set, in
which case it is requested in the active state). Considering gpio
is GPIO_ACTIVE_LOW for Puma, it means it’s driving it high. Then
the regulator gets enabled (because regulator-always-on property),
which drives it to its active state, meaning driving it low.
The Cypress CYUSB3304 USB hub actually requires the reset to be
asserted for at least 5 ms, which we cannot guarantee right now
since there's no delay in the current config, meaning the hub may
sometimes work or not. We could add delay as offered by
fixed-regulator but let's rather fix this by using the proper way
to model onboard USB hubs.
Define hub_2_0 and hub_3_0 nodes, as the onboard Cypress hub
consist of two 'logical' hubs, for USB2.0 and USB3.0.
Use the 'reset-gpios' property of hub to assign reset pin instead
of using regulator. Rename the vcc5v0_host regulator to
cy3304_reset to be more meaningful. Pin is configured to
output-high by default, which sets the hub in reset state
during pin controller initialization. This allows to avoid double
enumeration of devices in case the bootloader has setup the USB
hub before the kernel.
The vdd-supply and vdd2-supply properties in hub nodes are
added to provide correct dt-bindings, although power supplies are
always enabled based on HW design.
Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Cc: stable@vger.kernel.org # 6.6 Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-3-4a76a474a010@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
dt-bindings: usb: cypress,hx3: Add support for all variants
The Cypress HX3 hubs use different default PID value depending
on the variant. Update compatibles list.
Becasuse all hub variants use the same driver data, allow the
dt node to have two compatibles: leftmost which matches the HW
exactly, and the second one as fallback.
Fixes: 1eca51f58a10 ("dt-bindings: usb: Add binding for Cypress HX3 USB 3.0 family") Cc: stable@vger.kernel.org # 6.6 Cc: stable@vger.kernel.org # Backport of the patch ("dt-bindings: usb: usb-device: relax compatible pattern to a contains") from list: https://lore.kernel.org/linux-usb/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de/ Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-2-4a76a474a010@thaumatec.com
[taken with Greg's blessing] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Sat, 10 May 2025 22:01:06 +0000 (00:01 +0200)]
arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
Even though they will be the same for all boards, i2c and uart aliases
are supposed to live in the individual board files, to not create
aliases for disabled nodes.
So move the newly added aliases for rk3528 over to the Radxa E20C board,
which is the only rk3528 board right now.
Fixes: d3a05f490d04 ("arm64: dts: rockchip: Add I2C controllers for RK3528") Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250510220106.2108414-1-heiko@sntech.de
Jonas Karlman [Fri, 9 May 2025 20:23:58 +0000 (20:23 +0000)]
arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
The Radxa E20C has two GbE ports, LAN and WAN. The LAN port is provided
using a GMAC controller and a YT8531C PHY and the WAN port is provided
by an RTL8111H PCIe Ethernet controller.
Sebastian Reichel [Thu, 8 May 2025 17:48:53 +0000 (19:48 +0200)]
arm64: dts: rockchip: add Rock 5B+
Add ROCK 5B+, which is an improved version of the ROCK 5B with the
following changes:
* Memory LPDDR4X -> LPDDR5
* HDMI input connector size
* eMMC socket -> onboard
* M.2 E-Key is replaced by onboard RTL8852BE WLAN/BT
* M.2 M-Key 1x4 lanes is replaced by 2x2 lanes
* Added M.2 B-Key for USB connected WWAN modules (untested)
* Add second camera port (not yet supported in upstream Linux)
* Add dedicated USB-C port for device power (no impact in DT;
the existing port has not been changed and the new port is
handled by CH224D standalone chip)
Sebastian Reichel [Thu, 8 May 2025 17:48:50 +0000 (19:48 +0200)]
arm64: dts: rockchip: move rock 5b to include file
Radxa released some more boards, which are based on the original
Rock 5B. Move its board description into an include file to avoid
unnecessary duplication.
Nicolas Frattaroli [Tue, 6 May 2025 10:42:42 +0000 (12:42 +0200)]
arm64: dts: rockchip: Add analog audio on RK3576 Sige5
The ArmSoM Sige5 board features an Everest ES8388 codec to provide
analog stereo audio output, as well as analog audio input. The codec
hangs off the i2c2 bus and responds to address 0x10. It is connected to
the SAI1 audio controller of the RK3576, with one SDO (output) lane and
one SDI (input) lane.
The codec has two sets of outputs. One set, LOUT1/ROUT1, is connected
through a set of 22uF non-polarised coupling capacitors to a 3-position
connector that appears to be a clone of the JST BM03B-SURS-TF header,
and is capable of mating with a JST 03SUR-32S (or JST 03SUR-36L if you
prefer lemon-lime) or compatible clone connector. The right headphone
output is the one closest to the Type-C DC input connector, the left
headphone output is the one in the middle, and the third position, the
one closest to the USB3 Type-A host connector, is puzzingly labelled as
"HP_GND" in the schematic but is in fact connected to the codecs RIN1
input through a 1uF non-plarised coupling capacitor.
LOUT2 and ROUT2 are routed to 1mm test pads T36 and T37 respectively.
These are located on the bottom of the board, and do not go through any
coupling capacitor. For use as line out, the ES8388 datasheet recommends
adding 1uF coupling capacitor if one wishes to use it as a line-level
output.
There is also a pair of inputs for a stereo microphone, going from two
1mm testpads T34 and T35, which are decoupled with a 100pF capacitor and
pulled to 3.3v and ground respectively. These inputs then go through 1uF
capacitors each and end up in the LINPUT2 and RINPUT2 pins of the
ES8388 codec.
The codec's power inputs are routed to receive 3.3V for both its analog
and digital inputs, though from different supplies.
Nicolas Frattaroli [Tue, 6 May 2025 10:42:40 +0000 (12:42 +0200)]
arm64: dts: rockchip: Add RK3576 SAI nodes
The RK3576 SoC has 10 SAI controllers in total. Five of them are in the
video output power domains, and are used for digital audio output along
with the video signal of those, e.g. HDMI audio.
The other five, SAI0 through SAI4, are exposed externally. SAI0 and SAI1
are capable of 8-channel audio, whereas SAI2, SAI3 and SAI4 are limited
to two channels. These five are in the audio power domain.
Yao Zi [Thu, 8 May 2025 23:48:29 +0000 (23:48 +0000)]
arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528
RK3528 features two SDIO controllers and one SD/MMC controller, describe
them in devicetree. Since their sample and drive clocks are located in
the VO and VPU GRFs, corresponding syscons are added to make these
clocks available.
Chukun Pan [Sat, 8 Mar 2025 09:30:08 +0000 (17:30 +0800)]
arm64: dts: rockchip: Move rk3568 PCIe3 MSI to use GIC ITS
Following commit b956c9de9175 ("arm64: dts: rockchip: rk356x: Move
PCIe MSI to use GIC ITS instead of MBI"), change the PCIe3 controller's
MSI on rk3568 to use ITS, so that all MSI-X can work properly.
Peter Robinson [Tue, 6 May 2025 22:25:28 +0000 (23:25 +0100)]
arm64: dts: rockchip: Update eMMC for NanoPi R5 series
Add the 3.3v and 1.8v regulators that are connected to
the eMMC on the R5 series devices, as well as adding the
eMMC data strobe, and enable eMMC HS200 mode as the
Foresee FEMDNN0xxG-A3A55 modules support it.
Fixes: c8ec73b05a95d ("arm64: dts: rockchip: create common dtsi for NanoPi R5 series") Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250506222531.625157-1-pbrobinson@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Peter Robinson [Tue, 6 May 2025 19:56:55 +0000 (20:56 +0100)]
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-rock3c
As described in the radxa_rock_3c_v1400_schematic.pdf, the SPI Flash's
VCC connector is connected to VCCIO_FLASH and according to the
that same schematic, that belongs to the VCC_1V8 power source.
This fixes the following warning:
spi-nor spi4.0: supply vcc not found, using dummy regulator
Yao Zi [Thu, 17 Apr 2025 12:01:18 +0000 (12:01 +0000)]
arm64: dts: rockchip: Add I2C controllers for RK3528
Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
I2C-4 and I2C-7 which come with only a set of possible pins, a default
pin configuration is included.
Nicolas Frattaroli [Fri, 2 May 2025 11:03:07 +0000 (13:03 +0200)]
dt-bindings: clock: rk3576: add IOC gated clocks
Certain clocks on the RK3576 are additionally essentially "gated" behind
some bit toggles in the IOC GRF range. Downstream ungates these by
adding a separate clock driver that maps over the GRF range and leaks
their implementation of this into the DT.
Instead, define some new clock IDs for these, so that consumers of these
types of clocks can properly articulate which clock they're using, so
that we can then add them to the clock driver for SoCs that need them.
Krzysztof Kozlowski [Thu, 1 May 2025 16:02:09 +0000 (18:02 +0200)]
arm64: dts: rockchip: Switch to undeprecated qcom,calibration-variant on RK3399
The property qcom,ath10k-calibration-variant was deprecated in favor of
recently introduced generic qcom,calibration-variant, common to all
Qualcomm Atheros WiFi bindings.
Change will affect out of tree users, like other projects, of this DTS.
Diederik de Haas [Sat, 3 May 2025 15:22:19 +0000 (17:22 +0200)]
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-quartz64-b
The Quartz64 Model B has a Winbound 25Q64DWZPIG SPI flash chip,
identified as 'U13' on the component placement schematic.
In the Quartz 64 Model-B Schematic from 20220124 on page 17, we can see
that the VCC connector is connected to VCCIO_FLASH and page 4 shows that
that in turn is connected to the VCCIO2 domain.
That domain uses vcc_1v8 as its power source.
This fixes the following warning:
spi-nor spi4.0: supply vcc not found, using dummy regulator
Diederik de Haas [Sat, 3 May 2025 15:22:18 +0000 (17:22 +0200)]
arm64: dts: rockchip: Add phy-supply to gmac0 on NanoPi R5S
According to paragraph "7.16. Power" of the RTL8211F-CG datasheet, gmac0
needs to have a 3.3V power supply.
On page 22 of the NanoPi R5S version 2204, that is identified as
VCC_GEPHY_3V3 which is connected to the VCC_3V3 power source.
This fixes the following warning:
rk_gmac-dwmac fe2a0000.ethernet: supply phy not found, using dummy regulator
John Clark [Tue, 22 Apr 2025 21:03:45 +0000 (17:03 -0400)]
arm64: dts: rockchip: fix usb-c port functionality on rk3588-nanopc-t6
The USB-C port on the NanoPC-T6 was not providing VBUS (vbus5v0_typec
regulator disabled, gpio-58 out lo) due to misconfiguration. The
original setup with regulator-always-on and regulator-boot-on forced
the port on, masking the issue, but removing these properties revealed
that the fusb302 driver was not enabling the regulator dynamically.
Changes:
- Removed regulator-always-on and regulator-boot-on from vbus5v0_typec
and vbus5v0_usb to allow driver control.
- Changed power-role from "source" to "dual" in the usb-c-connector to
support OTG functionality.
- Added pd-revision = /bits/ 8 <0x2 0x0 0x1 0x2> to the FUSB302MPX
node to specify USB Power Delivery (PD) Revision 2.0, Version 1.2,
ensuring the driver correctly advertises PD capabilities and
negotiates power roles (source/sink).
- Added op-sink-microwatt and sink-pdos for proper sink mode
configuration (1W min, 15W max).
- Added typec-power-opmode = "1.5A" to enable 1.5A fallback for non-PD
USB-C devices, aligning with the 5V/2A hardware limit.
- Set try-power-role to "source" to prioritize VBUS enablement.
- Adjusted usb_host0_xhci dr_mode from "host" to "otg" and added
usb-role-switch for dual-role support.
Testing:
- Verified VBUS (5V) delivery to a sink device (USB thumb drive).
- Confirmed USB host mode with lsusb detecting connected devices.
- Validated USB device mode with adb devices when connected to a PC.
- Tested dual-role (OTG) functionality with try-power-role set to
"source" and "sink"; "source" prioritizes faster VBUS activation.
- Validated functionality with a mobile device, including USB Power
Delivery, file transfer, USB tethering, MIDI, and image transfer.
- Tested USB-C Ethernet adapter compatibility in host mode.
- Tested USB-C hub compatibility in host mode.
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5b
The Radxa Rock 5B component placement document identifies the SPI Nor
Flash chip as 'U4300' which is described on page 25 of the Schematic
v1.45. There we can see that the VCC connector is connected to the
VCC_3V3_S3 power source.
This fixes the following warning:
spi-nor spi5.0: supply vcc not found, using dummy regulator
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-pinetab2
As described on page 37 of PineTab2 Schematic-20230417, the SPI Flash's
VCC connector is connected to VCCIO_FLASH and according to page 6 of
that same schematic, that belongs to the VCC_1V8 power source.
This fixes the following warning:
spi-nor spi4.0: supply vcc not found, using dummy regulator
Markus Reichl [Fri, 11 Apr 2025 14:02:21 +0000 (16:02 +0200)]
arm64: dts: rockchip: Add vcc supply to spi flash on rk3399-roc-pc
Add vcc supply to the spi-nor flash chip on rk3399-roc-pc boards
according to the board schematics ROC-3399-PC-V10-A-20180804 to avoid
warnings in dmesg output.
Nicolas Frattaroli [Mon, 14 Apr 2025 18:37:38 +0000 (20:37 +0200)]
arm64: dts: rockchip: enable pcie on Sige5
The ArmSoM Sige5 board exposes PCIe controller 0 on its M.2 slot on the
bottom of the board. Enable the necessary nodes for it, and also add the
correct pins for both the power enable GPIO and the PCIe reset GPIO.
Shawn Lin [Wed, 23 Apr 2025 01:22:39 +0000 (09:22 +0800)]
arm64: dts: rockchip: Add pcie1 slot for rk3576 evb1 board
PCIe1 and usb_drd1_dwc3 is sharing the same PHY on RK3576 platform.
For pcie1 slot and USB interface, there is a swich IC labelled as
Dial_Switch_1 on evb1 board. If we need to make pcie1 slot work for this
board, we should first disable usb_drd1_dwc3 and then set Dial_Switch_1
to low state.
arm64: dts: rockchip: Add bluetooth support to Khadas Edge2
This commit adds the RTS signal, specifies the compatible Broadcom chip,
its clock source, interrupts, GPIOs for wakeup and shutdown, maximum speed,
pinctrl settings, and power supplies.
Heiko Stuebner [Wed, 26 Feb 2025 14:09:42 +0000 (15:09 +0100)]
arm64: dts: rockchip: add overlay for tiger-haikou video-demo adapter
This adds support for the video-demo-adapter DEVKIT ADDON CAM-TS-A01
(https://embedded.cherry.de/product/development-kit/) for the Haikou
devkit with Tiger RK3588 SoM.
The Video Demo adapter is an adapter connected to the fake PCIe slot
labeled "Video Connector" on the Haikou devkit.
It's main feature is a Leadtek DSI-display with touchscreen and a camera
(that is not supported yet). To drive these components a number of
additional regulators are grouped on the adapter as well as a PCA9670
gpio-expander to provide the needed additional gpio-lines.
Andy Yan [Sat, 19 Apr 2025 12:13:16 +0000 (20:13 +0800)]
arm64: dts: rockchip: Rename hdmi-con to hdmi0-con for Cool Pi CM5 EVB
There are two hdmi connector on Cool Pi CM5 EVB, the current supported
is hdmi0, assign corresponding index to it. It will be convenient for
us to add support for another one.
Damon Ding [Mon, 10 Mar 2025 10:41:14 +0000 (18:41 +0800)]
arm64: dts: rockchip: Enable eDP0 display on RK3588S EVB1 board
Add the necessary DT changes to enable eDP0 on RK3588S EVB1 board:
- Set pinctrl of pwm12 for backlight
- Enable edp0/hdptxphy0/vp2
- Assign the parent of DCLK_VOP2_SRC to PLL_V0PLL
- Add aux-bus/panel nodes
For RK3588, the PLL_V0PLL is specifically designed for the VOP2. This
means the clock rate of PLL_V0PLL can be adjusted according to the dclk
rate of relevant VP. It is typically assigned as the dclk source of a
specific VP when the clock of relevant display mode is unusual, such as
the eDP panel 'lg,lp079qx1-sp0v' paired with RK3588S EVB1, which has a
clock rate of 202.02MHz.
Additionally, the 'force-hpd' is set for edp0 because the HPD pin on the
panel side is not connected to the eDP HPD pin on the SoC side according
to the RK3588S EVB1 hardware design.
Chukun Pan [Tue, 1 Apr 2025 10:00:18 +0000 (18:00 +0800)]
arm64: dts: rockchip: Add missing uart3 interrupt for RK3528
The interrupt of uart3 node on rk3528 is missing, fix it.
Fixes: 7983e6c379a9 ("arm64: dts: rockchip: Add base DT for rk3528 SoC") Reviewed-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Link: https://lore.kernel.org/r/20250401100020.944658-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Andy Yan [Sat, 21 Dec 2024 10:49:07 +0000 (18:49 +0800)]
arm64: dts: rockchip: aliase sdhci as mmc0 for rk3566 box demo
Follow most others rk356x based boards, and u-boot only use mmc0/1
as mmc boot targets, so aliase sdhci as mmc0.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
[demo-board only used internally by Rockchip, so changing the alias order
does not affect public users] Link: https://lore.kernel.org/r/20241221104920.4193034-1-andyshrk@163.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
While looking through the vendor U-Boot code Heiko spotted that a SoC
GPIO is connected to the ethernet phy's reset pin. Add the respective
reset-gpios property with pinmuxing for the GPIO to the phy node.
Thomas Weißschuh [Wed, 2 Apr 2025 20:21:57 +0000 (21:21 +0100)]
tools/include: make uapi/linux/types.h usable from assembly
The "real" linux/types.h UAPI header gracefully degrades to a NOOP when
included from assembly code.
Mirror this behaviour in the tools/ variant.
Test for __ASSEMBLER__ over __ASSEMBLY__ as the former is provided by the
toolchain automatically.
Reported-by: Mark Brown <broonie@kernel.org> Closes: https://lore.kernel.org/lkml/af553c62-ca2f-4956-932c-dd6e3a126f58@sirena.org.uk/ Fixes: c9fbaa879508 ("selftests: vDSO: parse_vdso: Use UAPI headers instead of libc headers") Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Link: https://patch.msgid.link/20250321-uapi-consistency-v1-1-439070118dc0@linutronix.de Signed-off-by: Mark Brown <broonie@kernel.org> Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Merge tag 'soundwire-6.15-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire
Pull soundwire fix from Vinod Koul:
- add missing config symbol CONFIG_SND_HDA_EXT_CORE required for asoc
driver CONFIG_SND_SOF_SOF_HDA_SDW_BPT
* tag 'soundwire-6.15-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
ASoC: SOF: Intel: Let SND_SOF_SOF_HDA_SDW_BPT select SND_HDA_EXT_CORE
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