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2 months agoarm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
Daniel Schultz [Wed, 7 May 2025 07:00:05 +0000 (00:00 -0700)]
arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors

For every remote processor, set up dedicated memory regions and
associate the required mailbox channels. Allocate two memory areas
per remote core: one 1MB region for vring shared buffers, and
another for external memory used by the remote processor for its
resource table and trace buffer.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250507070008.1231611-2-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps
Daniel Schultz [Tue, 6 May 2025 11:41:34 +0000 (04:41 -0700)]
arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps

Rename 'main0_thermal_trip0' to a more descriptive name that
includes 'fan', as the current name is too generic for a fan control
trip point.

Move the fan to a new cooling map to avoid overwriting the passive
trip point used for CPU frequency throttling when this overlay is
enabled. Also, add the fan to the existing cooling map.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250506114134.3514899-2-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert
Daniel Schultz [Tue, 6 May 2025 11:41:33 +0000 (04:41 -0700)]
arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert

Enable throttling down the CPU frequency when an alert temperature
threshold (lower than the critical threshold) is reached.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250506114134.3514899-1-d.schultz@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
Prasanth Babu Mantena [Wed, 7 May 2025 05:07:01 +0000 (10:37 +0530)]
arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E

J721E SoM has MT25QU512AB Serial NOR flash connected to
OSPI1 controller. Enable ospi1 node in device tree.

Fixes: 73676c480b72 ("arm64: dts: ti: k3-j721e: Enable OSPI nodes at the board level")
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Link: https://lore.kernel.org/r/20250507050701.3007209-1-p-mantena@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j721s2: Add GPU node
Matt Coster [Mon, 28 Apr 2025 11:07:15 +0000 (12:07 +0100)]
arm64: dts: ti: k3-j721s2: Add GPU node

The J721S2 binding is based on the TI downstream binding in commit
54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
but with updated compatible strings.

The clock[2] and power[3] indices were verified from HTML docs, while
the interrupt index comes from the TRM[4] (appendix
"J721S2_Appendix_20241106_Public.xlsx", "Interrupts (inputs)",
"GPU_BXS464_WRAP0_GPU_SS_0_OS_IRQ_OUT_0").

[1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
[2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
[3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html
[4]: https://www.ti.com/lit/zip/spruj28 (revision E)

Reviewed-by: Randolph Sapp <rs@ti.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Link: https://lore.kernel.org/r/20250428-bxs-4-64-dts-v4-2-eddafb4ae19f@imgtec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62: New GPU binding details
Matt Coster [Mon, 28 Apr 2025 11:07:14 +0000 (12:07 +0100)]
arm64: dts: ti: k3-am62: New GPU binding details

Use the new compatible string and power domain name as introduced in
commit 2c01d9099859 ("dt-bindings: gpu: img: Future-proofing
enhancements").

Reviewed-by: Randolph Sapp <rs@ti.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Link: https://lore.kernel.org/r/20250428-bxs-4-64-dts-v4-1-eddafb4ae19f@imgtec.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62-main: Add PRUSS-M node
Kishon Vijay Abraham I [Wed, 30 Apr 2025 14:43:43 +0000 (09:43 -0500)]
arm64: dts: ti: k3-am62-main: Add PRUSS-M node

Add the DT node for the PRUSS-M processor subsystem that is present
on the K3 AM62x SoCs. The K3 AM62x family of SoC has one PRUSS-M
instance and it has two Programmable Real-Time Units (PRU0 and PRU1).

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
[ Judith: Fix pruss_iclk id for pruss_coreclk_mux ]
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Acked-by: Hari Nagalla <hnagalla@ti.com>
Link: https://lore.kernel.org/r/20250430144343.972234-1-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am64: Reserve timers used by MCU FW
Hari Nagalla [Fri, 2 May 2025 22:03:25 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am64: Reserve timers used by MCU FW

AM64x device has 4 R5F cores in the main domain. TI MCU firmware uses
main domain timers as tick timers in these firmwares. Hence keep them
as reserved in the Linux device tree.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-12-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP
Hari Nagalla [Fri, 2 May 2025 22:03:24 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP

The main rti4 watchdog timer is used by the C7x DSP, so reserve the
timer in the linux device tree.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-11-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP
Hari Nagalla [Fri, 2 May 2025 22:03:23 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP

C7x DSP uses main_timer2, so mark it as reserved in linux DT.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-10-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors
Hari Nagalla [Fri, 2 May 2025 22:03:22 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors

For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-9-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
Devarsh Thakkar [Fri, 2 May 2025 22:03:21 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors

For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-8-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
Devarsh Thakkar [Fri, 2 May 2025 22:03:20 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors

For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@ideasonboard.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-7-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a-main: Add C7xv device node
Jai Luthra [Fri, 2 May 2025 22:03:19 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a-main: Add C7xv device node

AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability.
This subsystem is intended for deep learning purposes. Define the
device node for C7xv DSP.

Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-6-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a-wakeup: Add R5F device node
Devarsh Thakkar [Fri, 2 May 2025 22:03:18 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a-wakeup: Add R5F device node

AM62A SoCs have a single R5F core in wakeup domain. This core is
also used as a device manager for the SoC.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-5-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node
Hari Nagalla [Fri, 2 May 2025 22:03:17 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node

AM62A SoCs have a single R5F core in the MCU voltage domain.
Add the R5FSS node with the child node for core0 in MCU voltage
domain .dtsi file.

Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62-wakeup: Add wakeup R5F node
Hari Nagalla [Fri, 2 May 2025 22:03:16 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62-wakeup: Add wakeup R5F node

AM62 SoC devices have a single core R5F processor in wakeup domain.
The R5F processor in wakeup domain is used as a device manager
for the SoC.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62: Add ATCM and BTCM cbass ranges
Judith Mendez [Fri, 2 May 2025 22:03:15 +0000 (17:03 -0500)]
arm64: dts: ti: k3-am62: Add ATCM and BTCM cbass ranges

Add cbass ranges for ATCM and BTCM on am62x device, without
these, remoteproc driver fails to probe and attach to the DM
r5 core and IPC communication is broken.

Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for TEVI-OV5640
Rishikesh Donadkar [Tue, 6 May 2025 04:52:25 +0000 (10:22 +0530)]
arm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for TEVI-OV5640

The device tree overlay for TEVI-OV5640 requires following voltage
supplies:

AVDD-supply: Analog voltage supply, 2.8 volts
DOVDD-supply: Digital I/O voltage supply, 1.8 volts
DVDD-supply: Digital core voltage supply, 3.3 volts

Add them in the overlay.

Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20250506045225.1246873-3-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for OV5640
Rishikesh Donadkar [Tue, 6 May 2025 04:52:24 +0000 (10:22 +0530)]
arm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for OV5640

The device tree overlay for OV5640 requires following voltage
supplies:

AVDD-supply: Analog voltage supply, 2.8 volts
DOVDD-supply: Digital I/O voltage supply, 1.8 volts
DVDD-supply: Digital core voltage supply, 1.5 volts

Add them in the overlay.

Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20250506045225.1246873-2-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62x: Add required voltage supplies for TEVI-OV5640
Rishikesh Donadkar [Fri, 2 May 2025 16:25:39 +0000 (21:55 +0530)]
arm64: dts: ti: k3-am62x: Add required voltage supplies for TEVI-OV5640

The device tree overlay for TEVI-OV5640 requires following voltage
supplies as mentioned in the power section [1]

AVDD-supply: Analog voltage supply, 2.8 volts
DOVDD-supply: Digital I/O voltage supply, 1.8 volts
DVDD-supply: Digital core voltage supply, 3.3 volts

Add them in the DT overlay.

Link: https://www.technexion.com/wp-content/uploads/2023/09/product-brief_tevi-ov5640.pdf
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20250502162539.322091-5-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62x: Add required voltage supplies for OV5640
Rishikesh Donadkar [Fri, 2 May 2025 16:25:38 +0000 (21:55 +0530)]
arm64: dts: ti: k3-am62x: Add required voltage supplies for OV5640

The device tree overlay for OV5640 requires following voltage
supplies as mentioned in the table 8-3 of the data-sheet [1].

AVDD-supply: Analog voltage supply, 2.8 volts
DOVDD-supply: Digital I/O voltage supply, 1.8 volts
DVDD-supply: Digital core voltage supply, 1.5 volts

Add them in the overlay.

Link: https://cdn.sparkfun.com/datasheets/Sensors/LightImaging/OV5640_datasheet.pdf
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Link: https://lore.kernel.org/r/20250502162539.322091-4-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62x: Add required voltage supplies for IMX219
Rishikesh Donadkar [Fri, 2 May 2025 16:25:37 +0000 (21:55 +0530)]
arm64: dts: ti: k3-am62x: Add required voltage supplies for IMX219

The device tree overlay for the IMX219 sensor requires three voltage
supplies to be defined: VANA (analog), VDIG (digital core), and VDDL
(digital I/O) [1].

Add the corresponding voltage supply definitions in the overlay so
that the same topography as dt-bindings is present in the DT overlay.

Link: https://datasheets.raspberrypi.com/camera/camera-module-2-schematics.pdf
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Link: https://lore.kernel.org/r/20250502162539.322091-3-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62p5-sk: Add regulator nodes for AM62P
Rishikesh Donadkar [Fri, 2 May 2025 16:25:36 +0000 (21:55 +0530)]
arm64: dts: ti: k3-am62p5-sk: Add regulator nodes for AM62P

Add regulator node for AM62P-SK

VCC_3V3_MAIN is the output of LM5141-Q1, and it serves as an input to
TPS22965DSGT which produces VCC_3V3_SYS [1]

VCC_3V3_SYS servers as vin-supply for peripherals like CSI [1].

Link: https://www.ti.com/lit/zip/sprr487
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Link: https://lore.kernel.org/r/20250502162539.322091-2-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am65-main: Add missing taps to sdhci0
Judith Mendez [Tue, 29 Apr 2025 17:30:08 +0000 (12:30 -0500)]
arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0

For am65x, add missing ITAPDLYSEL values for Default Speed and High
Speed SDR modes to sdhci0 node according to the device datasheet [0].

[0] https://www.ti.com/lit/gpn/am6548

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250429173009.33994-1-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to default
Judith Mendez [Tue, 29 Apr 2025 16:33:37 +0000 (11:33 -0500)]
arm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to default

Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
for eMMC. This change is necessary since DM is not implementing the
correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
not glich-free. As a preventative action, lets switch back to the defaults.

Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250429163337.15634-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default
Judith Mendez [Tue, 29 Apr 2025 16:33:36 +0000 (11:33 -0500)]
arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default

Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
for eMMC. This change is necessary since DM is not implementing the
correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
not glich-free. As a preventative action, lets switch back to the defaults.

Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250429163337.15634-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62-main: Set eMMC clock parent to default
Judith Mendez [Tue, 29 Apr 2025 16:33:35 +0000 (11:33 -0500)]
arm64: dts: ti: k3-am62-main: Set eMMC clock parent to default

Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
for eMMC. This change is necessary since DM is not implementing the
correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
not glich-free. As a preventative action, lets switch back to the defaults.

Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes")
Cc: stable@vger.kernel.org
Signed-off-by: Judith Mendez <jm@ti.com>
Acked-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250429163337.15634-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: am62p-verdin: Add ivy
Francesco Dolcini [Wed, 30 Apr 2025 10:28:15 +0000 (12:28 +0200)]
arm64: dts: ti: am62p-verdin: Add ivy

Add support for Verdin AM62P mated with Verdin Ivy carrier board.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/ivy-carrier-board
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250430102815.149162-7-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: am62p-verdin: Add yavia
Francesco Dolcini [Wed, 30 Apr 2025 10:28:14 +0000 (12:28 +0200)]
arm64: dts: ti: am62p-verdin: Add yavia

Add support for Verdin AM62P mated with Verdin Yavia carrier board.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/yavia
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250430102815.149162-6-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: am62p-verdin: Add mallow
Francesco Dolcini [Wed, 30 Apr 2025 10:28:13 +0000 (12:28 +0200)]
arm64: dts: ti: am62p-verdin: Add mallow

Add support for Verdin AM62P mated with Verdin Mallow carrier board.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/mallow-carrier-board
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250430102815.149162-5-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: am62p-verdin: Add dahlia
Francesco Dolcini [Wed, 30 Apr 2025 10:28:12 +0000 (12:28 +0200)]
arm64: dts: ti: am62p-verdin: Add dahlia

Add support for Verdin AM62P mated with Verdin Dahlia carrier board.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250430102815.149162-4-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: Add Toradex Verdin AM62P
Francesco Dolcini [Wed, 30 Apr 2025 10:28:11 +0000 (12:28 +0200)]
arm64: dts: ti: Add Toradex Verdin AM62P

Add support for Toradex Verdin AM62P computer on module which can be
used on different carrier boards and for the Toradex Verdin Development
Board carrier board.

The module consists of an TI AM62P family SoC, a TPS65219 PMIC, a
Gigabit Ethernet PHY, up to 8GB of LPDDR4 RAM, an eMMC, a TLA2024 ADC,
an I2C EEPROM, an RX8130 RTC, plus an optional Bluetooth/Wi-Fi module.

Anything that is not self-contained on the module is disabled by
default.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250430102815.149162-3-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agodt-bindings: arm: ti: Add Toradex Verdin AM62P
Francesco Dolcini [Wed, 30 Apr 2025 10:28:10 +0000 (12:28 +0200)]
dt-bindings: arm: ti: Add Toradex Verdin AM62P

Add toradex,verdin-am62p for Toradex Verdin AM62 SoM, its nonwifi and
wifi variants, and the Toradex carrier board they may be mated in.

Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62p
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250430102815.149162-2-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable ACSPCIE0 output for PCIe1
Siddharth Vadapalli [Tue, 22 Apr 2025 12:32:18 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable ACSPCIE0 output for PCIe1

The PCIe reference clock required by the PCIe Endpoints connected to the
PCIe connector corresponding to the PCIe1 instance of PCIe on J784S4-EVM
and J742S2-EVM is driven by the ACSPCIE0 module. Add the device-tree
support for enabling the same.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422123218.3788223-3-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE0 node
Siddharth Vadapalli [Tue, 22 Apr 2025 12:32:17 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE0 node

The ACSPCIE0 module on TI's J784S4 SoC is capable of driving the
reference clock required by the PCIe Endpoint device. It is an
alternative to on-board and external reference clock generators.
Add the device-tree node for the same.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422123218.3788223-2-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j784s4-j742s2-main-common: Switch to 64-bit address space for...
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:42 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j784s4-j742s2-main-common: Switch to 64-bit address space for PCIe0 and PCIe1

The PCIe0 and PCIe1 instances of PCIe in J742S2 and J784S4 SoCs support:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-8-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j722s-main: Switch to 64-bit address space for PCIe0
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:41 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j722s-main: Switch to 64-bit address space for PCIe0

The PCIe0 instance of PCIe in J722S SoC supports:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-7-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j721s2-main: Switch to 64-bit address space for PCIe1
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:40 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j721s2-main: Switch to 64-bit address space for PCIe1

The PCIe1 instance of PCIe in J721S2 SoC supports:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-6-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j721e-main: Switch to 64-bit address space for PCIe0 and PCIe1
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:39 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j721e-main: Switch to 64-bit address space for PCIe0 and PCIe1

The PCIe0 and PCIe1 instances of PCIe in J721E SoC support:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-5-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j721e: Add ranges for PCIe0 DAT1 and PCIe1 DAT1
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:38 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j721e: Add ranges for PCIe0 DAT1 and PCIe1 DAT1

The PCIe0 DAT1 and PCIe1 DAT1 are 4 GB address regions in the 64-bit
address space of the respective PCIe Controllers. Hence, update the
ranges to include them.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-4-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-j7200-main: Switch to 64-bit address space for PCIe1
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:37 +0000 (17:30 +0530)]
arm64: dts: ti: k3-j7200-main: Switch to 64-bit address space for PCIe1

The PCIe0 instance of PCIe in J7200 SoC supports:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-3-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am64-main: Switch to 64-bit address space for PCIe0
Siddharth Vadapalli [Tue, 22 Apr 2025 12:00:36 +0000 (17:30 +0530)]
arm64: dts: ti: k3-am64-main: Switch to 64-bit address space for PCIe0

The PCIe0 instance of PCIe in AM64 SoC supports:
1. 128 MB address region in the 32-bit address space
2. 4 GB address region in the 64-bit address space

The default configuration is that of a 128 MB address region in the
32-bit address space. While this might be sufficient for most use-cases,
it is insufficient for supporting use-cases which require larger address
spaces. Therefore, switch to using the 64-bit address space with a 4 GB
address region.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250422120042.3746004-2-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am6*: Remove disable-wp for eMMC
Judith Mendez [Tue, 29 Apr 2025 15:14:54 +0000 (10:14 -0500)]
arm64: dts: ti: k3-am6*: Remove disable-wp for eMMC

Remove disable-wp flag for eMMC nodes since this flag is
only applicable to SD according to the binding doc
(mmc/mmc-controller-common.yaml).

For eMMC, this flag should be ignored but lets remove
anyways to cleanup sdhci nodes.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250429151454.4160506-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am62*: Add non-removable flag for eMMC
Judith Mendez [Tue, 29 Apr 2025 15:14:53 +0000 (10:14 -0500)]
arm64: dts: ti: k3-am62*: Add non-removable flag for eMMC

EMMC device is non-removable so add 'non-removable' DT
property to avoid having to redetect the eMMC after
suspend/resume.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250429151454.4160506-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2 months agoarm64: dts: ti: k3-am6*: Add boot phase flag to support MMC boot
Judith Mendez [Tue, 29 Apr 2025 15:14:52 +0000 (10:14 -0500)]
arm64: dts: ti: k3-am6*: Add boot phase flag to support MMC boot

The bootph-all flag was introduced in dt-schema
(dtschema/schemas/bootph.yaml) to define node usage across
different boot phases.

For eMMC and SD boot modes, voltage regulator nodes, io-expander
nodes, gpio nodes, and MMC nodes need to be present in all boot
stages, so add missing bootph-all phase flag to these nodes to
support SD boot and eMMC boot.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250429151454.4160506-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am625-sk: Enable PWM
Judith Mendez [Tue, 22 Apr 2025 00:08:51 +0000 (19:08 -0500)]
arm64: dts: ti: k3-am625-sk: Enable PWM

PWM signals can be routed to the user expansion header on am625
SK and am62 lp sk. Enable eCAP0, eCAP1, eHRPWM1, and route the
output PWM signals to pins on J3 header.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62a7-sk: Enable PWM
Judith Mendez [Tue, 22 Apr 2025 00:08:50 +0000 (19:08 -0500)]
arm64: dts: ti: k3-am62a7-sk: Enable PWM

PWM signals can be routed to the user expansion header on am62a7
SK. Enable eCAP0, eCAP1, eHRPWM1, and route the output PWM signals
to pins on J3 header.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62p5-sk: Enable PWM
Judith Mendez [Tue, 22 Apr 2025 00:08:49 +0000 (19:08 -0500)]
arm64: dts: ti: k3-am62p5-sk: Enable PWM

PWM signals can be routed to the user expansion header on am62p5
SK. Enable eCAP0, eCAP1, eHRPWM0, eHRPWM1 and route the output PWM
signals to pins on J4 header.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x
Dominik Haller [Wed, 23 Apr 2025 13:36:34 +0000 (15:36 +0200)]
arm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x

The phyCORE-AM68x/TDA4x [1] is a SoM (System on Module) featuring TI's
AM68x/TDA4x SoC. It can be used in combination with different carrier
boards. This module can come with different sizes and models for DDR,
eMMC, SPI NOR Flash and various SoCs from the AM68x/TDA4x (J721S2) family.

A reference carrier board design, called phyBOARD-Izar is used for the
phyCORE-AM68x/TDA4x development kit [2].

Supported features:
* Debug UART
* 2x SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* 2x I2C GPIO Expander
* LEDs
* USB 5 Gbit/s
* PCIe

For more details see the product pages for the SoM and the
development kit:

[1] https://www.phytec.eu/en/produkte/system-on-modules/phycore-am68x-tda4x/
[2] https://www.phytec.eu/en/produkte/development-kits/phyboard-izar/

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250423133635.29897-2-d.haller@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agodt-bindings: arm: ti: Add bindings for PHYTEC AM68x based hardware
Dominik Haller [Wed, 23 Apr 2025 13:36:33 +0000 (15:36 +0200)]
dt-bindings: arm: ti: Add bindings for PHYTEC AM68x based hardware

Add devicetree bindings for the AM68x based phyCORE-AM68x/TDA4x SoM
and the phyBOARD-Izar carrier board.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250423133635.29897-1-d.haller@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j784s4-j742s2-main-common: Fix length of serdes_ln_ctrl
Siddharth Vadapalli [Wed, 23 Apr 2025 15:16:12 +0000 (20:46 +0530)]
arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix length of serdes_ln_ctrl

Commit under Fixes corrected the "mux-reg-masks" property but did not
update the "length" field of the "reg" property to account for the
newly added register offsets which extend the region. Fix this.

Fixes: 38e7f9092efb ("arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix serdes_ln_ctrl reg-masks")
Cc: stable@vger.kernel.org
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250423151612.48848-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: am65x: Add missing power-supply for Rocktech-rk101 panel
Andrew Davis [Mon, 21 Apr 2025 21:46:20 +0000 (16:46 -0500)]
arm64: dts: ti: am65x: Add missing power-supply for Rocktech-rk101 panel

Add the 5v0 supply that is provided over the display panel cable and
used by the LCD. This is required by "simple panels" or we get the
following warning from DTBS_CHECK:

k3-am654-gp-evm.dtb: display0: 'power-supply' is a required property

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250421214620.3770172-4-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am65-main: Add system controller compatible
Jan Kiszka [Mon, 21 Apr 2025 21:46:19 +0000 (16:46 -0500)]
arm64: dts: ti: k3-am65-main: Add system controller compatible

Now that the TI K3 AM654 system controller bindings also cover the
usage in the main domain, add its compatible to address dtbs_check
complains:

  k3-am654-base-board.dtb: scm-conf@100000: compatible: ['syscon', 'simple-mfd'] is too short

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250421214620.3770172-3-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agodt-bindings: mfd: ti,j721e-system-controller: Add compatible string for AM654
Andrew Davis [Mon, 21 Apr 2025 21:46:18 +0000 (16:46 -0500)]
dt-bindings: mfd: ti,j721e-system-controller: Add compatible string for AM654

Add the child nodes that can be found under this node. Then as done
for other similar devices (J7200 and J721s2) add support for the AM654
system controller to this binding.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250421214620.3770172-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721e-common-proc-board-infotainment: Update to comply with device...
Jayesh Choudhary [Thu, 24 Apr 2025 08:03:28 +0000 (13:33 +0530)]
arm64: dts: ti: k3-j721e-common-proc-board-infotainment: Update to comply with device tree schema

Fix hdmi-connector and tfp bridge node as per the bindings,
- Remove 'digital' property which is required for DVI connector not HDMI
- Add 'ti,deskew' property which is a required property
- Fix ports property for tfp410 bridge
- Change node names appropriately

Redefine the ports for dss and for k3-j721e-common-proc-board.dts, add
reg property for the port (@0) to get rid of dtbs_check warnings in
infotainment overlay when ports for dss are re-defined.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250424080328.57671-1-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j784s4-j742s2-evm: Add overlay to enable USB0 Type-A
Siddharth Vadapalli [Wed, 9 Apr 2025 10:08:53 +0000 (15:38 +0530)]
arm64: dts: ti: k3-j784s4-j742s2-evm: Add overlay to enable USB0 Type-A

The USB0 instance of the USB controller on both the J742S2 EVM and the
J784S4 EVM supports a single USB interface at a time among the following:
1. USB3.1 Gen1 Type C interface
2. Two USB2.0 Type A interfaces via an on-board USB Hub.

By default, the USB3.1 Gen1 Type C interface is supported on both of the
EVMs. Enable the USB2.0 Type A interface by configuring the USB2.0_MUX_SEL
mux. Additionally, set the Dual-Role Mode to Host since a Type-A interface
is only associated with the Host Mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250409100853.4179934-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am67a-beagley-ai: Add bootph for main_gpio1
Nishanth Menon [Fri, 11 Apr 2025 20:39:50 +0000 (15:39 -0500)]
arm64: dts: ti: k3-am67a-beagley-ai: Add bootph for main_gpio1

main_gpio1 controls the voltage for the SDcard from 3.3v to 1.8v.
This is required for proper operation of SDcard through various boot
stages.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250411203950.2859356-1-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: Add k3-am62-pocketbeagle2
Robert Nelson [Tue, 15 Apr 2025 22:59:40 +0000 (17:59 -0500)]
arm64: dts: ti: Add k3-am62-pocketbeagle2

BeagleBoard.org PocketBeagle 2 is an upgraded version of the popular
PocketBeagle. It is based on Texas Instruments AM6232 or AM6254 SoC.
Its dual or quad A53 cores can provide higher performance than classic
PocketBeagle. The new design comes with pre-soldered headers, a
3-pin JST-SH 1.00mm UART debug port, a USB-C port, Texas Instruments
MSPM0L1105 Cortex-M0+ MCU for ADC, 512MB RAM, and a LiPo Battery
charger.

MSPM0L1105 firmware source:
https://openbeagle.org/pocketbeagle/mspm0-adc-eeprom
* EEPROM 24c32 emulation
* ADC ad7291 emulation

https://www.beagleboard.org/boards/pocketbeagle-2
https://openbeagle.org/pocketbeagle/pocketbeagle-2

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20250415225940.3899486-2-robertcnelson@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agodt-bindings: arm: ti: Add PocketBeagle2
Robert Nelson [Tue, 15 Apr 2025 22:59:39 +0000 (17:59 -0500)]
dt-bindings: arm: ti: Add PocketBeagle2

This board is based on ti,am625 family using the am6232 and am6254
variations.

https://www.beagleboard.org/boards/pocketbeagle-2
https://openbeagle.org/pocketbeagle/pocketbeagle-2

Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250415225940.3899486-1-robertcnelson@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am625-verdin: Add EEPROM compatible fallback
Francesco Dolcini [Tue, 8 Apr 2025 20:26:55 +0000 (22:26 +0200)]
arm64: dts: ti: k3-am625-verdin: Add EEPROM compatible fallback

According to the AT24 EEPROM bindings the compatible string should
contain first the actual manufacturer, and second the corresponding
atmel model.

Add the atmel compatible fallback accordingly.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20250408202655.6329-1-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62p-j722s: Add rng node
Michael Walle [Tue, 1 Apr 2025 08:32:46 +0000 (10:32 +0200)]
arm64: dts: ti: k3-am62p-j722s: Add rng node

Add the node for the random number generator inside the crypto module.
Marked reserved since the default usage is with the RNG node being
controlled by OP-TEE.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250401083246.3228964-1-mwalle@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am64: Add PCIe ctrl node to main_conf region
Andrew Davis [Wed, 2 Apr 2025 11:32:01 +0000 (17:02 +0530)]
arm64: dts: ti: k3-am64: Add PCIe ctrl node to main_conf region

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe node.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Add changes to k3-am642-evm-pcie0-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250402113201.151195-6-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm_conf region
Andrew Davis [Wed, 2 Apr 2025 11:32:00 +0000 (17:02 +0530)]
arm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm_conf region

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe node.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Add changes to k3-am68-sk-base-board-pcie1-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250402113201.151195-5-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j7200: Add PCIe ctrl node to scm_conf region
Andrew Davis [Wed, 2 Apr 2025 11:31:59 +0000 (17:01 +0530)]
arm64: dts: ti: k3-j7200: Add PCIe ctrl node to scm_conf region

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe node.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Add changes to k3-j7200-evm-pcie1-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250402113201.151195-4-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region
Andrew Davis [Wed, 2 Apr 2025 11:31:58 +0000 (17:01 +0530)]
arm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe nodes.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Add changes to k3-j721e-evm-pcie1-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250402113201.151195-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agodt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property
Andrew Davis [Wed, 2 Apr 2025 11:31:57 +0000 (17:01 +0530)]
dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property

Add a pattern property for pcie-ctrl which can be part of this controller.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Change description and add example]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250402113201.151195-2-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:28 +0000 (16:43 +0530)]
arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay

The OV5640 device tree overlay incorrectly defined an I2C switch
instead of an I2C mux. According to the DT bindings, the correct
terminology and node definition should use "i2c-mux" instead of
"i2c-switch". Hence, update the same to avoid dtbs_check warnings.

Fixes: 635ed9715194 ("arm64: dts: ti: k3-am62x: Add overlays for OV5640")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
Link: https://lore.kernel.org/r/20250415111328.3847502-8-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:27 +0000 (16:43 +0530)]
arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay

The IMX219 device tree overlay incorrectly defined an I2C switch
instead of an I2C mux. According to the DT bindings, the correct
terminology and node definition should use "i2c-mux" instead of
"i2c-switch". Hence, update the same to avoid dtbs_check warnings.

Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
Link: https://lore.kernel.org/r/20250415111328.3847502-7-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:26 +0000 (16:43 +0530)]
arm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay

The IMX219 sensor device tree bindings do not include a clock-names
property. Remove the incorrectly added clock-names entry to avoid
dtbs_check warnings.

Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
Link: https://lore.kernel.org/r/20250415111328.3847502-6-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:25 +0000 (16:43 +0530)]
arm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219

The device tree overlay for the IMX219 sensor requires three voltage
supplies to be defined: VANA (analog), VDIG (digital core), and VDDL
(digital I/O). Add the corresponding voltage supply definitions to
avoid dtbs_check warnings.

Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Link: https://lore.kernel.org/r/20250415111328.3847502-5-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:24 +0000 (16:43 +0530)]
arm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay

The IMX219 sensor device tree bindings do not include a clock-names
property. Remove the incorrectly added clock-names entry to avoid
dtbs_check warnings.

Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
Link: https://lore.kernel.org/r/20250415111328.3847502-4-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-am68-sk: Fix regulator hierarchy
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:23 +0000 (16:43 +0530)]
arm64: dts: ti: k3-am68-sk: Fix regulator hierarchy

Update the vin-supply of the TLV71033 regulator from LM5141 (vsys_3v3)
to LM61460 (vsys_5v0) to match the schematics. Add a fixed regulator
node for the LM61460 5V supply to support this change.

AM68-SK schematics: https://www.ti.com/lit/zip/sprr463

Fixes: a266c180b398 ("arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250415111328.3847502-3-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators
Yemike Abhilash Chandra [Tue, 15 Apr 2025 11:13:22 +0000 (16:43 +0530)]
arm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators

Add device tree nodes for two power regulators on the J721E SK board.
vsys_5v0: A fixed regulator representing the 5V supply output from the
LM61460 and vdd_sd_dv: A GPIO-controlled TLV71033 regulator.

J721E-SK schematics: https://www.ti.com/lit/zip/sprr438

Fixes: 1bfda92a3a36 ("arm64: dts: ti: Add support for J721E SK")
Cc: stable@vger.kernel.org
Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250415111328.3847502-2-y-abhilashchandra@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j722s-evm: Drop redundant status within serdes0/serdes1
Siddharth Vadapalli [Thu, 17 Apr 2025 12:32:46 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j722s-evm: Drop redundant status within serdes0/serdes1

Since serdes0 and serdes1 are now enabled by default within the SoC
file, it is no longer necessary to enable them in the board file.

Hence, remove the redundant 'status = "okay"' within the serdes0 and
serdes1 device-tree nodes.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250417123246.2733923-5-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j722s-main: Don't disable serdes0 and serdes1
Siddharth Vadapalli [Thu, 17 Apr 2025 12:32:45 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j722s-main: Don't disable serdes0 and serdes1

Since serdes0 and serdes1 are the child nodes of serdes_wiz0 and
serdes_wiz1 respectively, and, given that serdes_wiz0 and serdes_wiz1
are already disabled, it is not necessary to disable serdes0 and serdes1.

Moreover, having serdes_wiz0/serdes_wiz1 enabled and serdes0/serdes1
disabled is not a working configuration.

Hence, remove 'status = "disabled"' from the serdes0 and serdes1 nodes.

Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250417123246.2733923-4-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1"
Siddharth Vadapalli [Thu, 17 Apr 2025 12:32:44 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1"

Since "serdes0" and "serdes1" which are the sub-nodes of "serdes_wiz0"
and "serdes_wiz1" respectively, have been disabled in the SoC file already,
and, given that these sub-nodes will only be enabled in a board file if the
board utilizes any of the SERDES instances and the peripherals bound to
them, we end up in a situation where the board file doesn't explicitly
disable "serdes_wiz0" and "serdes_wiz1". As a consequence of this, the
following errors show up when booting Linux:

  wiz bus@f0000:phy@f000000: probe with driver wiz failed with error -12
  ...
  wiz bus@f0000:phy@f010000: probe with driver wiz failed with error -12

To not only fix the above, but also, in order to follow the convention of
disabling device-tree nodes in the SoC file and enabling them in the board
files for those boards which require them, disable "serdes_wiz0" and
"serdes_wiz1" device-tree nodes.

Fixes: 628e0a0118e6 ("arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support")
Cc: stable@vger.kernel.org
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250417123246.2733923-3-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j722s-evm: Enable "serdes_wiz0" and "serdes_wiz1"
Siddharth Vadapalli [Thu, 17 Apr 2025 12:32:43 +0000 (18:02 +0530)]
arm64: dts: ti: k3-j722s-evm: Enable "serdes_wiz0" and "serdes_wiz1"

In preparation for disabling "serdes_wiz0" and "serdes_wiz1" device-tree
nodes in the SoC file, enable them in the board file. The motivation for
this change is that of following the existing convention of disabling
nodes in the SoC file and only enabling the required ones in the board
file.

Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM")
Cc: stable@vger.kernel.org
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250417123246.2733923-2-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoarm64: dts: ti: k3-j784s4-evm-usxgmii-exp1-exp2: drop pinctrl-names
Siddharth Vadapalli [Fri, 11 Apr 2025 06:14:25 +0000 (11:44 +0530)]
arm64: dts: ti: k3-j784s4-evm-usxgmii-exp1-exp2: drop pinctrl-names

The "pinctrl-names" property is not required since it doesn't have an
associated pinctrl configuration. Hence, drop it.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250411061425.640718-1-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
3 months agoLinux 6.15-rc1
Linus Torvalds [Sun, 6 Apr 2025 20:11:33 +0000 (13:11 -0700)]
Linux 6.15-rc1

3 months agotools/include: make uapi/linux/types.h usable from assembly
Thomas Weißschuh [Wed, 2 Apr 2025 20:21:57 +0000 (21:21 +0100)]
tools/include: make uapi/linux/types.h usable from assembly

The "real" linux/types.h UAPI header gracefully degrades to a NOOP when
included from assembly code.

Mirror this behaviour in the tools/ variant.

Test for __ASSEMBLER__ over __ASSEMBLY__ as the former is provided by the
toolchain automatically.

Reported-by: Mark Brown <broonie@kernel.org>
Closes: https://lore.kernel.org/lkml/af553c62-ca2f-4956-932c-dd6e3a126f58@sirena.org.uk/
Fixes: c9fbaa879508 ("selftests: vDSO: parse_vdso: Use UAPI headers instead of libc headers")
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Link: https://patch.msgid.link/20250321-uapi-consistency-v1-1-439070118dc0@linutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agoMerge tag 'turbostat-2025.05.06' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 6 Apr 2025 19:32:43 +0000 (12:32 -0700)]
Merge tag 'turbostat-2025.05.06' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux

Pull turbostat updates from Len Brown:

 - support up to 8192 processors

 - add cpuidle governor debug telemetry, disabled by default

 - update default output to exclude cpuidle invocation counts

 - bug fixes

* tag 'turbostat-2025.05.06' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
  tools/power turbostat: v2025.05.06
  tools/power turbostat: disable "cpuidle" invocation counters, by default
  tools/power turbostat: re-factor sysfs code
  tools/power turbostat: Restore GFX sysfs fflush() call
  tools/power turbostat: Document GNR UncMHz domain convention
  tools/power turbostat: report CoreThr per measurement interval
  tools/power turbostat: Increase CPU_SUBSET_MAXCPUS to 8192
  tools/power turbostat: Add idle governor statistics reporting
  tools/power turbostat: Fix names matching
  tools/power turbostat: Allow Zero return value for some RAPL registers
  tools/power turbostat: Clustered Uncore MHz counters should honor show/hide options

3 months agoMerge tag 'soundwire-6.15-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Apr 2025 19:04:53 +0000 (12:04 -0700)]
Merge tag 'soundwire-6.15-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire

Pull soundwire fix from Vinod Koul:

 - add missing config symbol CONFIG_SND_HDA_EXT_CORE required for asoc
   driver CONFIG_SND_SOF_SOF_HDA_SDW_BPT

* tag 'soundwire-6.15-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire:
  ASoC: SOF: Intel: Let SND_SOF_SOF_HDA_SDW_BPT select SND_HDA_EXT_CORE

3 months agotools/power turbostat: v2025.05.06
Len Brown [Sun, 6 Apr 2025 18:49:20 +0000 (14:49 -0400)]
tools/power turbostat: v2025.05.06

Support up to 8192 processors
Add cpuidle governor debug telemetry, disabled by default
Update default output to exclude cpuidle invocation counts
Bug fixes

Signed-off-by: Len Brown <len.brown@intel.com>
3 months agotools/power turbostat: disable "cpuidle" invocation counters, by default
Len Brown [Sun, 6 Apr 2025 18:29:57 +0000 (14:29 -0400)]
tools/power turbostat: disable "cpuidle" invocation counters, by default

Create "pct_idle" counter group, the sofware notion of residency
so it can now be singled out, independent of other counter groups.

Create "cpuidle" group, the cpuidle invocation counts.
Disable "cpuidle", by default.

Create "swidle" = "cpuidle" + "pct_idle".
Undocument "sysfs", the old name for "swidle", but keep it working
for backwards compatibilty.

Create "hwidle", all the HW idle counters

Modify "idle", enabled by default
"idle" = "hwidle" + "pct_idle" (and now excludes "cpuidle")

Signed-off-by: Len Brown <len.brown@intel.com>
3 months agoMerge tag 'perf-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 6 Apr 2025 17:48:12 +0000 (10:48 -0700)]
Merge tag 'perf-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf event fix from Ingo Molnar:
 "Fix a perf events time accounting bug"

* tag 'perf-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/core: Fix child_total_time_enabled accounting bug at task exit

3 months agoMerge tag 'sched-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Apr 2025 17:44:58 +0000 (10:44 -0700)]
Merge tag 'sched-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull scheduler fixes from Ingo Molnar:

 - Fix a nonsensical Kconfig combination

 - Remove an unnecessary rseq-notification

* tag 'sched-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  rseq: Eliminate useless task_work on execve
  sched/isolation: Make CONFIG_CPU_ISOLATION depend on CONFIG_SMP

3 months agoDisable SLUB_TINY for build testing
Linus Torvalds [Sun, 6 Apr 2025 17:00:04 +0000 (10:00 -0700)]
Disable SLUB_TINY for build testing

... and don't error out so hard on missing module descriptions.

Before commit 6c6c1fc09de3 ("modpost: require a MODULE_DESCRIPTION()")
we used to warn about missing module descriptions, but only when
building with extra warnigns (ie 'W=1').

After that commit the warning became an unconditional hard error.

And it turns out not all modules have been converted despite the claims
to the contrary.  As reported by Damian Tometzki, the slub KUnit test
didn't have a module description, and apparently nobody ever really
noticed.

The reason nobody noticed seems to be that the slub KUnit tests get
disabled by SLUB_TINY, which also ends up disabling a lot of other code,
both in tests and in slub itself.  And so anybody doing full build tests
didn't actually see this failre.

So let's disable SLUB_TINY for build-only tests, since it clearly ends
up limiting build coverage.  Also turn the missing module descriptions
error back into a warning, but let's keep it around for non-'W=1'
builds.

Reported-by: Damian Tometzki <damian@riscv-rocks.de>
Link: https://lore.kernel.org/all/01070196099fd059-e8463438-7b1b-4ec8-816d-173874be9966-000000@eu-central-1.amazonses.com/
Cc: Masahiro Yamada <masahiroy@kernel.org>
Cc: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
Fixes: 6c6c1fc09de3 ("modpost: require a MODULE_DESCRIPTION()")
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
3 months agotools/power turbostat: re-factor sysfs code
Len Brown [Sun, 6 Apr 2025 16:53:18 +0000 (12:53 -0400)]
tools/power turbostat: re-factor sysfs code

Probe cpuidle "sysfs" residency and counts separately,
since soon we will make one disabled on, and the
other disabled off.

Clarify that some BIC (build-in-counters) are actually "groups".
since we're about to re-name some of those groups.

no functional change.

Signed-off-by: Len Brown <len.brown@intel.com>
3 months agotools/power turbostat: Restore GFX sysfs fflush() call
Zhang Rui [Wed, 19 Mar 2025 00:53:07 +0000 (08:53 +0800)]
tools/power turbostat: Restore GFX sysfs fflush() call

Do fflush() to discard the buffered data, before each read of the
graphics sysfs knobs.

Fixes: ba99a4fc8c24 ("tools/power turbostat: Remove unnecessary fflush() call")
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
3 months agotools/power turbostat: Document GNR UncMHz domain convention
Len Brown [Sun, 6 Apr 2025 16:23:22 +0000 (12:23 -0400)]
tools/power turbostat: Document GNR UncMHz domain convention

Document that on Intel Granite Rapids Systems,
Uncore domains 0-2 are CPU domains, and
uncore domains 3-4 are IO domains.

Signed-off-by: Len Brown <len.brown@intel.com>
3 months agotools/power turbostat: report CoreThr per measurement interval
Len Brown [Sun, 6 Apr 2025 15:18:39 +0000 (11:18 -0400)]
tools/power turbostat: report CoreThr per measurement interval

The CoreThr column displays total thermal throttling events
since boot time.

Change it to report events during the measurement interval.

This is more useful for showing a user the current conditions.
Total events since boot time are still available to the user via
/sys/devices/system/cpu/cpu*/thermal_throttle/*

Document CoreThr on turbostat.8

Fixes: eae97e053fe30 ("turbostat: Support thermal throttle count print")
Reported-by: Arjan van de Ven <arjan@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Cc: Chen Yu <yu.c.chen@intel.com>
3 months agotools/power turbostat: Increase CPU_SUBSET_MAXCPUS to 8192
Justin Ernst [Wed, 19 Mar 2025 20:27:31 +0000 (15:27 -0500)]
tools/power turbostat: Increase CPU_SUBSET_MAXCPUS to 8192

On systems with >= 1024 cpus (in my case 1152), turbostat fails with the error output:
"turbostat: /sys/fs/cgroup/cpuset.cpus.effective: cpu str malformat 0-1151"

A similar error appears with the use of turbostat --cpu when the inputted cpu
range contains a cpu number >= 1024:
# turbostat -c 1100-1151
"--cpu 1100-1151" malformed
...

Both errors are caused by parse_cpu_str() reaching its limit of CPU_SUBSET_MAXCPUS.

It's a good idea to limit the maximum cpu number being parsed, but 1024 is too low.
For a small increase in compute and allocated memory, increasing CPU_SUBSET_MAXCPUS
brings support for parsing cpu numbers >= 1024.

Increase CPU_SUBSET_MAXCPUS to 8192, a common setting for CONFIG_NR_CPUS on x86_64.

Signed-off-by: Justin Ernst <justin.ernst@hpe.com>
Signed-off-by: Len Brown <len.brown@intel.com>
3 months agoMerge tag 'timers-cleanups-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Apr 2025 15:35:37 +0000 (08:35 -0700)]
Merge tag 'timers-cleanups-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer cleanups from Thomas Gleixner:
 "A set of final cleanups for the timer subsystem:

   - Convert all del_timer[_sync]() instances over to the new
     timer_delete[_sync]() API and remove the legacy wrappers.

     Conversion was done with coccinelle plus some manual fixups as
     coccinelle chokes on scoped_guard().

   - The final cleanup of the hrtimer_init() to hrtimer_setup()
     conversion.

     This has been delayed to the end of the merge window, so that all
     patches which have been merged through other trees are in mainline
     and all new users are catched.

  Doing this right before rc1 ensures that new code which is merged post
  rc1 is not introducing new instances of the original functionality"

* tag 'timers-cleanups-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tracing/timers: Rename the hrtimer_init event to hrtimer_setup
  hrtimers: Rename debug_init_on_stack() to debug_setup_on_stack()
  hrtimers: Rename debug_init() to debug_setup()
  hrtimers: Rename __hrtimer_init_sleeper() to __hrtimer_setup_sleeper()
  hrtimers: Remove unnecessary NULL check in hrtimer_start_range_ns()
  hrtimers: Make callback function pointer private
  hrtimers: Merge __hrtimer_init() into __hrtimer_setup()
  hrtimers: Switch to use __htimer_setup()
  hrtimers: Delete hrtimer_init()
  treewide: Convert new and leftover hrtimer_init() users
  treewide: Switch/rename to timer_delete[_sync]()

3 months agoMerge tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds [Sun, 6 Apr 2025 15:17:43 +0000 (08:17 -0700)]
Merge tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull more irq updates from Thomas Gleixner:
 "A set of updates for the interrupt subsystem:

   - A treewide cleanup for the irq_domain code, which makes the naming
     consistent and gets rid of the original oddity of naming domains
     'host'.

     This is a trivial mechanical change and is done late to ensure that
     all instances have been catched and new code merged post rc1 wont
     reintroduce new instances.

   - A trivial consistency fix in the migration code

     The recent introduction of irq_force_complete_move() in the core
     code, causes a problem for the nostalgia crowd who maintains ia64
     out of tree.

     The code assumes that hierarchical interrupt domains are enabled
     and dereferences irq_data::parent_data unconditionally. That works
     in mainline because both architectures which enable that code have
     hierarchical domains enabled. Though it breaks the ia64 build,
     which enables the functionality, but does not have hierarchical
     domains.

     While it's not really a problem for mainline today, this
     unconditional dereference is inconsistent and trivially fixable by
     using the existing helper function irqd_get_parent_data(), which
     has the appropriate #ifdeffery in place"

* tag 'irq-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  genirq/migration: Use irqd_get_parent_data() in irq_force_complete_move()
  irqdomain: Stop using 'host' for domain
  irqdomain: Rename irq_get_default_host() to irq_get_default_domain()
  irqdomain: Rename irq_set_default_host() to irq_set_default_domain()

3 months agoMerge tag 'timers-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 6 Apr 2025 15:13:16 +0000 (08:13 -0700)]
Merge tag 'timers-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fix from Thomas Gleixner:
 "A revert to fix a adjtimex() regression:

  The recent change to prevent that time goes backwards for the coarse
  time getters due to immediate multiplier adjustments via adjtimex(),
  changed the way how the timekeeping core treats that.

  That change result in a regression on the adjtimex() side, which is
  user space visible:

   1) The forwarding of the base time moves the update out of the
      original period and establishes a new one. That's changing the
      behaviour of the [PF]LL control, which user space expects to be
      applied periodically.

   2) The clearing of the accumulated NTP error due to #1, changes the
      behaviour as well.

  An attempt to delay the multiplier/frequency update to the next tick
  did not solve the problem as userspace expects that the multiplier or
  frequency updates are in effect, when the syscall returns.

  There is a different solution for the coarse time problem available,
  so revert the offending commit to restore the existing adjtimex()
  behaviour"

* tag 'timers-urgent-2025-04-06' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  Revert "timekeeping: Fix possible inconsistencies in _COARSE clockids"

3 months agoMerge tag 'sh-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubi...
Linus Torvalds [Sun, 6 Apr 2025 15:10:45 +0000 (08:10 -0700)]
Merge tag 'sh-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux

Pull sh updates from John Paul Adrian Glaubitz:
 "One important fix and one small configuration update.

  The first patch by Artur Rojek fixes an issue with the J2 firmware
  loader not being able to find the location of the device tree blob due
  to insufficient alignment of the .bss section which rendered J2 boards
  unbootable.

  The second patch by Johan Korsnes updates the defconfigs on sh to drop
  the CONFIG_NET_CLS_TCINDEX configuration option which became obsolete
  after 8c710f75256b ("net/sched: Retire tcindex classifier").

  Summary:

   - sh: defconfig: Drop obsolete CONFIG_NET_CLS_TCINDEX

   - sh: Align .bss section padding to 8-byte boundary"

* tag 'sh-for-v6.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux:
  sh: defconfig: Drop obsolete CONFIG_NET_CLS_TCINDEX
  sh: Align .bss section padding to 8-byte boundary

3 months agoMerge tag 'kbuild-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy...
Linus Torvalds [Sat, 5 Apr 2025 22:46:50 +0000 (15:46 -0700)]
Merge tag 'kbuild-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild

Pull Kbuild updates from Masahiro Yamada:

 - Improve performance in gendwarfksyms

 - Remove deprecated EXTRA_*FLAGS and KBUILD_ENABLE_EXTRA_GCC_CHECKS

 - Support CONFIG_HEADERS_INSTALL for ARCH=um

 - Use more relative paths to sources files for better reproducibility

 - Support the loong64 Debian architecture

 - Add Kbuild bash completion

 - Introduce intermediate vmlinux.unstripped for architectures that need
   static relocations to be stripped from the final vmlinux

 - Fix versioning in Debian packages for -rc releases

 - Treat missing MODULE_DESCRIPTION() as an error

 - Convert Nios2 Makefiles to use the generic rule for built-in DTB

 - Add debuginfo support to the RPM package

* tag 'kbuild-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (40 commits)
  kbuild: rpm-pkg: build a debuginfo RPM
  kconfig: merge_config: use an empty file as initfile
  nios2: migrate to the generic rule for built-in DTB
  rust: kbuild: skip `--remap-path-prefix` for `rustdoc`
  kbuild: pacman-pkg: hardcode module installation path
  kbuild: deb-pkg: don't set KBUILD_BUILD_VERSION unconditionally
  modpost: require a MODULE_DESCRIPTION()
  kbuild: make all file references relative to source root
  x86: drop unnecessary prefix map configuration
  kbuild: deb-pkg: add comment about future removal of KDEB_COMPRESS
  kbuild: Add a help message for "headers"
  kbuild: deb-pkg: remove "version" variable in mkdebian
  kbuild: deb-pkg: fix versioning for -rc releases
  Documentation/kbuild: Fix indentation in modules.rst example
  x86: Get rid of Makefile.postlink
  kbuild: Create intermediate vmlinux build with relocations preserved
  kbuild: Introduce Kconfig symbol for linking vmlinux with relocations
  kbuild: link-vmlinux.sh: Make output file name configurable
  kbuild: do not generate .tmp_vmlinux*.map when CONFIG_VMLINUX_MAP=y
  Revert "kheaders: Ignore silly-rename files"
  ...

3 months agoMerge tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel
Linus Torvalds [Sat, 5 Apr 2025 22:35:11 +0000 (15:35 -0700)]
Merge tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel

Pull drm fixes from Dave Airlie:
 "Weekly fixes, mostly from the end of last week, this week was very
  quiet, maybe you scared everyone away. It's mostly amdgpu, and xe,
  with some i915, adp and bridge bits, since I think this is overly
  quiet I'd expect rc2 to be a bit more lively.

  bridge:
   - tda998x: Select CONFIG_DRM_KMS_HELPER

  amdgpu:
   - Guard against potential division by 0 in fan code
   - Zero RPM support for SMU 14.0.2
   - Properly handle SI and CIK support being disabled
   - PSR fixes
   - DML2 fixes
   - DP Link training fix
   - Vblank fixes
   - RAS fixes
   - Partitioning fix
   - SDMA fix
   - SMU 13.0.x fixes
   - Rom fetching fix
   - MES fixes
   - Queue reset fix

  xe:
   - Fix NULL pointer dereference on error path
   - Add missing HW workaround for BMG
   - Fix survivability mode not triggering
   - Fix build warning when DRM_FBDEV_EMULATION is not set

  i915:
   - Bounds check for scalers in DSC prefill latency computation
   - Fix build by adding a missing include

  adp:
   - Fix error handling in plane setup"

  # -----BEGIN PGP SIGNATURE-----

* tag 'drm-next-2025-04-05' of https://gitlab.freedesktop.org/drm/kernel: (34 commits)
  drm/i2c: tda998x: select CONFIG_DRM_KMS_HELPER
  drm/amdgpu/gfx12: fix num_mec
  drm/amdgpu/gfx11: fix num_mec
  drm/amd/pm: Add gpu_metrics_v1_8
  drm/amdgpu: Prefer shadow rom when available
  drm/amd/pm: Update smu metrics table for smu_v13_0_6
  drm/amd/pm: Remove host limit metrics support
  Remove unnecessary firmware version check for gc v9_4_2
  drm/amdgpu: stop unmapping MQD for kernel queues v3
  Revert "drm/amdgpu/sdma_v4_4_2: update VM flush implementation for SDMA"
  drm/amdgpu: Parse all deferred errors with UMC aca handle
  drm/amdgpu: Update ta ras block
  drm/amdgpu: Add NPS2 to DPX compatible mode
  drm/amdgpu: Use correct gfx deferred error count
  drm/amd/display: Actually do immediate vblank disable
  drm/amd/display: prevent hang on link training fail
  Revert "drm/amd/display: dml2 soc dscclk use DPM table clk setting"
  drm/amd/display: Increase vblank offdelay for PSR panels
  drm/amd: Handle being compiled without SI or CIK support better
  drm/amd/pm: Add zero RPM enabled OD setting support for SMU14.0.2
  ...

3 months agokbuild: rpm-pkg: build a debuginfo RPM
Uday Shankar [Mon, 31 Mar 2025 22:46:32 +0000 (16:46 -0600)]
kbuild: rpm-pkg: build a debuginfo RPM

The rpm-pkg make target currently suffers from a few issues related to
debuginfo:
1. debuginfo for things built into the kernel (vmlinux) is not available
   in any RPM produced by make rpm-pkg. This makes using tools like
   systemtap against a make rpm-pkg kernel impossible.
2. debug source for the kernel is not available. This means that
   commands like 'disas /s' in gdb, which display source intermixed with
   assembly, can only print file names/line numbers which then must be
   painstakingly resolved to actual source in a separate editor.
3. debuginfo for modules is available, but it remains bundled with the
   .ko files that contain module code, in the main kernel RPM. This is a
   waste of space for users who do not need to debug the kernel (i.e.
   most users).

Address all of these issues by additionally building a debuginfo RPM
when the kernel configuration allows for it, in line with standard
patterns followed by RPM distributors. With these changes:
1. systemtap now works (when these changes are backported to 6.11, since
   systemtap lags a bit behind in compatibility), as verified by the
   following simple test script:

   # stap -e 'probe kernel.function("do_sys_open").call { printf("%s\n", $$parms); }'
   dfd=0xffffffffffffff9c filename=0x7fe18800b160 flags=0x88800 mode=0x0
   ...

2. disas /s works correctly in gdb, with source and disassembly
   interspersed:

   # gdb vmlinux --batch -ex 'disas /s blk_op_str'
   Dump of assembler code for function blk_op_str:
   block/blk-core.c:
   125     {
      0xffffffff814c8740 <+0>:     endbr64

   127
   128             if (op < ARRAY_SIZE(blk_op_name) && blk_op_name[op])
      0xffffffff814c8744 <+4>:     mov    $0xffffffff824a7378,%rax
      0xffffffff814c874b <+11>:    cmp    $0x23,%edi
      0xffffffff814c874e <+14>:    ja     0xffffffff814c8768 <blk_op_str+40>
      0xffffffff814c8750 <+16>:    mov    %edi,%edi

   126             const char *op_str = "UNKNOWN";
      0xffffffff814c8752 <+18>:    mov    $0xffffffff824a7378,%rdx

   127
   128             if (op < ARRAY_SIZE(blk_op_name) && blk_op_name[op])
      0xffffffff814c8759 <+25>:    mov    -0x7dfa0160(,%rdi,8),%rax

   126             const char *op_str = "UNKNOWN";
      0xffffffff814c8761 <+33>:    test   %rax,%rax
      0xffffffff814c8764 <+36>:    cmove  %rdx,%rax

   129                     op_str = blk_op_name[op];
   130
   131             return op_str;
   132     }
      0xffffffff814c8768 <+40>:    jmp    0xffffffff81d01360 <__x86_return_thunk>
   End of assembler dump.

3. The size of the main kernel package goes down substantially,
   especially if many modules are built (quite typical). Here is a
   comparison of installed size of the kernel package (configured with
   allmodconfig, dwarf4 debuginfo, and module compression turned off)
   before and after this patch:

   # rpm -qi kernel-6.13* | grep -E '^(Version|Size)'
   Version     : 6.13.0postpatch+
   Size        : 1382874089
   Version     : 6.13.0prepatch+
   Size        : 17870795887

   This is a ~92% size reduction.

Note that a debuginfo package can only be produced if the following
configs are set:
- CONFIG_DEBUG_INFO=y
- CONFIG_MODULE_COMPRESS=n
- CONFIG_DEBUG_INFO_SPLIT=n

The first of these is obvious - we can't produce debuginfo if the build
does not generate it. The second two requirements can in principle be
removed, but doing so is difficult with the current approach, which uses
a generic rpmbuild script find-debuginfo.sh that processes all packaged
executables. If we want to remove those requirements the best path
forward is likely to add some debuginfo extraction/installation logic to
the modules_install target (controllable by flags). That way, it's
easier to operate on modules before they're compressed, and the logic
can be reused by all packaging targets.

Signed-off-by: Uday Shankar <ushankar@purestorage.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>