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www.infradead.org Git - users/hch/configfs.git/log
Jani Nikula [Mon, 27 May 2024 11:10:52 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to ICL_VIDEO_DIP_PPS_ECC
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the ICL_VIDEO_DIP_PPS_ECC register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/620fd2da6eea334bf9a5d1b93717ca1176c4203e.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:51 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to ICL_VIDEO_DIP_PPS_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the ICL_VIDEO_DIP_PPS_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fb7c308dd655d1bc4af44ab9c88b5f5245d8a5d6.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:50 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to GLK_TVIDEO_DIP_DRM_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the GLK_TVIDEO_DIP_DRM_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bab2d0385b748c34bec262afaf491be881990033.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:49 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_VSC_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_VSC_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2f0ed82eb9c759feb3978e38f3b2835f359d6d1f.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:48 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_GMP_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_GMP_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fff766dca0e790a801fb7d1ad78980da69d3b9f7.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:47 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_SPD_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_SPD_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/97412857f7580994ea9c9c0c8f5f778261f7e71b.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:46 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_VS_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_VS_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6f676d9b2bce0d4911e888c5efeacaddef98579c.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:45 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_AVI_DATA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_AVI_DATA register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/113e40bf4d42a38c1be09a7ce0159dc828356ebc.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:44 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_GCP
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_GCP register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/36f0b90f07c7aa78e88fadb375359df39ecd0a77.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 11:10:43 +0000 (14:10 +0300)]
drm/i915: pass dev_priv explicitly to HSW_TVIDEO_DIP_CTL
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the HSW_TVIDEO_DIP_CTL register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7261777d02eeb94093ed3510989c6809c66d50da.1716808214.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:42:02 +0000 (13:42 +0300)]
drm/i915: pass dev_priv explicitly to PP_DIVISOR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_DIVISOR register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/28e9f7e3570c15ac5c229048ec0def2e4a667ffc.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:42:01 +0000 (13:42 +0300)]
drm/i915: pass dev_priv explicitly to PP_OFF_DELAYS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_OFF_DELAYS register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/122e143ff6a1c1016534dae0ba28fde0b15e3e76.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:42:00 +0000 (13:42 +0300)]
drm/i915: pass dev_priv explicitly to PP_ON_DELAYS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_ON_DELAYS register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0fc707fde15bc11893b6e1d5038162368e3a2b8d.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:41:59 +0000 (13:41 +0300)]
drm/i915: pass dev_priv explicitly to PP_CONTROL
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_CONTROL register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/01024887af682d4c9ddfb440af98284c44422df7.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:41:58 +0000 (13:41 +0300)]
drm/i915: pass dev_priv explicitly to PP_STATUS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PP_STATUS register macro.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7b76be10723f36d6e1b45be76d112a4b178ef493.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Mon, 27 May 2024 10:41:57 +0000 (13:41 +0300)]
drm/i915: pass dev_priv explicitly to _MMIO_PPS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the _MMIO_PPS register macro.
While at it, use __to_intel_display() to allow passing in struct
intel_display at a later time.
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1e9f3ef7eee65946c0e6bf06cc2547a38e8dab78.1716806471.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 23 May 2024 18:28:18 +0000 (21:28 +0300)]
drm/i915: Bury c8_planes_changed() in intel_color_check()
The c8_planes_changed() check in the high level atomic code is
a bit of an eyesore. Push it inside intel_color_check() so the
high level code doesn't have to care about this stuff.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240523182818.15382-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 23 May 2024 18:28:17 +0000 (21:28 +0300)]
drm/i915: Hide the intel_crtc_needs_color_update() inside intel_color_check()
Move the intel_crtc_needs_color_update() into intel_color_check()
so that the caller doesn't have to care about this. This will
also enable us to hide the c8_planes_changed() thing better.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240523182818.15382-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 23 May 2024 18:28:16 +0000 (21:28 +0300)]
drm/i915: Plumb the entire atomic state into intel_color_check()
Bunch of stuff in intel_color_check() needs to look at both the
old and new crtc states. Currently we do that by digging the
full atomic state via the crtc_state->state pointer. That thing
is a total footgun if I ever saw one, as it's only valid during
specific parts of the atomic flow. A lot of people have been
bitten by this thing in the past when trying to use it after
it's no longer valid.
Take a small step towards elimination of the footgun by not
using it in the inte_color_check(). Instead we plumb in the
entire atomic state all the way from the top.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240523182818.15382-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 24 May 2024 15:50:00 +0000 (18:50 +0300)]
drm/i915: Fix SEL_FETCH_{SIZE,OFFSET} registers
Fix up the SEL_FETCH_{SIZE,OFFSET} registers. A classic
copy-paste fail on my part.
I even had a small test to confirm that the old and new register
offsets match, but somehow I must have screwed things up when
running it, and likely just ended up comparing the old defines
against themselves :/
Cc: Jani Nikula <jani.nikula@intel.com>
Fixes: 4bfa8a140db3 ("drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES()")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240524155000.13358-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Imre Deak [Tue, 21 May 2024 14:30:22 +0000 (17:30 +0300)]
drm/i915: Fix audio component initialization
After registering the audio component in i915_audio_component_init()
the audio driver may call i915_audio_component_get_power() via the
component ops. This could program AUD_FREQ_CNTRL with an uninitialized
value if the latter function is called before display.audio.freq_cntrl
gets initialized. The get_power() function also does a modeset which in
the above case happens too early before the initialization step and
triggers the
"Reject display access from task"
error message added by the Fixes: commit below.
Fix the above issue by registering the audio component only after the
initialization step.
Fixes: 87c1694533c9 ("drm/i915: save AUD_FREQ_CNTRL state at audio domain suspend")
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10291
Cc: stable@vger.kernel.org # v5.5+
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240521143022.3784539-1-imre.deak@intel.com
Jani Nikula [Thu, 23 May 2024 12:59:44 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to PIPEGCMAX
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPEGCMAX register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5fdc8562fe7b8d26e1ec1bb8f9a221348246bbe1.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:43 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to PRIMCNSTALPHA
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PRIMCNSTALPHA register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/783477b86f4d53849775cbf690bb8b9042792a66.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:42 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to PRIMSIZE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PRIMSIZE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/b672f17b4c3d5ba7ac606798bb3799408c26f075.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:41 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to PRIMPOS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PRIMPOS register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4bbb3218ac25b292bea46dcba3df8ec474d578e2.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:40 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPGAMC
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPGAMC register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/542455204f62182a46fa2cb16ad6b0648c72f612.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:39 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPSURFLIVE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSURFLIVE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/bc252dee67718f729883da7d542c6435384683ae.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:38 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPOFFSET
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPOFFSET register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c1d487d2c753221144e8fb8f17e5eb2826dba5f2.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:37 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPTILEOFF
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPTILEOFF register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4736b2d65ca3be3e9eb5a835ddac801ba99e1e6b.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:36 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPSURF
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSURF register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fc2d7753aa6e8e25303a111bf4b120da6ce8c458.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:35 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPSIZE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSIZE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d24ee614cac29ccc3917f9cba1ce03ce54fb7d8b.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:34 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPPOS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPPOS register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fbe6b94f03926175611b51c5054466dd27656d2a.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:33 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPSTRIDE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPSTRIDE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4067b3009076492d05e80ae994f9a7bd29b56b2e.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:32 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPLINOFF
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPLINOFF register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/922b6b0795787b335bd3d5b0541bd30dc2c19dd5.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:31 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPADDR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPADDR register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/777d4189c18c16392015dd2770f5c56d94bb88a9.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:30 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPCNTR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPCNTR register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d9434a718658d7dc6dba1e8a54f80cd1503d0b33.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Thu, 23 May 2024 12:59:29 +0000 (15:59 +0300)]
drm/i915: pass dev_priv explicitly to DSPADDR_VLV
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the DSPADDR_VLV register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1d9be6b1eedd9240468a89cd3a10e8513caa33b1.1716469091.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
José Roberto de Souza [Wed, 22 May 2024 20:12:03 +0000 (13:12 -0700)]
drm/xe: Add process name to devcoredump
Process name help us track what application caused the gpug hang, this
is crucial when running several applications at the same time.
v2:
- handle Xe KMD exec_queues without VM
v3:
- use get_pid_task() (suggested by Nirmoy)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240522201203.145403-1-jose.souza@intel.com
Ville Syrjälä [Thu, 16 May 2024 13:56:15 +0000 (16:56 +0300)]
drm/i915: Define SEL_FETCH_PLANE registers via PICK_EVEN_2RANGES()
Instead of that huge _PICK() let's use PICK_EVEN_2RANGES()
for the SEL_FETCH_PLANE registers. A bit more tedious to have
to define 8 raw register offsets for everything, but perhaps
a bit easier to understand since we use a standard mechanism
now instead of hand rolling the arithmetic.
Also bloat-o-meter says:
add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-326 (-326)
Function old new delta
icl_plane_update_arm 510 446 -64
icl_plane_disable_sel_fetch_arm.isra 158 54 -104
icl_plane_update_noarm 1898 1740 -158
Total: Before=
2574502 , After=
2574176 , chg -0.01%
v2: s/mtl+/tgl+/ comments to reflect actual reality
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:22 +0000 (16:56 +0300)]
drm/i915: Document which platforms use which sprite registers
Note which sprite registers are valid for which platforms.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-14-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:21 +0000 (16:56 +0300)]
drm/i915: Polish sprite plane register definitions
Group the sprite plane register definitions such that everything
to do with the same register is in one place.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-13-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:20 +0000 (16:56 +0300)]
drm/i915: Document a few pre-skl primary plane platform dependencies
Add some notes indicating which plane registers/bits are
valid for which platforms.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-12-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:19 +0000 (16:56 +0300)]
drm/i915: Polish pre-skl primary plane registers
Group the pre-skl primary plane register definitions
sensible, and toss in a few comments to indicate which
platforms have what.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-11-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:18 +0000 (16:56 +0300)]
drm/i915: Extract i9xx_plane_regs.h
Relocate all pre-skl primary plane register definitions
into their own declutter i915_reg.h.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-10-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:17 +0000 (16:56 +0300)]
drm/i915: Move PIPEGCMAX to intel_color_regs.h
PIPEGCMAX was left behind when all other gamma registers moved
into intel_color_regs.h.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:16 +0000 (16:56 +0300)]
drm/i915: Add separate defines for cursor WM/DDB register bits
Make a more thorough split between universal planes vs. cursors
by defining the contents of the cursor WM/DDB registers separately.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:14 +0000 (16:56 +0300)]
drm/i915: Rename selective fetch plane registers
Rename the selective fetch plane registers to match the spec.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Thu, 16 May 2024 13:56:13 +0000 (16:56 +0300)]
drm/i915: Simplify PIPESRC_ERLY_TPT definition
PIPESRC_ERLY_TPT is a pipe register, and it lives in the 0x70000 range.
so using _MMIO_TRANS2() for it is not really correct. Also since this
is a pipe register, and not present on CHV, the registers will be
equally spaced out, so we can use the simpler _MMIO_PIPE() instead
of _MMIO_PIPE2().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Mon, 20 May 2024 17:14:59 +0000 (20:14 +0300)]
drm/i915: Add separate define for SEL_FETCH_CUR_CTL()
Split the cursor stuff from the rest of the selective fetch
plane registers so that we can collect all cursor registers
in intel_cursor_regs.h. Also take the opportunity to rename
the registers to match the spec.
v2: Pass the correct register offset fpr pipe B (Jani)
s/mtl+/tgl+/ as that's where this was introduced
Drop the bogus SEL_FETCH_CUR_CTL_ENABLE bit, the contents
actually match the normal CUR_CTL register
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240520171459.9661-1-ville.syrjala@linux.intel.com
Ville Syrjälä [Thu, 16 May 2024 13:56:11 +0000 (16:56 +0300)]
drm/i915: Clean up the cursor register defines
Group the cursor register defines such that everything to
do with one register is in one place.
Also, while we are touching these protect all the macro
arguments for good measure.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516135622.3498-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 17 May 2024 17:12:08 +0000 (20:12 +0300)]
drm/i915: Add skl+ plane name aliases to enum plane_id
Using PLANE_PRIMARY + PLANE_SPRITE? on skl+ results in a bunch
of unnecessary head scratching. Add aliases using the skl+ plane
names.
And for pre-skl we only need to keep PRIMARY,SPRITE0,SPRITE1
as we only ever have 0-2 sprites per pipe on those platforms.
v2: Don't break icl_nv12_y_plane_mask() (Jani)
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517171208.21313-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Vidya Srinivas [Mon, 20 May 2024 16:56:34 +0000 (22:26 +0530)]
drm/i915/dpt: Make DPT object unshrinkable
In some scenarios, the DPT object gets shrunk but
the actual framebuffer did not and thus its still
there on the DPT's vm->bound_list. Then it tries to
rewrite the PTEs via a stale CPU mapping. This causes panic.
Cc: stable@vger.kernel.org
Reported-by: Shawn Lee <shawn.c.lee@intel.com>
Fixes: 0dc987b699ce ("drm/i915/display: Add smem fallback allocation for dpt")
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
[vsyrjala: Add TODO comment]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240520165634.1162470-1-vidya.srinivas@intel.com
Ville Syrjälä [Mon, 20 May 2024 16:47:32 +0000 (19:47 +0300)]
drm/i915: Bump max TMDS bitrate to 6 Gbps on ADL-S/ADL-P/DG2+
Bspec lists the mas TMDS bitrate as 6 Gbps on ADL-S/ADL-P/DG2.
Bump our limit to match.
v2: Bump for ADL-S as well (Jani)
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240520164732.3682-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Gustavo Sousa [Fri, 10 May 2024 14:05:33 +0000 (11:05 -0300)]
drm/i915/bmg: Load DMC
Load Battlemage's DMC. We re-use XELPDP_DMC_MAX_FW_SIZE since BMG's
display is a derivative of Xe_LPD+ and has the same MMIO offset limits.
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510140532.112352-2-gustavo.sousa@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Suraj Kandpal [Tue, 21 May 2024 08:14:57 +0000 (13:44 +0530)]
drm/i915/hdcp: Check mst_port to determine connector type
Check mst_port field in intel_connector to check connector type
rather than rely on encoder as it may not be attached to connector
at times.
--v2
-Add closes tag [Imre]
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10898
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240521081458.1500327-3-suraj.kandpal@intel.com
Suraj Kandpal [Tue, 21 May 2024 08:14:56 +0000 (13:44 +0530)]
drm/i915/hdcp: Move aux assignment after connector type check
Move assignment of aux after connector type check as port may not
exist if connector is not DPMST.
--v2
-Fix unwanted change in intel_encoder check [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240521081458.1500327-2-suraj.kandpal@intel.com
Jani Nikula [Wed, 15 May 2024 16:56:51 +0000 (19:56 +0300)]
drm/i915: stop redefining INTEL_VGA_DEVICE
Now that the PCI ID macros allow us to pass in the macro to use, stop
redefining INTEL_VGA_DEVICE.
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240515165651.1230465-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 16:56:50 +0000 (19:56 +0300)]
drm/i915/pciids: switch to xe driver style PCI ID macros
The PCI ID macros in xe_pciids.h allow passing in the macro to operate
on each PCI ID, making it more flexible. Convert i915_pciids.h to the
same pattern.
INTEL_IVB_Q_IDS() for Quanta transcode remains a special case, and
unconditionally uses INTEL_QUANTA_VGA_DEVICE().
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240515165651.1230465-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ryszard Knop [Wed, 24 Apr 2024 11:41:59 +0000 (13:41 +0200)]
MAINTAINERS: Move the drm-intel repo location to fd.o GitLab
The drm-intel repo is moving from the classic fd.o git host to GitLab.
Update its location with a URL matching other fd.o GitLab kernel trees.
Signed-off-by: Ryszard Knop <ryszard.knop@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Acked-by: Tvrtko Ursulin <tursulin@ursulin.net>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240424114159.38719-1-ryszard.knop@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Jouni Högander [Fri, 17 May 2024 07:30:05 +0000 (10:30 +0300)]
drm/i915/psr: PSR2_CTL[Block Count Number] not needed for LunarLake
PSR2_CTL[Block Count Number] is not used by LunarLake do not configure it.
Bspec: 69885
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-4-jouni.hogander@intel.com
Jouni Högander [Fri, 17 May 2024 07:30:04 +0000 (10:30 +0300)]
drm/i915/psr: LunarLake PSR2_CTL[IO Wake Lines] is 6 bits wide
On LunarLake PSR2_CTL[IO Wake Lines] contains now bit 13:18. Take this
into account when enabling PSR2_CTL.
Bspec: 69885
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-3-jouni.hogander@intel.com
Jouni Högander [Fri, 17 May 2024 07:30:03 +0000 (10:30 +0300)]
drm/i915/psr: LunarLake IO and Fast Wake time line count maximums are 68
On LunarLake maximum for IO and Fast Wake time line counts are 68: 6 bits +
5 lines added by the HW. Take this into account in calculation and when
writing the IO Wake lines.
v2: maximum line count is 68 (6 bits + 5 lines added by HW)
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240517073005.2414293-2-jouni.hogander@intel.com
Nirmoy Das [Thu, 16 May 2024 15:14:03 +0000 (17:14 +0200)]
drm/i915/selftests: Set always_coherent to false when reading from CPU
Commit
8d4ba9fc1c6c ("drm/i915/selftests: Pick correct caching mode.")
was not complete as for non LLC sharing platforms cpu read can happen
from LLC which probably doesn't have the latest changes made by GPU.
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com>
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Fixes: 8d4ba9fc1c6c ("drm/i915/selftests: Pick correct caching mode.")
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240516151403.2875-1-nirmoy.das@intel.com
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:48 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURSURFLIVE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURSURFLIVE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/86aa98ad9f883681f5c2e3aba839d02d8591bfbf.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:47 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CUR_CHICKEN
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CUR_CHICKEN register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0bd1fa8ab346ba2bb40f435136b975b472ad2bc8.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:46 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CUR_FBC_CTL
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CUR_FBC_CTL register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f5e76f916ccf02aaf6016ffd476e9544817ac179.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:45 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURSIZE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURSIZE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/521ca44416eb95dcfcf4bfbc32ac7f9371aeaf5d.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:44 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURPOS_ERLY_TPT
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURPOS_ERLY_TPT register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/2263b6412e983026990f7f6730b0b1141be4fd0f.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:43 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURPOS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURPOS register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ca229a123cb8a5d6a2970649a47236b3da1b02ad.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:42 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURBASE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURBASE register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e552df69a4e6a3dbd562ba8c442d0219cda3bfd0.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Wed, 15 May 2024 11:56:41 +0000 (14:56 +0300)]
drm/i915: pass dev_priv explicitly to CURCNTR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURCNTR register macro.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/06bc681558c86f351ae596e9600133bb10ae4bdd.1715774156.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:21 +0000 (14:22 +0300)]
drm/i915/pciids: don't include RPL-U PCI IDs in RPL-P
It's confusing for INTEL_RPLP_IDS() to include INTEL_RPLU_IDS(). Even if
we treat them the same elsewhere, the lists of PCI IDs should not.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/28fe0910efb93a28c400728af14beff015667f42.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:20 +0000 (14:22 +0300)]
drm/i915/pciids: remove 12 from INTEL_TGL_IDS()
Most other PCI ID macros do not encode the gen in the name. Follow suit
for TGL.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/044a5c553dc4564431bbef197d5e2dd085624fc2.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:19 +0000 (14:22 +0300)]
drm/i915/pciids: remove 11 from INTEL_ICL_IDS()
Most other PCI ID macros do not encode the gen in the name. Follow suit
for ICL.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/36973674bf333dfdd7cd32ae656754bfa150022b.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:18 +0000 (14:22 +0300)]
drm/i915/pciids: don't include WHL/CML PCI IDs in CFL
It's confusing for INTEL_CFL_IDS() to include all WHL and CML PCI
IDs. Even if we treat them the same in a lot of places, CML is a
platform of its own, and the lists of PCI IDs should not conflate them.
Largely go by the idea that if a platform has a name, group its PCI IDs
together.
That said, AML is special, having both KBL and CFL variants. Leave that
alone.
v2: Also split out WHL not just CML (Rodrigo)
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7cca91dc78ed2b5982f14e400f03a1704645e475.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:17 +0000 (14:22 +0300)]
drm/i915/pciids: add INTEL_IVB_IDS()
Add INTEL_IVB_IDS() to identify all IVBs except IVB Q transcode.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ed89a25b2c6bce318fe59e883d18b62d9453196b.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:16 +0000 (14:22 +0300)]
drm/i915/pciids: add INTEL_SNB_IDS()
Add INTEL_SNB_IDS() to identify all SNBs.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ffcb2d954ad9bca78ccd39836dc0a3dc7c6c0253.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:15 +0000 (14:22 +0300)]
drm/i915/pciids: add INTEL_ILK_IDS(), use acronym
Most other PCI ID macros use platform acronyms. Follow suit for ILK. Add
INTEL_ILK_IDS() to identify all ILKs.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/27ada56363cfa6a5b093cb31908a4b89aa912621.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Jani Nikula [Fri, 10 May 2024 11:22:14 +0000 (14:22 +0300)]
drm/i915/pciids: add INTEL_PNV_IDS(), use acronym
Most other PCI ID macros use platform acronyms. Follow suit for PNV. Add
INTEL_PNV_IDS() to identify all PNVs.
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5f9b34a2cd388244be03263a5147776bfe64d5ac.1715340032.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:29 +0000 (18:23 +0300)]
drm/i915: Handle SKL+ WM/DDB registers next to all other plane registers
Having the plane WM/DDB regitster write functions in skl_watermarks.c
is rather annoying when trying to implement DSB based plane updates.
Move them into the respective files that handle all other plane
register writes. Less places where I need to worry about the DSB
vs. MMIO decisions.
The downside is that we spread the wm struct details a bit further
afield. But if that becomes too annoying we can probably abstract
things a bit more with a few extra functions.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-17-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:28 +0000 (18:23 +0300)]
drm/i915: Nuke skl_write_wm_level() and skl_ddb_entry_write()
Get rid of skl_ddb_entry_write() and skl_write_wm_level() and
just call intel_de_write_fw() directly.
This is prep work towards DSB based plane updates where these
wrappers are more of a hinderance.
Done with cocci mostly:
@@
expression D, R, L;
@@
- skl_write_wm_level(D, R, L)
+ intel_de_write_fw(D, R, skl_plane_wm_reg_val(L))
@@
expression D, R, B;
@@
- skl_ddb_entry_write(D, R, B)
+ intel_de_write_fw(D, R, skl_plane_ddb_reg_val(B))
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-16-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:27 +0000 (18:23 +0300)]
drm/i915: Extract skl_plane_{wm,ddb}_reg_val()
Extract helpers to calculate the final wm/ddb register
values for skl+. Will allow me to more cleanly remove the
register write wrappers for these registers.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-15-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Mon, 13 May 2024 17:00:40 +0000 (20:00 +0300)]
drm/i915: Refactor skl+ plane register offset calculations
Currently every skl+ plane register defines some intermediate
macros to calculate the final register offset. Pull all of that
into common macros, simplifying the final register offset stuff
into just five defines:
- raw register offsets for the planes 1 and 2 on pipes A and B
- the final parametrized macro
v2: Rebase
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240513170040.15393-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Mon, 13 May 2024 17:00:08 +0000 (20:00 +0300)]
drm/i915: Drop a few unwanted tabs from skl+ plane reg defines
A few extra tabs have snuck into the skl+ plane register bit
definitions. Remove them.
v2: Rebase
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240513170008.15338-1-ville.syrjala@linux.intel.com
Ville Syrjälä [Mon, 13 May 2024 16:59:45 +0000 (19:59 +0300)]
drm/i915: Use REG_BIT for PLANE_WM bits
A couple of PLANE_WM bits were still using the hand
rolled (1<<N) form. Replace with REG_BIT().
v2: Rebase
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240513165945.15285-1-ville.syrjala@linux.intel.com
Ville Syrjälä [Mon, 13 May 2024 16:59:09 +0000 (19:59 +0300)]
drm/i915: Shuffle the skl+ plane register definitions
Rearrange the plane skl+ universal plane register definitions:
- keep everything related to the same register in one place
- sort based on register offset
- unify the whitespace/etc a bit
v2: Define register contents after all offsets (Jani)
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240513165909.15234-1-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Mon, 13 May 2024 16:58:42 +0000 (19:58 +0300)]
drm/i915: Drop useless PLANE_FOO_3 register defines
We only need register defines for the first two planes
on the first two pipes. Nuke everything else.
v2: Drop a few more that snuck through
Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240513165842.15199-1-ville.syrjala@linux.intel.com
Ville Syrjälä [Fri, 10 May 2024 15:23:21 +0000 (18:23 +0300)]
drm/i915/gvt: Use PLANE_CTL and PLANE_SURF defines
Stop hand rolling PLANE_CTL and PLANE_SURF for the third plane
and just use the real thing.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:20 +0000 (18:23 +0300)]
drm/i915/gvt: Use the full PLANE_KEY*() defines
Stop hand rolling PLANE_KEY*() register defines and just
use the real thing.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:19 +0000 (18:23 +0300)]
drm/i915/gvt: Use the proper PLANE_AUX_OFFSET() define
Stop hand rolling PLANE_AUX_OFFSET() and just use the real thing.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:18 +0000 (18:23 +0300)]
drm/i915/gvt: Use the proper PLANE_AUX_DIST() define
Stop hand rolling PLANE_AUX_DIST() and just use the real thing.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:17 +0000 (18:23 +0300)]
drm/i915: Move skl+ wm/ddb registers to proper headers
On SKL+ the watermark/DDB registers are proper per-plane
registers. Move the definitons to their respective files.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:16 +0000 (18:23 +0300)]
drm/i915: Extract intel_cursor_regs.h
Move most cursor register definitions into their own file.
Declutters i915_reg.h a bit more.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:15 +0000 (18:23 +0300)]
drm/i915: Extract skl_universal_plane_regs.h
Move most of the SKL+ universal plane register definitions
into their own file. Declutters i915_reg.h a bit more.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
CC: Zhi Wang <zhi.wang.linux@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Ville Syrjälä [Fri, 10 May 2024 15:23:14 +0000 (18:23 +0300)]
drm/i915: Nuke _MMIO_PLANE_GAMC()
_MMIO_PLANE_GAMC() is some leftover macro that is never used.
Get rid of it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510152329.24098-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Jouni Högander [Fri, 10 May 2024 09:38:23 +0000 (12:38 +0300)]
drm/i915/psr: Add panel replay sel update support to debugfs interface
Add panel replay selective update support to debugfs status interface. In
case of sink supporting panel replay we will print out:
Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes
and PSR mode will look like this if printing out enabled panel replay
selective update:
PSR mode: Panel Replay Selective Update Enabled
Current PSR and panel replay printouts remain same.
Cc: Kunal Joshi <kunal1.joshi@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-13-jouni.hogander@intel.com
Jouni Högander [Fri, 10 May 2024 09:38:22 +0000 (12:38 +0300)]
drm/i915/psr: Split intel_psr2_config_valid for panel replay
Part of intel_psr2_config_valid is valid for panel replay. rename it as
intel_sel_update_config_valid. Split psr2 specific part and name it as
intel_psr2_config_valid.
v3:
- move early transport check to psr2 specific check
- check intel_psr2_config_valid only for non-Panel Replay case
v2:
- use psr2_global_enabled for panel replay as well
- goto unsupported instead of return when global enabled check fails
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-12-jouni.hogander@intel.com
Jouni Högander [Fri, 10 May 2024 09:38:21 +0000 (12:38 +0300)]
drm/i915/psr: Update PSR module parameter descriptions
We are re-using PSR module parameters for panel replay. Update module
parameter descriptions with panel replay information:
enable_psr:
-1 (default) == follow what is in VBT
0 == disable PSR/PR
1 == Allow PSR1 and PR full frame update
2 == allow PSR1/PSR2 and PR Selective Update
enable_psr2_sel_fetch
0 == disable selective fetch for PSR and PR
1 (default) == allow selective fetch for PSR PR
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-11-jouni.hogander@intel.com
Jouni Högander [Fri, 10 May 2024 09:38:20 +0000 (12:38 +0300)]
drm/i915/psr: Do not apply workarounds in case of panel replay
There are some workarounds that are not applicable for panel replay. Do not
apply these if panel replay is used.
Bspec: 66624, 50422
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-10-jouni.hogander@intel.com
Jouni Högander [Fri, 10 May 2024 09:38:19 +0000 (12:38 +0300)]
drm/i915/psr: Panel replay uses SRD_STATUS to track it's status
DP Panel replay uses SRD_STATUS to track it's status despite selective
update mode.
Bspec: 53370, 68920
v4:
- use PSR2_STATUS for eDP Panel Replay
- handle intel_psr_wait_exit_locked as well
v3:
- do not use PSR2_STATUS for PSR1
v2:
- use intel_dp_is_edp to differentiate
- modify debugfs status as well
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510093823.3146455-9-jouni.hogander@intel.com