Amit Kumar Mahapatra [Thu, 12 May 2022 14:50:25 +0000 (20:20 +0530)]
spi: spi-cadence: Update ISR status variable type to irqreturn_t
Data type of status variable, that hold the return value of the ISR,
should be irqreturn_t & not u32. This patch updates status variable type
to irqreturn_t.
Vaishnav Achath [Wed, 11 May 2022 11:55:16 +0000 (17:25 +0530)]
spi: cadence-quadspi: Handle spi_unregister_master() in remove()
Currently devres managed removal of the spi_controller happens after
removing the power domain of the host platform_device.While this
does not affect the clean removal of the controller, but affects
graceful removal of the child devices if the child device removal
requires issuing commands over SPI.
Eg. flash device being soft reset to 1S-1S-1S mode before removal
so that on next probe operations in 1S-1S-1S mode is successful.
Failure is seen when `rmmod spi-cadence-quadspi` is performed:
root@j7-evm:~# rmmod spi_cadence_quadspi
[ 49.230996] cadence-qspi 47050000.spi: QSPI is still busy after 500ms timeout.
[ 49.238209] spi-nor spi1.0: operation failed with -110
[ 49.244457] spi-nor spi1.0: Software reset failed: -110
and on subsequent modprobe the OSPI flash probe fails as it
is in 8D-8D-8D mode since the previous soft reset did not happen.
root@j7-evm:~# modprobe spi_cadence_quadspi
[ 73.253536] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
[ 73.260476] spi-nor: probe of spi0.0 failed with error -2
This commit adds necessary changes to perform spi_unregister_master()
in the host device remove() so that the child devices are gracefully
removed before the power domain is removed.
This series update flags management in the following cases:
- In APM mode, don't take care of TCF and TEF flags
- Always check TCF flag in stm32_qspi_wait_cmd()
- Don't check BUSY flag when sending new command
Patrice Chotard [Wed, 11 May 2022 07:46:43 +0000 (09:46 +0200)]
spi: stm32-qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes has been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Marc Kleine-Budde [Mon, 2 May 2022 17:54:57 +0000 (19:54 +0200)]
spi: spi-imx: mx51_ecspi_prepare_message(): skip writing MX51_ECSPI_CONFIG register if unchanged
In mx51_ecspi_prepare_message() the MX51_ECSPI_CONFIG register is
setup for the current spi_message. After writing the register, there
is a delay to ensure that the changes hit the hardware.
This patch checks if the register MX51_ECSPI_CONFIG actually needs to
be changed. If the register content is unchanged the function is left
early, skipping the write to the hardware and the delay. This leads to
a small, but measurable performance increase. For a given workload
with small transfers on an imx6 single core the CPU load decreases
from 30% to ~27%.
Marc Kleine-Budde [Mon, 2 May 2022 17:54:56 +0000 (19:54 +0200)]
spi: spi-imx: add PIO polling support
The driver supports several modes, one of them is PIO/IRQ
"spi_imx_pio_transfer()". The data is exchanged with the IP core using
PIO, an IRQ is setup to signal empty/full FIFOs and the end of the
transfer. The IRQ and scheduling overhead for short transfers is
significant. Using polling instead of IRQs can be beneficial to reduce
the overall CPU load, especially on small transfer workloads.
On an imx6 single core, a given RX workload of the mcp251xfd driver
results in 40% CPU load. Using polling mode reduces the CPU load to
30%.
This patch adds PIO polling support to the driver. For transfers with
a duration of less than 30 µs the polling mode instead of IRQ based
PIO mode is used. 30 µs seems to be a good compromise, which is used
the by the SPI drivers for the raspberry Pi (spi-bcm2835,
spi-bcm2835), too.
Marc Kleine-Budde [Mon, 2 May 2022 17:54:55 +0000 (19:54 +0200)]
spi: spi-imx: replace struct spi_imx_data::bitbang by pointer to struct spi_controller
There's no need to embed the struct spi_bitbang into our private
data (struct spi_imx_data), the spi core is flexible enough, so that
we only need a pointer to the allocated struct spi_controller.
This is also a preparation patch to add PIO based polling support to
the driver.
Marc Kleine-Budde [Mon, 2 May 2022 17:54:54 +0000 (19:54 +0200)]
spi: spi-imx: complete conversion from master -> controller
With patch:
| 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"")
the SPI "master" was generalized to "controller". This patch completed
the conversion of the spi-imx driver by replacing the remaining
occurrences of master to controller.
Marc Kleine-Budde [Mon, 2 May 2022 17:54:52 +0000 (19:54 +0200)]
spi: spi-imx: spi_imx_buf_rx_swap_u32(): fix sparse warning: use swab32s() instead of cpu_to_be32()
This patch fixes the following sparse warning by using a swab32s()
instead of a cpu_to_be32(). The driver is used on little endian
systems only and we really want to swap the bytes.
| drivers/spi/spi-imx.c:305:29: warning: incorrect type in assignment (different base types)
| drivers/spi/spi-imx.c:305:29: expected unsigned int val
| drivers/spi/spi-imx.c:305:29: got restricted __be32 [usertype]
| drivers/spi/spi-imx.c:361:21: warning: incorrect type in assignment (different base types)
| drivers/spi/spi-imx.c:361:21: expected unsigned int [assigned] [usertype] val
| drivers/spi/spi-imx.c:361:21: got restricted __be32 [usertype]
Marc Kleine-Budde [Mon, 2 May 2022 17:54:49 +0000 (19:54 +0200)]
spi: spi-imx: fix sparse warning: add identifier name to function definition
This patch fixes the following and similar sparse warnings by adding
the missing identifier names to the function definitions:
| WARNING: function definition argument 'struct spi_imx_data *' should also have an identifier name
| #68: FILE: drivers/spi/spi-imx.c:68:
| + int (*prepare_message)(struct spi_imx_data *, struct spi_message *);
Andrea Zanotti [Mon, 2 May 2022 11:13:00 +0000 (13:13 +0200)]
spi: omap2-mcspi: add support for interword delay
The module omap2-mcspi does not support the interword delay
parameter present in the spi transfer. On one side, if the module
is instructed to use the dma, this parameter is correctly ignored.
However, without the usage of the dma, that parameter should be
used.
The patch introduce the handling of such delay in the omap2-mcspi
module, using standard spi_delay struct. The patch has been tested
using as benchmark a DM3730.
The delay function used (spi_delay_exec) is already present in the
kernel and it checks on its own the validity of the input, as such,
no additional checks are present.
The range of usage of the udelay function is incremented to 200 us,
as the change from udelay to usleep_range introduces not
neglectible delays.
Add RSPI binding documentation for Renesas RZ/G2UL SoC.
RSPI block is identical to one found on RZ/A, so no driver changes are
required. The fallback compatible string "renesas,rspi-rz" will be used
on RZ/G2UL.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082150.24662-1-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
Ian Abbott [Wed, 27 Apr 2022 15:34:46 +0000 (16:34 +0100)]
spi: cadence-quadspi: fix Direct Access Mode disable for SoCFPGA
The Cadence QSPI compatible string required for the SoCFPGA platform
changed from the default "cdns,qspi-nor" to "intel,socfpga-qspi" with
the introduction of an additional quirk in
commit 98d948eb8331 ("spi: cadence-quadspi: fix write completion support").
However, that change did not preserve the previously used
quirk for this platform. Reinstate the `CQSPI_DISABLE_DAC_MODE` quirk
for the SoCFPGA platform.
Fixes: 98d948eb8331 ("spi: cadence-quadspi: fix write completion support") Cc: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Link: https://lore.kernel.org/r/20220427153446.10113-1-abbotti@mev.co.uk Signed-off-by: Mark Brown <broonie@kernel.org>
mtd: nand: mtk-ecc: also parse nand-ecc-engine if available
The recently added ECC engine support introduced a generic property
named nand-ecc-engine for ecc engine phandle. This patch adds support
for this new property.
Mark Brown [Mon, 25 Apr 2022 17:22:58 +0000 (18:22 +0100)]
Improve SPI support for Ingenic SoCs.
Merge series from 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>:
1.Add support for using GPIOs as chip select lines on Ingenic SoCs.
2.Add support for probing the spi-ingenic driver on the JZ4775 SoC,
the X1000 SoC, and the X2000 SoC.
3.Modify annotation texts to be more in line with the current state.
Alexander Shiyan [Wed, 20 Apr 2022 06:10:38 +0000 (09:10 +0300)]
spi: clps711x: Use syscon_regmap_lookup_by_phandle
Since version 5.13, the standard syscon bindings have been added
to all clps711x DT nodes, so we can now use the more general
syscon_regmap_lookup_by_phandle function to get the syscon pointer.
Minghao Chi [Wed, 20 Apr 2022 09:04:52 +0000 (09:04 +0000)]
spi: stm32: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
Minghao Chi [Thu, 14 Apr 2022 08:56:37 +0000 (08:56 +0000)]
spi: spi-cadence-quadspi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
As suggested, this removes the whole cqspi_set_protocol() function, as it
is not actually needed:
- Checks for unsupported operations are already handled by supports_op(),
removing the need to distinguish DTR and non-DTR modes in the buswidth
setup
- supports_op() ensures that the DTR flags match for all relevant parts of
an operation, so op->cmd.dtr can be used instead of copying the flag to
the cqspi_flash_pdata
- The logic in cqspi_set_protocol() is moved to cqspi_calc_rdreg() and
cqspi_write_setup() (with a helper macro CQSPI_OP_WIDTH())
The helper macro checks nbytes instead of buswidth for 0, for consistency
with supports_op() etc.
spi: rockchip: fix missing error on unsupported SPI_CS_HIGH
The hardware (except for the ROCKCHIP_SPI_VER2_TYPE2 version) does not
support active-high native chip selects. However if such a CS is configured
the core does not error as it normally should, because the
'ctlr->use_gpio_descriptors = true' line in rockchip_spi_probe() makes the
core set SPI_CS_HIGH in ctlr->mode_bits.
In such a case the spi-rockchip driver operates normally but produces an
active-low chip select signal without notice.
There is no provision in the current core code to handle this
situation. Fix by adding a check in the ctlr->setup function (similarly to
what spi-atmel.c does).
This cannot be done reading the SPI_CS_HIGH but in ctlr->mode_bits because
that bit gets always set by the core for master mode (see above).
Minghao Chi [Thu, 14 Apr 2022 08:54:33 +0000 (08:54 +0000)]
spi: spi-omap2-mcspi: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
Minghao Chi [Wed, 20 Apr 2022 09:04:20 +0000 (09:04 +0000)]
spi: mxs: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
Minghao Chi [Thu, 14 Apr 2022 08:53:42 +0000 (08:53 +0000)]
spi: spi-imx: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
Minghao Chi [Thu, 14 Apr 2022 08:55:06 +0000 (08:55 +0000)]
spi: spi-sprd: using pm_runtime_resume_and_get instead of pm_runtime_get_sync
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and
pm_runtime_put_noidle. This change is just to simplify the code, no
actual functional changes.
1.Since it would be dangerous to specify a newer SoC's compatible
string as the fallback of an older SoC's compatible string, we
add support for the "ingenic,jz4775-spi" compatible string in
the driver.
This will permit to support the JZ4775 by having:
compatible = "ingenic,jz4775-spi";
Instead of doing:
compatible = "ingenic,jz4775-spi", "ingenic,jz4780-spi";
2.Add support for probing the spi-ingenic driver on the X1000 SoC
from Ingenic. From the X1000 SoC onwards, the maximum frequency
allowed by the SSI module of Ingenic SoCs has been changed from
54MHz to 50MHz. So "max_speed_hz" is introduced in "jz_soc_info"
to set different maximum frequency values.
3.Add support for probing the spi-ingenic driver on the X2000 SoC
from Ingenic. The X2000 SoC has only one native chip select line,
so "max_native_cs" is introduced in "jz_soc_info" to set different
maximum number of native chip select lines.
4.Because of the introduction of support for the X-series SoCs, the
current driver is not only applicable to the JZ-series SoCs, so
the description texts has been modified to avoid misunderstanding.
If the device is already in a runtime PM enabled state
pm_runtime_get_sync() will return 1, so a test for negative
value should be used to check for errors.
The buffers passed in the data phase must be DMA-able. Programmers often
don't realise this requirement and pass in buffers that reside on the
stack. This can be hard to spot when reviewing code. Reject ops if their
data buffer is on the stack to avoid this.
Mika Westerberg [Wed, 20 Apr 2022 10:43:50 +0000 (13:43 +0300)]
spi: intel: Implement dirmap hooks
Currently the driver goes over the supported opcodes list each time
->exec_op() is called and finds the suitable for the given operation.
This consumes unnecessary amount of CPU cycles because the operation is
always the same. For this reason populate dirmap hooks for the driver so
that we cache the selected operation and then simply call it on each
read/write.
Mark Brown [Wed, 20 Apr 2022 13:22:11 +0000 (14:22 +0100)]
MediaTek SPI controller cleanups and documentation
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>:
This series performs some cleanups to the spi-mt65xx driver, removing
all gotos, simplifying the probe function and adding kerneldoc to the
driver structures.
AngeloGioacchino Del Regno [Thu, 7 Apr 2022 11:44:28 +0000 (13:44 +0200)]
spi: mt65xx: Fix definitions indentation
Some definitions at the beginning of this file were wrongly
indented: fix the indentation for all of these and, while at
it, also move the MTK_SPI_IDLE and MTK_SPI_PAUSED down, as to
implicitly group the hardware related definitions to the
software (driver) related ones.
AngeloGioacchino Del Regno [Thu, 7 Apr 2022 11:44:27 +0000 (13:44 +0200)]
spi: mt65xx: Add kerneldoc for driver structures
One of the two structures was already partially documented, but not
in kerneldoc format: enhance readability by adding the missing
documentation bits and use kerneldoc.
AngeloGioacchino Del Regno [Thu, 7 Apr 2022 11:44:25 +0000 (13:44 +0200)]
spi: mt65xx: Move pm_runtime_enable() call to remove all gotos
The last goto in the probe function can be removed by calling
pm_runtime_enable() right before devm_spi_register_master(), as
only some init checks were being performed after enabling pm.
This is a cleanup and brings no functional changes.
Reparenting sel_clk to parent_clk can be done before enabling any of
spi_clk and spi_hclk. Move the call to clk_set_parent() for sel_clk
earlier, and call disable_unprepare() upon spi_clk prepare_enable()
failure to remove all clock disablement related gotos.
This commit is in preparation of a later cleanup.
AngeloGioacchino Del Regno [Thu, 7 Apr 2022 11:44:23 +0000 (13:44 +0200)]
spi: mt65xx: Add and use pointer to struct device in mtk_spi_probe()
In preparation for switching to dev_err_probe() in this function, add
a pointer to struct device and replace all occurrences of '&pdev->dev'
to using this 'dev' pointer.
This is done for one-line fitting of the dev_err_probe() calls.
AngeloGioacchino Del Regno [Thu, 7 Apr 2022 11:44:22 +0000 (13:44 +0200)]
spi: mt65xx: Switch to device_get_match_data()
Instead of performing yet another match check in the probe function,
simply switch to device_get_match_data().
This is a cleanup and brings no functional change.
Some SPI devices latch MOSI bits on one clock phase, but produce valid
MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the
controller driver to flip CPHA for Rx (MISO) only transfers.
Paul Kocialkowski [Thu, 14 Apr 2022 08:40:40 +0000 (10:40 +0200)]
spi: core: Initialize returned status in spi_setup
The previous commit that made bits-per-word validation conditional
results in leaving no unconditional affectation of the status variable.
Since the variable is returned at the end of the function, initialize
it to avoid returning an undefined value.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Fixes: b3fe2e516741 ("spi: core: Only check bits_per_word validity when explicitly provided") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20220414084040.975520-1-paul.kocialkowski@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
Remove the DTR checks as they are already handled in
spi_mem_default_supports_op(). This code removal was intentionally not done
in the previous patch that introduced the use of the
spi_mem_default_supports_op() core helper and fixed the buswidth adjustment
between SPIMEM and the SPI controller, so that the fix can be easily
backported to stable kernels.
spi: cadence-quadspi: fix incorrect supports_op() return value
Since the conversion to spi-mem, the driver advertised support for
various operations that cqspi_set_protocol() was never expected to handle
correctly - in particuar all non-DTR operations with command or address
buswidth > 1. For DTR, all operations except for 8-8-8 would fail, as
cqspi_set_protocol() returns -EINVAL.
In non-DTR mode, this resulted in data corruption for SPI-NOR flashes that
support such operations. As a minimal fix that can be backported to stable
kernels, simply disallow the unsupported operations again to avoid this
issue.
Biju Das [Mon, 11 Apr 2022 17:31:15 +0000 (18:31 +0100)]
spi: spi-rspi: Remove setting {src,dst}_{addr,addr_width} based on DMA direction
The direction field in the DMA config is deprecated. The rspi driver
sets {src,dst}_{addr,addr_width} based on the DMA direction and
it results in dmaengine_slave_config() failure as RZ DMAC driver
validates {src,dst}_addr_width values independent of DMA direction.
This patch fixes the issue by passing both {src,dst}_{addr,addr_width}
values independent of DMA direction.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Suggested-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220411173115.6619-1-biju.das.jz@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
Paul Kocialkowski [Tue, 12 Apr 2022 12:22:07 +0000 (14:22 +0200)]
spi: core: Only check bits_per_word validity when explicitly provided
On SPI device probe, the core will call spi_setup in spi_add_device
before the corresponding driver was probed. When this happens, the
bits_per_word member of the device is not yet set by the driver,
resulting in the default being set to 8 bits-per-word.
However some controllers do not support 8 bits-per-word at all, which
results in a failure when checking the bits-per-word validity.
In order to support these devices, skip the bits-per-word validity
check when it is not explicitly provided by drivers.
Miaoqian Lin [Mon, 11 Apr 2022 11:10:33 +0000 (11:10 +0000)]
spi: spi-ti-qspi: Fix return value handling of wait_for_completion_timeout
wait_for_completion_timeout() returns unsigned long not int.
It returns 0 if timed out, and positive if completed.
The check for <= 0 is ambiguous and should be == 0 here
indicating timeout which is the only error case.
Michal Simek [Tue, 22 Mar 2022 15:00:18 +0000 (20:30 +0530)]
spi: spi-cadence: Fix kernel-doc format for resume/suspend
Kernel function name don't match with function name.
Error log:
drivers/spi/spi-cadence.c:661: warning: expecting prototype for
cdns_spi_runtime_resume(). Prototype was for cnds_runtime_resume() instead
drivers/spi/spi-cadence.c:690: warning: expecting prototype for
cdns_spi_runtime_suspend(). Prototype was for cnds_runtime_suspend()
instead
Matthias Schiffer [Thu, 31 Mar 2022 11:08:19 +0000 (13:08 +0200)]
spi: cadence-quadspi: fix protocol setup for non-1-1-X operations
cqspi_set_protocol() only set the data width, but ignored the command
and address width (except for 8-8-8 DTR ops), leading to corruption of
all transfers using 1-X-X or X-X-X ops. Fix by setting the other two
widths as well.
While we're at it, simplify the code a bit by replacing the
CQSPI_INST_TYPE_* constants with ilog2().
Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash with 1-4-4
read and write operations.
Commit b470e10eb43f ("spi: core: add dma_map_dev for dma device") added
dma_map_dev for _spi_map_msg() but missed to add for unmap routine,
__spi_unmap_msg(), so add it now.
Jakob Koschel [Thu, 24 Mar 2022 07:25:34 +0000 (08:25 +0100)]
spi: spidev: replace usage of found with dedicated list iterator variable
To move the list iterator variable into the list_for_each_entry_*()
macro in the future it should be avoided to use the list iterator
variable after the loop body.
To *never* use the list iterator variable after the loop it was
concluded to use a separate iterator variable instead of a
found boolean [1].
This removes the need to use a found variable and simply checking if
the variable was set, can determine if the break/goto was hit.
Leilk Liu [Mon, 21 Mar 2022 01:39:21 +0000 (09:39 +0800)]
spi: support hclk
this patch support hclk for AHB bus.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220321013922.24067-3-leilk.liu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
Merge tag 'trace-v5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace
Pull more tracing updates from Steven Rostedt:
- Rename the staging files to give them some meaning. Just
stage1,stag2,etc, does not show what they are for
- Check for NULL from allocation in bootconfig
- Hold event mutex for dyn_event call in user events
- Mark user events to broken (to work on the API)
- Remove eBPF updates from user events
- Remove user events from uapi header to keep it from being installed.
- Move ftrace_graph_is_dead() into inline as it is called from hot
paths and also convert it into a static branch.
* tag 'trace-v5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
tracing: Move user_events.h temporarily out of include/uapi
ftrace: Make ftrace_graph_is_dead() a static branch
tracing: Set user_events to BROKEN
tracing/user_events: Remove eBPF interfaces
tracing/user_events: Hold event_mutex during dyn_event_add
proc: bootconfig: Add null pointer check
tracing: Rename the staging files for trace_events
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fix from Stephen Boyd:
"A single revert to fix a boot regression seen when clk_put() started
dropping rate range requests. It's best to keep various systems
booting so we'll kick this out and try again next time"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
Revert "clk: Drop the rate range on clk_put()"
Merge tag 'x86-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"A set of x86 fixes and updates:
- Make the prctl() for enabling dynamic XSTATE components correct so
it adds the newly requested feature to the permission bitmap
instead of overwriting it. Add a selftest which validates that.
- Unroll string MMIO for encrypted SEV guests as the hypervisor
cannot emulate it.
- Handle supervisor states correctly in the FPU/XSTATE code so it
takes the feature set of the fpstate buffer into account. The
feature sets can differ between host and guest buffers. Guest
buffers do not contain supervisor states. So far this was not an
issue, but with enabling PASID it needs to be handled in the buffer
offset calculation and in the permission bitmaps.
- Avoid a gazillion of repeated CPUID invocations in by caching the
values early in the FPU/XSTATE code.
- Enable CONFIG_WERROR in x86 defconfig.
- Make the X86 defconfigs more useful by adapting them to Y2022
reality"
* tag 'x86-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/fpu/xstate: Consolidate size calculations
x86/fpu/xstate: Handle supervisor states in XSTATE permissions
x86/fpu/xsave: Handle compacted offsets correctly with supervisor states
x86/fpu: Cache xfeature flags from CPUID
x86/fpu/xsave: Initialize offset/size cache early
x86/fpu: Remove unused supervisor only offsets
x86/fpu: Remove redundant XCOMP_BV initialization
x86/sev: Unroll string mmio with CC_ATTR_GUEST_UNROLL_STRING_IO
x86/config: Make the x86 defconfigs a bit more usable
x86/defconfig: Enable WERROR
selftests/x86/amx: Update the ARCH_REQ_XCOMP_PERM test
x86/fpu/xstate: Fix the ARCH_REQ_XCOMP_PERM implementation
Merge tag 'core-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull RT signal fix from Thomas Gleixner:
"Revert the RT related signal changes. They need to be reworked and
generalized"
* tag 'core-urgent-2022-04-03' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
Revert "signal, x86: Delay calling signals in atomic on RT enabled kernels"
Merge tag 'dma-mapping-5.18-1' of git://git.infradead.org/users/hch/dma-mapping
Pull more dma-mapping updates from Christoph Hellwig:
- fix a regression in dma remap handling vs AMD memory encryption (me)
- finally kill off the legacy PCI DMA API (Christophe JAILLET)
* tag 'dma-mapping-5.18-1' of git://git.infradead.org/users/hch/dma-mapping:
dma-mapping: move pgprot_decrypted out of dma_pgprot
PCI/doc: cleanup references to the legacy PCI DMA API
PCI: Remove the deprecated "pci-dma-compat.h" API
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